CN112579415B - Performance calculation method and device of AXI bus, electronic equipment and storage medium - Google Patents

Performance calculation method and device of AXI bus, electronic equipment and storage medium Download PDF

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CN112579415B
CN112579415B CN202011462800.7A CN202011462800A CN112579415B CN 112579415 B CN112579415 B CN 112579415B CN 202011462800 A CN202011462800 A CN 202011462800A CN 112579415 B CN112579415 B CN 112579415B
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stall
axi bus
read
efficiency
write
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CN112579415A (en
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窦雄
李毅
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Beijing Aixin Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G06F11/3414Workload generation, e.g. scripts, playback
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/349Performance evaluation by tracing or monitoring for interfaces, buses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1678Details of memory controller using bus width
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0062Bandwidth consumption reduction during transfers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
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  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Bus Control (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The embodiment of the application provides a method and a device for calculating the performance of an AXI bus, electronic equipment and a storage medium. The AXI bus is respectively connected with a master device and a slave device, and the method comprises the following steps: obtaining channel read/write information and read/write back pressure information of the AXI bus in a preset period; calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information; calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information; and determining main factors of the AXI bus for reducing the efficiency according to the actual weight relation, so that the analysis of the AXI bus efficiency is realized, and the main factors causing the AXI bus efficiency reduction can be accurately positioned.

Description

Performance calculation method and device of AXI bus, electronic equipment and storage medium
Technical Field
The present application relates to the field of chip technologies, and in particular, to a method and apparatus for calculating the performance of an AXI bus, an electronic device, and a storage medium.
Background
AXI (Advanced Xtensible nterface, advanced extensible interface) is one of the AMBA (Advanced Microcontroller Bus Architecture ) bus protocols, commonly used in on-chip interconnect bus design of chips.
The existing bus performance statistics mode is to count the transmission data of the read-write channel of the AXI bus, so that the read-write bandwidth of a certain period of time can be accurately counted. But in this way the cause of the bandwidth degradation cannot be analyzed.
In view of the above problems, no effective technical solution is currently available.
Disclosure of Invention
The embodiment of the application aims to provide a method, a device, electronic equipment and a storage medium for calculating the performance of an AXI bus, which can accurately position main factors causing the reduction of the AXI bus efficiency and facilitate the rapid maintenance of a system by staff.
In a first aspect, an embodiment of the present application provides a method for calculating performance of an AXI bus, where the AXI bus is connected to a master device and a slave device respectively, the method including:
Obtaining channel read/write information and read/write back pressure information of the AXI bus in a preset period;
Calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information;
calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information;
and determining a main factor of the reduction of the efficiency of the AXI bus according to the actual weight relation.
Optionally, in the method for calculating the performance of the AXI bus according to the embodiment of the present application, the obtaining the channel read/write information and the read/write backpressure information of the AXI bus in the preset period includes:
Acquiring the read data count and the write data count of an AXI bus in a preset period;
and acquiring the read data back pressure count, the write data back pressure count and the read command back pressure count of the AXI bus in a preset period.
Optionally, in the method for calculating the performance of an AXI bus according to the embodiment of the present application, the calculating the actual access efficiency of the AXI bus according to the channel read/write information and the read/write backpressure information includes:
The actual access efficiency of the AXI bus is calculated according to the formula a1=a2/e 1, wherein a2 is the average bandwidth of data access, a1 is the actual access efficiency of the AXI bus, e1=dw/T clk,Tclk represents the clock period of the AXI bus, and dw represents the bit width of the AXI bus.
Optionally, in the method for calculating the performance of the AXI bus according to the embodiment of the present application, the calculating the actual weight relationship occupied by the master device and the slave device causing the reduction of the efficiency of the AXI bus according to the actual access efficiency and the back pressure duty ratio information is as follows:
The actual weight relationship occupied by the master device and the slave device causing the reduction of the efficiency of the AXI bus satisfies: m_w_passive=1-a 1-w_stall, where m_w_passive represents the proportion of the write efficiency reduction of the AXI bus due to the host request not being active, and w_stall represents the host write data backpressure duty cycle.
Optionally, in the method for calculating the performance of the AXI bus according to the embodiment of the present application, the determining, according to the actual weight relationship, a main factor of the reduction of the efficiency of the AXI bus includes:
If m_w_passive is greater than 0 and w_stall is greater than 0, the master device and the slave device both cause the efficiency of the write channel of the AXI bus to be reduced;
If m_w_passive is smaller than w_stall, the slave is a main factor causing the reduction of the efficiency of the write channel of the AXI bus;
if m_w_passive is greater than w_stall, then the master is the main factor responsible for the reduced write channel efficiency of the AXI bus.
Optionally, in the method for calculating the performance of the AXI bus according to the embodiment of the present application, the actual weight relationship occupied by the master device and the slave device that cause the reduction of the efficiency of the AXI bus is calculated according to the actual access efficiency and the back pressure duty ratio information:
The actual weight relationship occupied by the master device and the slave device causing the reduction of the efficiency of the AXI bus satisfies: m_r_passive=1=a1-r_stall-rc_stall K; m_r_passive represents the proportion of the reduction in the read efficiency of the AXI bus due to the non-positive request of the master, where rc_stall K is the proportion of the slave's influence on the bus read performance and K is the empirical factor.
Optionally, in the method for calculating the performance of the AXI bus according to the embodiment of the present application, the determining, according to the actual weight relationship, a main factor of the reduction of the efficiency of the AXI bus includes:
if m_r_passive and r_stall are both greater than 0 and rc_stall= 0, then the master is the main factor that causes the AXI bus read efficiency to decrease;
if m_r_passive= =0, r_stall= =0, rc_stall >0, the slave is the main factor causing the reduction of AXI bus read efficiency;
if m_r_passive, r_stall and rc_stall are all greater than 0, judging the relation between r_stall and rc_stall; if r_stall < rc_stall, then both the master and slave are factors that cause a decrease in bus efficiency; if r_stall > rc_stall, the master is the main factor responsible for the reduced bus efficiency.
In a second aspect, an embodiment of the present application further provides a performance computing apparatus for an AXI bus, where the AXI bus is connected to a master device and a slave device respectively, the apparatus includes:
The first acquisition module is used for acquiring channel read/write information and read/write back pressure information of the AXI bus in a preset period;
The first calculation module is used for calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information;
The second calculation module is used for calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information;
and the judging module is used for determining main factors of the reduction of the efficiency of the AXI bus according to the actual weight relation.
In a third aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory storing computer readable instructions which, when executed by the processor, perform the steps of the method as provided in the first aspect above.
In a fourth aspect, embodiments of the present application provide a storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method as provided in the first aspect above.
As can be seen from the above, the method and apparatus for analyzing the performance of the AXI bus according to the embodiments of the present application obtain the channel read/write information and the read/write back pressure information of the AXI bus; calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information; calculating the actual weight occupied by the AXI bus efficiency reduction caused by the slave device according to the actual access efficiency and the back-pressure duty ratio information; determining a main factor of the reduction of the efficiency of the AXI bus according to the actual weight; therefore, the analysis of the AXI bus efficiency is realized, the main factors causing the AXI bus efficiency reduction can be accurately positioned, effective reference information can be provided for bus architecture optimization, and the system is convenient for staff to rapidly maintain.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments of the application. The objectives and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a method for calculating the performance of an AXI bus according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a first configuration of an AXI bus performance computing device according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present application.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1, fig. 1 is a flowchart of a method for calculating the performance of an AXI bus according to some embodiments of the present application, where the AXI bus is connected to a master device and a slave device respectively. The method for calculating the performance of the AXI bus comprises the following steps:
s101, obtaining channel read/write information and read/write back pressure information of an AXI bus in a preset period.
S102, calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information.
And S103, calculating an actual weight relation occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information.
S104, determining main factors of the reduction of the efficiency of the AXI bus according to the actual weight relation.
The AXI bus comprises 5 paths, wherein the 5 paths are a write command path, a write data path, a write feedback path, a read command path and a read feedback path respectively. The write command path is used for transmitting address information, burst length information, bus bit width information and some other control information of read-write access. The write data path is used to transfer the written data. The write feedback path is feedback of write commands and write data. The read feedback path is used to transmit feedback of read data and feedback of read commands.
In this step S101, the channel read/write information includes: a read data count, a write data count, a length of time that there is a write command that does not return feedback, a length of time that there is a read command that does not return feedback. The read/write backpressure information includes: read command backpressure information, write data backpressure information, and read data backpressure information. Wherein the read command backpressure information is represented by a read command backpressure count. The read data backpressure information is represented by a read data backpressure count. The write data backpressure information is represented by a write data backpressure count.
Thus, this step S101 may include: s1011, acquiring read data count and write data count of an AXI bus; s1012, acquiring a read data back pressure count, a write data back pressure count and a read command back pressure count of the AXI bus.
Specifically, the read data count is represented by taking the count at which data was read within a preset period of the statistic, which is generally denoted as r1.
Wherein the write data count is represented by taking a count of when data is written within a preset period of the statistic, the write data count being noted as w1.
The bit width of the AXI bus may be represented by dw, which is in bytes (B).
The duration of the write command with no feedback is a clock count in the active state in a preset period, and the duration of the write command with no feedback is denoted as w2. The write active refers to that there is a write command with no feedback at the current observation point.
The duration of the read command with no feedback is a clock count under the condition of reading active in a preset period, and the duration of the read command with no feedback is denoted as r2. The read active refers to a read command that has no feedback at the current observation point.
The duration of the preset time period is represented by a count value in the counted preset time period, and is recorded as clock_counter.
The counter-pressure count of the write data is a clock count when the counter-pressure occurs in the write data channel within a counted preset period, and is denoted as w3.
The counter-pressure count of the read data is a clock count of the counter-pressure of the read data channel in a statistical preset period, and is denoted as r3.
The counter pressure count of the read command is a clock count of the effective counter pressure of the read command channel in a counted preset period, and is denoted as r4. For the counter-pressure count of the read command, it is necessary to distinguish the validity of the counter-pressure, and not all counter-pressures on the read command channel form the count. The effective backpressure of the read command path is defined as: at the point in time of the current observation, back pressure occurs and the read_on_fly_count is 0. The read_on_fly_count refers to the sum of burst lengths corresponding to all read commands that did not return data at the current time minus the number of clock cycles that passed from the time the first read command was sent to the current time.
In this step S102, the actual access efficiency a1=a2/e 1. Where a2 is the average bandwidth of the data access. e1 =dw/T clk.Tclk denotes the clock cycle of the bus. Where a2=dw, data_counter. The data_counter is r1 or w1. If it is a read channel, the data_counter is r1, and if it is a write channel, the data_counter is w1.
The back-pressure duty ratio information may include a master write data back-pressure duty ratio w_stall, a master read data back-pressure duty ratio r_stall, and a read command back-pressure duty ratio rc_stall.
Specifically, the master write data back pressure duty cycle w_stall satisfies the following expression: w_stall=w3/w 2.
Wherein the read data back pressure duty cycle r_stall satisfies the following expression: r_stall=r3/r 2.
Wherein, the read command back pressure duty cycle rc_stall satisfies the following expression: rc_stall=r4/r 2.
In this step S103, the actual weights may include m_w_passive and m_r_passive. m_r_passive represents the proportion of the AXI bus that is not actively causing a decrease in read efficiency due to master requests. m_w_passive represents the proportion of the reduction in write efficiency of the AXI bus due to the host device request not being active.
The reduction in AXI bus efficiency may be referred to as a reduction in the efficiency of a write path (write command path, write data path) of the AXI bus, or as a reduction in the efficiency of a read path (read command path, read data path, and read feedback path) of the AXI bus. Wherein, the bus write bandwidth efficiency of the write path of the AXI bus satisfies the following formula: 1=a1+w_stall+m_w_passive.
Thus, the actual weighting relationship may be found as: m_w_passive=1-a1-w_stall.
The bus read bandwidth efficiency satisfies the following formula:
1=a1+r_stall+rc_stall_k+m_r_passive. Thus, the m_r_passive can be found from the formula. The actual weight relationship may be:
m_r_passive=1-a1-r_stall-rc_stall*K。
Wherein K is an empirical coefficient, and K is less than or equal to 1.r_stall truly reflects the impact of master backpressure on AXI bus efficiency. When r_stall=0, k=1, at which point the effect of each of the slave and master on the efficiency of the AXI bus can be clearly discerned.
In step S104, if m_w_passive is greater than 0 and w_stall is greater than 0, the master device and the slave device both cause a decrease in the write channel efficiency of the AXI bus. If m_w_passive is greater than w_stall, then the slave is the primary factor responsible for the reduced efficiency of the write channel of the AXI bus. If m_w_passive is smaller than w_stall, the master is the main factor that causes the efficiency of the write channel of the AXI bus to decrease.
In this step S104, when the actual weight relationship is m_r_passive=1-a 1-r_stall-rc_stall_k: if m_r_passive and r_stall are both greater than 0 and rc_stall= 0, then the master is the main factor that causes the AXI bus read efficiency to decrease; if m_r_passive= =0, r_stall= =0, rc_stall >0, the slave is the main factor causing the reduction of AXI bus read efficiency; if m_r_passive, r_stall and rc_stall are all greater than 0, judging the relation between r_stall and rc_stall; if r_stall < rc_stall, then both the master and slave are the main factors responsible for the reduced bus efficiency; if r_stall > rc_stall, the master is the main factor responsible for the reduced bus efficiency.
Or the actual weight relationship may be: m_w_passive=1-a1-w_stall: if m_w_passive is greater than 0 and w_stall is greater than 0, the master device and the slave device both cause the efficiency of the write channel of the AXI bus to be reduced; if m_w_passive is smaller than w_stall, the slave is a main factor causing the reduction of the efficiency of the write channel of the AXI bus; if m_w_passive is greater than w_stall, then the master is the main factor responsible for the reduced write channel efficiency of the AXI bus.
By calculating the weight proportion of the slave device of the read channel or the write channel of the AXI bus for reducing the efficiency of the AXI bus, the main factor causing the reduction of the AXI bus efficiency can be rapidly positioned, so that a worker can directly maintain or improve the AXI bus aiming at the main factor, and the efficiency can be improved.
As can be seen from the above, the method for analyzing the performance of the AXI bus according to the embodiment of the present application obtains the channel read/write information and the read/write back pressure information of the AXI bus in a preset period; calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information; calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information; determining a main factor of the reduction of the efficiency of the AXI bus according to the actual weight relation; therefore, the analysis of the AXI bus efficiency is realized, the main factors causing the AXI bus efficiency reduction can be accurately positioned, effective reference information can be provided for bus architecture optimization, and the system is convenient for staff to rapidly maintain.
Referring to fig. 2, fig. 2 is a schematic diagram of a performance computing device of an AXI bus according to some embodiments of the application. The device for calculating the performance of the AXI bus comprises: the device comprises a first acquisition module 201, a first calculation module 202, a second calculation module 203 and a judgment module 204.
The first obtaining module 201 is configured to obtain channel read/write information and read/write backpressure information of an AXI bus. The channel read/write information includes: a read data count, a write data count, a length of time that there is a write command that does not return feedback, a length of time that there is a read command that does not return feedback. The read/write backpressure information includes: read command backpressure information, write data backpressure information, and read data backpressure information. Wherein the read command backpressure information is represented by a read command backpressure count. The read data backpressure information is represented by a read data backpressure count. The write data backpressure information is represented by a write data backpressure count.
Specifically, the read data count is represented by taking the count at which data was read within a preset period of the statistic, which is generally denoted as r1.
Wherein the write data count is represented by taking a count of when data is written within a preset period of the statistic, the write data count being noted as w1.
The bit width of the AXI bus may be represented by dw, which is in bytes (B).
The duration of the write command with no feedback is a clock count in the active state in a preset period, and the duration of the write command with no feedback is denoted as w2. The write active refers to that there is a write command with no feedback at the current observation point. The duration of the read command with no feedback is a clock count under the condition of reading active in a preset period, and the duration of the read command with no feedback is denoted as r2. The read active refers to a read command that has no feedback at the current observation point. The duration of the preset time period is represented by a count value in the counted preset time period, and is recorded as clock_counter. The counter-pressure count of the write data is a clock count when the counter-pressure occurs in the write data channel within a counted preset period, and is denoted as w3. The counter-pressure count of the read data is a clock count of the counter-pressure of the read data channel in a statistical preset period, and is denoted as r3. The counter pressure count of the read command is a clock count of the effective counter pressure of the read command channel in a counted preset period, and is denoted as r4. For the counter-pressure count of the read command, it is necessary to distinguish the validity of the counter-pressure, and not all counter-pressures on the read command channel form the count. The effective backpressure of the read command path is defined as: at the current observation time point, backpressure occurs and the read_on_fly_count is 0.
The first calculation module 202 is configured to calculate the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information. The actual access efficiency a1=a2/e 1. Where a2 is the average bandwidth of the data access. e1 =dw/T clk.Tclk denotes the clock cycle of the bus. Where a2=dw, data_counter. The data_counter is r1 or w1. If it is a read channel, the data_counter is r1, and if it is a write channel, the data_counter is w1. The back-pressure duty ratio information may include a master write data back-pressure duty ratio w_stall, a read data back-pressure duty ratio r_stall, and a read command back-pressure duty ratio rc_stall. Specifically, the master write data back pressure duty cycle w_stall satisfies the following expression: w_stall=w3/w 2. Wherein the read data back pressure duty cycle r_stall satisfies the following expression: r_stall=r3/r 2. Wherein, the read command back pressure duty cycle rc_stall satisfies the following expression: rc_stall=r4/r 2.
The second calculating module 203 is configured to calculate, according to the actual access efficiency and the back-pressure duty ratio information, an actual weight relationship occupied by the master device and the slave device causing the reduction of the efficiency of the AXI bus. The actual weights may include m_w_passive and m_r_passive. m_r_passive represents the proportion of the AXI bus efficiency degradation due to the host device response not being aggressive. m_w_passive represents the proportion of an AXI bus inefficiency due to the host device request not being active. The reduction in AXI bus efficiency may be referred to as a reduction in the efficiency of a write path (write command path, write data path) of the AXI bus, or as a reduction in the efficiency of a read path (read command path, read data path, and read feedback path) of the AXI bus. Wherein, the bus write bandwidth efficiency of the write path of the AXI bus satisfies the following formula:
1=a1+w_stall+m_w_passive. Thus, m_w_passive=1-a 1-w_stall can be obtained.
The bus read bandwidth efficiency satisfies the following formula:
1=a1+r_stall+rc_stall_k+m_r_passive. Thus, the m_r_passive can be found from the formula. Where m_r_passive=1-a1-r_stall-rc_stall K. Wherein K is an empirical coefficient, and K is less than or equal to 1.r_stall truly reflects the impact of master backpressure on AXI bus efficiency. When r_stall=0, k=1, at which point the effect of each of the slave and master on the efficiency of the AXI bus can be clearly discerned.
The judging module 204 is configured to determine a major factor of the reduction of the efficiency of the AXI bus according to the actual weight relationship.
As can be seen from the above, the performance analysis device for AXI bus provided by the embodiment of the present application obtains the channel read/write information and the read/write back pressure information of the AXI bus in a preset period; calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information; calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information; determining a main factor of the reduction of the efficiency of the AXI bus according to the actual weight relation; therefore, the analysis of the AXI bus efficiency is realized, the main factors causing the AXI bus efficiency reduction can be accurately positioned, and the system is convenient for a worker to quickly maintain.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application, and the present application provides an electronic device 3, including: processor 301 and memory 302, the processor 301 and memory 302 being interconnected and in communication with each other by a communication bus 303 and/or other form of connection mechanism (not shown), the memory 302 storing a computer program executable by the processor 301, the processor 301 executing the computer program when the computing device is running to perform the method in any of the alternative implementations of the above embodiments to carry out the following functions: obtaining channel read/write information and read/write back pressure information of the AXI bus; calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information; calculating the actual weight occupied by the AXI bus efficiency reduction caused by the slave device according to the actual access efficiency and the back-pressure duty ratio information; and judging a main factor of the reduction of the efficiency of the AXI bus according to the actual weight.
The present application provides a storage medium that, when executed by a processor, performs the method of any of the alternative implementations of the above embodiments. The storage medium may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as static random access Memory (Static Random Access Memory, SRAM), electrically erasable Programmable Read-Only Memory (ELECTRICALLY ERASABLE PROGRAMMABLE READ-Only Memory, EEPROM), erasable Programmable Read-Only Memory (Erasable Programmable Read Only Memory, EPROM), programmable Read-Only Memory (PROM), read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (4)

1. A method for calculating the performance of an AXI bus, wherein the AXI bus is connected to a master device and a slave device respectively, the method comprising:
Obtaining channel read/write information and read/write back pressure information of the AXI bus in a preset period;
Calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information;
calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information;
determining a main factor of the reduction of the efficiency of the AXI bus according to the actual weight relation;
the obtaining the channel read/write information and the read/write back pressure information of the AXI bus in the preset period includes:
Acquiring the read data count and the write data count of an AXI bus in a preset period;
acquiring the read data back pressure count, the write data back pressure count and the read command back pressure count of an AXI bus in a preset period;
the calculating the actual access efficiency of the AXI bus according to the channel read/write information and the read/write back pressure information includes:
Calculating the actual access efficiency of the AXI bus according to a formula a1=a2/e 1, wherein a2 is the average bandwidth of data access, a1 is the actual access efficiency of the AXI bus, e1=dw/T clk,Tclk represents the clock cycle of the AXI bus, and dw represents the bit width of the AXI bus;
calculating the back voltage duty ratio information of the AXI bus according to the channel read/write information and the read/write back voltage information, including:
calculating the back-pressure duty ratio of the write data of the main device according to a formula w_stall=w3/w 2, wherein w2 refers to clock counting when a write command which does not return feedback exists in the preset period; w3 is a clock count when the write data channel is back-pressed within the preset time period; w_stall refers to the master write data back-pressure duty cycle;
Calculating a read data back-pressure duty ratio according to a formula r_stall=r3/r 2, wherein r2 refers to clock counting when a read command without feedback exists in the preset period; r3 is clock count when back pressure occurs to the read data channel in a preset period; r_stall is the read data back-pressure duty cycle;
Calculating a read command back-pressure duty ratio according to a formula rc_stall=r4/r 2, wherein r4 is a clock count when an effective back pressure occurs in a read command channel, and rc_stall is the read command back-pressure duty ratio;
If the actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device is calculated according to the actual access efficiency and the back pressure duty ratio information, the actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device satisfies the following conditions: m_w_passive=1-a 1-w_stall, then the determining, according to the actual weight relation, the main factors of the efficiency degradation of the AXI bus includes: if m_w_passive is greater than 0 and w_stall is greater than 0, the master device and the slave device both cause the efficiency of the write channel of the AXI bus to be reduced; if m_w_passive is smaller than w_stall, the slave is a main factor causing the reduction of the efficiency of the write channel of the AXI bus; if m_w_passive is greater than w_stall, the master is the main factor that causes the reduction of the write channel efficiency of the AXI bus; wherein, m_w_passive represents the proportion of the reduction of the write efficiency of the AXI bus caused by the fact that the request of the master device is not active, and w_stall represents the write data back-pressure duty ratio of the master device;
If the actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device is calculated according to the actual access efficiency and the back pressure duty ratio information, the actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device satisfies the following conditions: m_r_passive=1=a1-r_stall-rc_stall K, then the determining the main factors of the reduction of the efficiency of the AXI bus according to the actual weight relationship includes: if m_r_passive and r_stall are both greater than 0 and rc_stall= 0, then the master is the main factor that causes the AXI bus read efficiency to decrease; if m_r_passive= =0, r_stall= =0, rc_stall >0, the slave is the main factor causing the reduction of AXI bus read efficiency; if m_r_passive, r_stall and rc_stall are all greater than 0, judging the relation between r_stall and rc_stall; if r_stall < rc_stall, then both the master and slave are factors that cause a decrease in bus efficiency; if r_stall > rc_stall, then the master is the primary factor responsible for the reduced bus efficiency; where m_r_passive represents the proportion of the reduction of the read efficiency of the AXI bus due to the non-positive request of the master device, rc_stall_k represents the proportion of the influence of the slave device on the read performance of the bus, and K is an empirical factor.
2. A performance computing apparatus of an AXI bus, wherein the AXI bus is connected to a master device and a slave device, respectively, the apparatus comprising:
The first acquisition module is used for acquiring channel read/write information and read/write back pressure information of the AXI bus in a preset period;
The first calculation module is used for calculating the actual access efficiency and the back pressure duty ratio information of the AXI bus according to the channel read/write information and the read/write back pressure information;
The second calculation module is used for calculating an actual weight relation occupied by the reduction of the efficiency of the AXI bus caused by the master device and the slave device according to the actual access efficiency and the back-pressure duty ratio information;
the judging module is used for determining main factors of the reduction of the efficiency of the AXI bus according to the actual weight relation;
The first obtaining module obtains channel read/write information and read/write back pressure information of the AXI bus in a preset period, including: acquiring the read data count and the write data count of an AXI bus in a preset period; acquiring the read data back pressure count, the write data back pressure count and the read command back pressure count of an AXI bus in a preset period;
The first computing module computes the actual access efficiency of the AXI bus according to the channel read/write information and the read/write back pressure information, and includes: calculating the actual access efficiency of the AXI bus according to a formula a1=a2/e 1, wherein a2 is the average bandwidth of data access, a1 is the actual access efficiency of the AXI bus, e1=dw/T clk,Tclk represents the clock cycle of the AXI bus, and dw represents the bit width of the AXI bus;
The first calculation module calculates the back voltage duty ratio information of the AXI bus according to the channel read/write information and the read/write back voltage information, and includes: calculating the back-pressure duty ratio of the write data of the main device according to a formula w_stall=w3/w 2, wherein w2 refers to clock counting when a write command which does not return feedback exists in the preset period; w3 is a clock count when the write data channel is back-pressed within the preset time period; w_stall refers to the master write data back-pressure duty cycle; calculating a read data back-pressure duty ratio according to a formula r_stall=r3/r 2, wherein r2 refers to clock counting when a read command without feedback exists in the preset period; r3 is clock count when back pressure occurs to the read data channel in a preset period; r_stall is the read data back-pressure duty cycle; calculating a read command back-pressure duty ratio according to a formula rc_stall=r4/r 2, wherein r4 is a clock count when an effective back pressure occurs in a read command channel, and rc_stall is the read command back-pressure duty ratio;
If the second calculation module calculates, according to the actual access efficiency and the back pressure duty ratio information, an actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device, where the actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device satisfies: m_w_passive=1-a 1-w_stall, the determining module determines, according to the actual weight relationship, major factors of efficiency degradation of the AXI bus, including: if m_w_passive is greater than 0 and w_stall is greater than 0, the master device and the slave device both cause the efficiency of the write channel of the AXI bus to be reduced; if m_w_passive is smaller than w_stall, the slave is a main factor causing the reduction of the efficiency of the write channel of the AXI bus; if m_w_passive is greater than w_stall, the master is the main factor that causes the reduction of the write channel efficiency of the AXI bus; wherein, m_w_passive represents the proportion of the reduction of the write efficiency of the AXI bus caused by the fact that the request of the master device is not active, and w_stall represents the write data back-pressure duty ratio of the master device;
If the second calculation module calculates, according to the actual access efficiency and the back pressure duty ratio information, an actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device, where the actual weight relationship occupied by the efficiency reduction of the AXI bus caused by the master device and the slave device satisfies: m_r_passive=1=a1-r_stall-rc_stall K, the determining module determines the main factors of the reduction of the efficiency of the AXI bus according to the actual weight relationship, including: if m_r_passive and r_stall are both greater than 0 and rc_stall= 0, then the master is the main factor that causes the AXI bus read efficiency to decrease; if m_r_passive= =0, r_stall= =0, rc_stall >0, the slave is the main factor causing the reduction of AXI bus read efficiency; if m_r_passive, r_stall and rc_stall are all greater than 0, judging the relation between r_stall and rc_stall; if r_stall < rc_stall, then both the master and slave are factors that cause a decrease in bus efficiency; if r_stall > rc_stall, then the master is the primary factor responsible for the reduced bus efficiency; where m_r_passive represents the proportion of the reduction of the read efficiency of the AXI bus due to the non-positive request of the master device, rc_stall_k represents the proportion of the influence of the slave device on the read performance of the bus, and K is an empirical factor.
3. An electronic device comprising a processor and a memory storing computer readable instructions that, when executed by the processor, perform the steps in the method of claim 1.
4. A storage medium having stored thereon a computer program which when executed by a processor performs the steps of the method of claim 1.
CN202011462800.7A 2020-12-10 2020-12-10 Performance calculation method and device of AXI bus, electronic equipment and storage medium Active CN112579415B (en)

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CN108009065A (en) * 2016-10-31 2018-05-08 深圳市中兴微电子技术有限公司 The method and apparatus for monitoring AXI buses
CN111506461A (en) * 2019-01-14 2020-08-07 新岸线(北京)科技集团有限公司 Bus-based back pressure module for testing and implementation method thereof

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CN105487953B (en) * 2015-11-23 2019-02-01 福州瑞芯微电子股份有限公司 A kind of bus performance analysis method and device

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CN108009065A (en) * 2016-10-31 2018-05-08 深圳市中兴微电子技术有限公司 The method and apparatus for monitoring AXI buses
CN111506461A (en) * 2019-01-14 2020-08-07 新岸线(北京)科技集团有限公司 Bus-based back pressure module for testing and implementation method thereof

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