CN107946452B - High-performance thermoelectric device and ultra-fast preparation method thereof - Google Patents

High-performance thermoelectric device and ultra-fast preparation method thereof Download PDF

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CN107946452B
CN107946452B CN201711092495.5A CN201711092495A CN107946452B CN 107946452 B CN107946452 B CN 107946452B CN 201711092495 A CN201711092495 A CN 201711092495A CN 107946452 B CN107946452 B CN 107946452B
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barrier layer
layer
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buffer stress
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CN107946452A (en
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何佳清
周毅
付良威
陈跃星
冯丹
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Shenzhen Thermoelectricity New Energy Technology Co ltd
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Southwest University of Science and Technology
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/10—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
    • H10N10/17—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the structure or configuration of the cell or thermocouple forming the device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N19/00—Integrated devices, or assemblies of multiple devices, comprising at least one thermoelectric or thermomagnetic element covered by groups H10N10/00 - H10N15/00
    • H10N19/101—Multiple thermocouples connected in a cascade arrangement

Abstract

The invention discloses a high-performance thermoelectric device and an ultra-fast preparation method thereof. The thermoelectric device with high performance adopts a segmented structure to optimally match thermoelectric materials with a temperature difference environment, adopts a barrier layer and a buffer stress layer to reduce interface element migration and longitudinal contact thermal expansion stress and increase bonding strength, adopts a phonon scattering layer and a negative thermal expansion buffer layer to nest and fix thermoelectric legs to increase the internal thermal resistance and transverse thermal matching performance of the thermoelectric device with high performance, adopts inner packaging and outer packaging to avoid sublimation oxidation of the thermoelectric materials and enhance the external impact resistance of the thermoelectric device, effectively breaks through the technical bottlenecks of low energy conversion efficiency, low specific power, poor thermal stability, poor impact resistance, complex preparation process and the like of the traditional thermoelectric device, simultaneously improves the thermal stability and mechanical structure performance of the thermoelectric device with high performance to a greater extent, ensures long-term excellent electrical output performance and expands working environment.

Description

High-performance thermoelectric device and ultra-fast preparation method thereof
Technical Field
The invention relates to the field of thermoelectric devices and clean energy, in particular to a high-performance thermoelectric device and an ultra-fast preparation method thereof.
Background
The thermoelectric device is an environment-friendly clean energy device which realizes the direct conversion of heat energy and electric energy by utilizing Seebeck (Seebeck) effect or Peltier (Peltier) effect. The thermoelectric device has the advantages of strong environmental adaptability, good working stability, long service life, no maintenance, no noise, miniaturization and the like, and is widely applied to important fields of military national defense, deep sea, polar exploration, biomedical treatment, electronic industry, artificial intelligence and the like.
In recent years, the cost of raw materials, material properties, manufacturing processes, and the like of thermoelectric devices have received much attention from the academic and industrial fields. In the aspect of thermoelectric material raw material, conventional Bi2Te3The earth crust of the base material has low element abundance, and CoSb with low cost and high element abundance is adopted at present3Base material, SnSe base material, Cu2Se-based material, Mg2Si-based material, oxideManufacturing an inorganic thermoelectric device by using a material, graphene and a topological insulator; and conductive polymers, charge transfer composites, metal organic coordination polymers have resulted in some attempts to fabricate organic thermoelectric devices.
In the aspect of thermoelectric material performance, the thermoelectric material figure of merit ZT and cold surface temperature T can be usedCTemperature T of hot surfaceHThe thermoelectric conversion efficiency was expressed as
Figure BDA0001461553150000011
ηTE(ZT,TC,TH) The optimization can be carried out from the aspects of thermoelectric material figure of merit ZT, temperature difference delta T between a cold surface and a hot surface and the like. Currently, high figure of merit thermoelectric materials are successively reported, wherein the ZT of conventional PbTe has reached 2.2 at 915K; the ZT of SnSe reaches 2.6 at 923K; cu2Se also reaches 2.6 ZT at 850K. However, in the case of thermoelectric devices, conventional Bi2Te3The figure of merit zT is 1.4 at 450K and the thermoelectric conversion is only 6% at 217K temperature difference. In addition, by designing a segmented structure, the maximum temperature difference between the hot end and the cold end of the thermoelectric device is effectively utilized; bi2Te3/CoSb3The energy conversion efficiency of the segmented device experiment module reaches 12%; the movement direction of heat flow or current carriers in the thermoelectric device is guided to increase the internal thermal resistance of the thermoelectric device, the contact area between the thermoelectric device and electrodes is increased to reduce contact resistance to improve the temperature difference, and further the electrical output performance of the thermoelectric device is enhanced.
In the aspect of manufacturing process, a Metal Organic Chemical Vapor Deposition (MOCVD) method is adopted to prepare the nano superlattice thermoelectric film; the volume ratio power and the heat matching are improved by adjusting the volume ratio of the internal structure of the thermoelectric device; rapidly sintering the thermoelectric material simple substance powder by adopting a discharge plasma sintering (SPS) process to obtain a thermoelectric block; depositing target thermoelectric legs in the positioning direction of the hollow mask plate and the balls; manufacturing a nanowire thermoelectric device by adopting a semiconductor integration and micro-nano processing technology; technologies such as ink-jet printing, selective laser melting 3D printing and additive manufacturing technologies are adopted to rapidly prepare millimeter-scale thin film thermoelectric devices through self-propagating combustion and thermal explosion reactions.
In addition, in order to avoid the sublimation of thermoelectric material elements at high temperature and the performance reduction of the periodic thermal cycling device, an alloy layer and a diffusion barrier layer are added between the thermoelectric material layer and the electrode layer; coating the surface of the thermoelectric device with an organic-inorganic ceramic coating/porous glass surface layer by (connecting transition layer/barrier layer)n(n is more than or equal to 1) the high-temperature end of the thermoelectric material is coated, and the diffusion layer is formed by reaction at the contact interface.
However, although the above work improves the performance of the thermoelectric device to some extent and improves the preparation method of the thermoelectric device, major problems to be solved in terms of large-scale industrial thermoelectric devices are that ① isolates the thermoelectric material from direct contact with the external environment, prevents the material from sublimating from inside to outside and oxidizing from outside to inside, ② improves the thermal stability of the thermoelectric legs, reduces or even eliminates contact thermal expansion and crack generation, and ③ maintains excellent electrical output performance and operational stability for a long time.
The high-performance thermoelectric device provided by the invention can break through the technical bottlenecks of low energy conversion efficiency, small specific power, poor thermal stability, poor impact resistance, complex preparation process and the like of the traditional thermoelectric device, and has the characteristics of high energy conversion efficiency, good working stability, ultra-fast preparation and the like.
Disclosure of Invention
The embodiment of the invention provides a high-performance thermoelectric device and an ultra-fast preparation method of the high-performance thermoelectric device.
A high-performance thermoelectric device (1) according to an embodiment of the present invention includes a thermoelectric module (20), the thermoelectric module (20) being formed by stacking thermoelectric cells (10) and insulating interlayers (113) in this order; the thermoelectric unit (10) comprises a p-type thermoelectric leg (10p) and an n-type thermoelectric leg (10 n); the p-type thermoelectric leg (10p) comprises a p-type high-temperature thermoelectric leg (101p), a first barrier layer (102p), a first buffer stress layer (103p), a second barrier layer (104p), a p-type medium-temperature thermoelectric leg (105p), a third barrier layer (106p), a second buffer stress layer (107p), a fourth barrier layer (108p) and a p-type low-temperature thermoelectric leg (109p) which are sequentially arranged from top to bottom; the n-type thermoelectric leg (10n) comprises an n-type high-temperature thermoelectric leg (101n), a fifth barrier layer (102n), a third buffer stress layer (103n), a sixth barrier layer (104n), an n-type medium-temperature thermoelectric leg (105n), a seventh barrier layer (106n), a fourth buffer stress layer (107n), an eighth barrier layer (108n) and an n-type low-temperature thermoelectric leg (109n) which are sequentially arranged from top to bottom; the p-type high-temperature thermoelectric leg (101p) and the n-type high-temperature thermoelectric leg (101n) are connected through a ninth barrier layer (110a), a fifth buffer stress layer (111a) and a tenth barrier layer (112a) to form the thermoelectric unit (10), the n-type low-temperature thermoelectric leg (109n) and the p-type low-temperature thermoelectric leg (109p) adjacent to the thermoelectric unit (10) are fixedly connected through an eleventh barrier layer (110b), a sixth buffer stress layer (111b) and a twelfth barrier layer (112b) and are inlaid by adopting the insulating interlayer (113) to form the thermoelectric module (20); the p-type low-temperature thermoelectric legs (109p) and the n-type low-temperature thermoelectric legs (109n) on two sides of the bottom end of the thermoelectric module (20) are respectively provided with a first electrical output electrode (114p) and a second electrical output electrode (114n), the first electrical output electrode (114p) is connected with a first electrical output lead (115p), and the second electrical output electrode (114n) is connected with a second electrical output lead (115 n).
In some embodiments, the high-performance thermoelectric device (1) has a square structure, and a plurality of the high-performance thermoelectric devices (1) are combined in a series manner, a parallel manner or a series-parallel manner.
In some embodiments, the material of the p-type high-temperature thermoelectric leg (101p) comprises a p-type SiGe-based material, a p-type CoSb3Base material, p-type SnSe base material, p-type PbSe base material and p-type Cu2Se-based material, p-type BiCuSeO-based material, p-type Half-Heusler material, p-type Cu (In, Ga) Te2Material, p-type FeSi2Base material, CrSi2、MnSi1.73CoSi, p-type Cu1.8An S-based material or a p-type oxide material;
the p-type medium-temperature thermoelectric leg (105p) is made of p-type PbTe base materials and p-type CoSb3Base material, p-type Half-Heusler material, p-type Cu1.8S-based material or p-type AgSbTe2A base material;
the material of the p-type low-temperature thermoelectric leg (109p) comprises p-type Bi2Te3Base material, p-type Sb2Se3Base material or p-type Sb2Te3A base material;
the n-type high-temperature thermoelectric leg (101n) is made of n-type SiGe-based material or n-type CoSb3Base material, n-type SnSe base material, n-type SnTe base material, n-type Cu2Se-based materials, n-type Half-Heusler materials or n-type oxide materials;
the n-type medium-temperature thermoelectric leg (105n) comprises n-type PbTe-based materials, n-type PbS-based materials and n-type CoSb3Base material, n-type Mg2Si-based material, n-type Zn4Sb3Base material, n-type InSb base material, n-type Half-Heusler material, n-type oxide material or n-type AgSbTe2A base material;
the material of the n-type low-temperature thermoelectric leg (109n) comprises n-type Bi2Te3Base material, n-type BiSb base material and n-type Zn4Sb3Base material, n-type Mg3Sb2Base material, n-type Bi2Se3Base material or n-type Sb2Se3A base material.
In some embodiments, the thicknesses of the first barrier layer (102p), the second barrier layer (104p), the third barrier layer (106p), the fourth barrier layer (108p), the fifth barrier layer (102n), the sixth barrier layer (104n), the seventh barrier layer (106n), the eighth barrier layer (108n), the ninth barrier layer (110a), the tenth barrier layer (112a), the eleventh barrier layer (110b), and the twelfth barrier layer (112b) all have a range of values [0.01mm,0.1mm ];
the first barrier layer (102p), the second barrier layer (104p), the third barrier layer (106p), the fourth barrier layer (108p), the fifth barrier layer (102n), the sixth barrier layer (104n), the seventh barrier layer (106n), the eighth barrier layer (108n), the ninth barrier layer (110a), the tenth barrier layer (112a), the eleventh barrier layer (110b), the twelfth barrier layer (112b) are all in the form of powder, a thin film or a foil;
the first barrier layer (102p), the second barrier layer (104p), the third barrier layer (106p), the fourth barrier layer (108p), the fifth barrier layer (102n), the sixth barrier layer (104n), the seventh barrier layer (106n), the eighth barrier layer (108n), the ninth barrier layer (110a), the tenth barrier layer (112a), the eleventh barrier layer (110b), the twelfth barrier layer (112b) are all made of one or more of gold (Au), silver (Ag), tantalum (Ta), copper (Cu), titanium (Ti), titanium nitride (TiN), titanium Tungsten (TiW), nickel (Ni), or molybdenum (Mo);
the first barrier layer (102p) and the ninth barrier layer (110a) are made of the same material; the second barrier layer (104p) and the third barrier layer (106p) are made of the same material; the fourth barrier layer (108p) and the twelfth barrier layer (112b) are made of the same material; the fifth barrier layer (102n) and the tenth barrier layer (112a) are made of the same material; the sixth barrier layer (104n) and the seventh barrier layer (106n) are made of the same material; the eighth barrier layer (108n) and the eleventh barrier layer (110b) are made of the same material;
the thicknesses of the first buffer stress layer (103p), the second buffer stress layer (107p), the third buffer stress layer (103n), the fourth buffer stress layer (107n), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are in the range of [0.01mm,0.1mm ];
the first buffer stress layer (103p), the second buffer stress layer (107p), the third buffer stress layer (103n), the fourth buffer stress layer (107n), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are all in the form of powder, a film or a foil;
the first buffer stress layer (103p), the second buffer stress layer (107p), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are made of one or more of copper (Cu), platinum (Pt), nickel (Ni) and copper-molybdenum (Cu-Mo) alloy, and the first buffer stress layer (103p), the second buffer stress layer (107p), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are made of the same material;
the materials of the third buffer stress layer (103n) and the fourth buffer stress layer (107n) compriseMolybdenum oxide (MoO)x) One or more of copper (Cu), platinum (Pt), nickel (Ni) and copper molybdenum (Cu-Mo) alloy, wherein the third buffer stress layer (103n) and the fourth buffer stress layer (107n) are made of the same material.
In some embodiments, the first electrical output electrode (114p) and the second electrical output electrode (114n) each comprise one or more of gold (Au), palladium (Pd), platinum (Pt), aluminum (Al), copper (Cu), nickel (Ni), and titanium (Ti), and the first electrical output electrode (114p) and the second electrical output electrode (114n) are made of the same material;
the first electrical output lead (115p) and the second electrical output lead (115n) are both made of polyvinyl chloride insulated copper core leads.
In some embodiments, the insulating interlayer (113) comprises a phonon scattering layer (113a) and a negative thermal expansion buffer layer (113b), the phonon scattering layer (113a) and the negative thermal expansion buffer layer (113b) are sequentially stacked, and the insulating interlayer (113) is fixedly embedded between the adjacent p-type thermoelectric leg (10p) and the n-type thermoelectric leg (10 n).
In some embodiments, the high performance thermoelectric device (1) further comprises an encapsulation structure, the encapsulation structure comprises two layers, namely an inner encapsulation (201) and an outer encapsulation (202), the inner encapsulation (201) is arranged on the outer surface of the thermoelectric module (20), and the outer encapsulation (202) is arranged on the outer surface of the inner encapsulation (201); said first electrical output lead (115p) accessing said first electrical output electrode (114p) through said outer package (202) and said inner package (201), said second electrical output lead (115n) accessing said second electrical output electrode (114n) through said outer package (202) and said inner package (201); or
The encapsulation structure comprises a single encapsulation layer arranged on the outer surface of the thermoelectric module (20), the first electrical output lead (115p) being routed through the single encapsulation layer to the first electrical output electrode (114p), and the second electrical output lead (115n) being routed through the single encapsulation layer to the second electrical output electrode (114 n).
In some embodiments, the insulating interlayer (113) comprises a phonon scattering layer (113a) and a negative thermal expansion buffer layer (113b), the phonon scattering layer (113a) and the negative thermal expansion buffer layer (113b) are sequentially stacked, and the insulating interlayer (113) is disposed in left-right opposition between the thermoelectric module (20) and the inner package (201); or
The insulating interlayers (113) are oppositely arranged at the left and the right and are positioned between the thermoelectric module (20) and the single-layer packaging layer.
In some embodiments, the phonon scattering layer (113a) is a layer of nano-insulating particles, and the thickness of the phonon scattering layer (113a) has a value in the range of [1nm,100nm ]]The number of the phonon scattering layers (113a) is in the range of [10,10000]]The material of the phonon scattering layer (113a) comprises SiO2、Al2O3、AlN、MgO、TiO2、Si3N4Or SiC;
the thickness of the negative thermal expansion buffer layer (113b) is in the range of [1nm,100nm ]]The number of layers of the negative thermal expansion buffer layer (113b) is in the range of [10,10000]]The material of the negative thermal expansion buffer layer (113b) comprises BaTiO3、PbTiO3、LaCrO3、ZrW2O8、ZrV2O7Or HfW2O8One or more of (a).
In some embodiments, when the package structure includes two layers, the material of the inner package (201) includes carbon fiber or graphite-epoxy resin thermal conductive composite material, and the material of the outer package (202) includes FeNi kovar.
The ultra-fast preparation method of the high-performance thermoelectric device (1) comprises the following steps:
weighing single substance powder according to the stoichiometric ratio of elements in a p-type high-temperature thermoelectric leg (101p), a p-type intermediate-temperature thermoelectric leg (105p), a p-type low-temperature thermoelectric leg (109p), an n-type high-temperature thermoelectric leg (101n), an n-type intermediate-temperature thermoelectric leg (105n) and an n-type low-temperature thermoelectric leg (109n) to obtain thermoelectric material powder, and weighing the material powder of each layer of a first barrier layer (102p), a second barrier layer (104p), a third barrier layer (106p), a fourth barrier layer (108p), a fifth barrier layer (102n), a sixth barrier layer (104n), a seventh barrier layer (106n), an eighth barrier layer (108n), a ninth barrier layer (110a) and a tenth barrier layer (112a) to obtain barrier layer powder; respectively weighing material powder of each layer of a first buffer stress layer (103p), a second buffer stress layer (107p), a third buffer stress layer (103n), a fourth buffer stress layer (107n) and a fifth buffer stress layer (111a) to obtain buffer stress layer powder;
sequentially paving thermoelectric material powder, barrier layer powder and buffer stress layer powder in a space surrounded by a die (302), an upper pressure head (301) and a lower pressure head (306) according to the sequence of a thermoelectric material layer, a barrier layer and a buffer stress layer, separating the material powder of each layer of a p-type thermoelectric leg (10p) and the material powder of each layer of an n-type thermoelectric leg (10n) in the thermoelectric material powder by using a first partition plate (303), a middle partition plate (305) and a second partition plate (304), and performing discharge plasma sintering to form a thermoelectric block body;
cutting the thermoelectric block to form a thermoelectric unit (10);
alternately preparing a phonon scattering layer (113a) and a negative thermal expansion buffer layer (113b) layer by adopting a chemical vapor deposition method to form an insulating interlayer (113), and inlaying and fixing the thermoelectric unit (10) by utilizing the insulating interlayer (113);
electroplating and depositing an eleventh barrier layer (110b), a sixth buffer stress layer (111b) and a twelfth barrier layer (112b) between the convex section of the n-type low-temperature thermoelectric leg (109n) and the convex section of the p-type low-temperature thermoelectric leg (109p) of the adjacent thermoelectric unit (10), and alternately stacking the thermoelectric units (10) to obtain a thermoelectric module (20);
and respectively electroplating to prepare a first electrical output electrode (114p) and a second electrical output electrode (114n) of the thermoelectric module (20), and respectively connecting a first electrical output lead (115p) and a second electrical output lead (115 n).
In some embodiments, the ultra-fast manufacturing method of the high-performance thermoelectric device (1) further comprises:
coating carbon fibers on the outer surface of the thermoelectric module (20) by adopting high-temperature sealant to form an inner package (201);
and fixedly wrapping FeNi kovar alloy which is the material of the outer package (202) on the outer surface of the inner package (201), and fixing the interface of the material of the outer package (202) by using a sealant to form the outer package (202).
In some embodiments, the upper ram (301) and the lower ram (306) are both made of graphite;
the material of the die (302) comprises graphite, alloy and Al2O3Base ceramic, AlN base ceramic, Si3N4One or more of a base ceramic or a SiC-based ceramic;
the first partition plate (303), the middle partition plate (305) and the second partition plate (304) are made of graphite or ceramic, and the first partition plate (303), the middle partition plate (305) and the second partition plate (304) are made of the same material.
The invention is based on the following principle: under the action of temperature difference, holes and electrons in a p-type thermoelectric leg (10p) and an n-type thermoelectric leg (10n) are transferred, a high-temperature, medium-temperature and low-temperature segmented thermoelectric material is adopted to utilize the temperature difference between a hot surface and a cold surface of the device to the maximum extent, the difference of mean free paths of phonons and electrons (the mean free path of electrons is 1nm in magnitude and the mean free path of phonons is 100nm in magnitude) is combined, a nano-structure phonon scattering layer (113a) and negative thermal expansion buffer layer (113b) composite material is designed, the contact thermal expansion of the material is reduced or even eliminated while the phonon scattering of the thermoelectric material is increased, and the working stability of the thermoelectric device is improved by adopting an inner package (201) and an outer package (202).
The high-performance thermoelectric device (1) provided by the invention effectively breaks through the technical bottlenecks of low energy conversion efficiency, small specific power, poor thermal stability, poor impact resistance, complex preparation process and the like of the traditional thermoelectric device by adopting the segmented structure, the nano phonon scattering structure, the negative thermal expansion material, the inner packaging (201) and the outer packaging (202) material, has the characteristics of high energy conversion efficiency, large output power, strong environmental applicability, good working stability, long service life, easy implementation and the like, can stably work in important fields of military national defense, deep space deep sea, polar exploration, biomedical, electronic industry, artificial intelligence and the like for a long time, and further meets the requirements of environmental protection, high efficiency, portability and universality of energy conversion. Compared with the prior art, the main beneficial effects are as follows:
1. the thermoelectric device is designed by adopting a segmented structure, a blocking layer, a buffer stress layer, an insulating interlayer (113) formed by a nanoparticle phonon scattering material and a negative thermal expansion material and a packaging structure, so that the technical defects of low energy utilization rate, small volume specific power, poor working stability and impact resistance and the like caused by limitation of the traditional thermoelectric device to contact thermal expansion, element migration and diffusion, sublimation and oxidation of the thermoelectric material are overcome, and the electrical output performance and the working stability of the thermoelectric device are greatly improved.
2. According to the invention, the thermoelectric unit (10) is prepared by combining the hot pressing process with the mold (302) and the partition plate through one-step molding, so that the direct sintering of the high-temperature-section thermoelectric material, the medium-temperature-section thermoelectric material and the low-temperature-section thermoelectric material, the barrier layer and the buffer stress layer is realized, the mutual diffusion among elements is reduced, the interlayer bonding strength and the thermal matching degree of the segmented thermoelectric device are enhanced, and the contact resistance is reduced.
3. The p-type thermoelectric legs (10p) and the n-type thermoelectric legs (10n) are directly connected, an insulating interlayer (113) formed by a nano-particle phonon scattering material and a negative thermal expansion material occupies an air gap existing between the adjacent thermoelectric legs of the traditional thermoelectric device and is used for embedding and supporting the adjacent p-type thermoelectric legs (10p) and the n-type thermoelectric legs (10n), the internal thermal resistance of the device is increased, the contact resistance is reduced, the specific power per unit volume is improved, the phonon scattering is enhanced, the contact thermal expansion is reduced, the current backflow is avoided, the energy conversion efficiency of the thermoelectric device is improved to a large extent, and the requirements of energy conversion on low carbon, environmental protection, high integration efficiency, economy and universality are met.
4. The thermoelectric module (20) structure is fixed by the inner package (201) and the outer package (202), so that mechanical extrusion and thermal stress existing in the internal structure of the thermoelectric device are buffered, mechanical impact between the thermoelectric device and the external environment is buffered, the thermoelectric device has a certain self-repairing function, and the thermoelectric device can better work in various severe environments.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic structural view of a high performance thermoelectric device according to some embodiments of the present invention.
Fig. 2 is a front view of a high performance thermoelectric device according to certain embodiments of the present invention.
Fig. 3 is a cold-side elevation view of a high-performance thermoelectric device according to certain embodiments of the present invention.
Fig. 4 is a thermal side elevation view of a high performance thermoelectric device according to certain embodiments of the present invention.
Fig. 5 is a schematic diagram of a structure to be packaged for a high performance thermoelectric device according to some embodiments of the present invention.
Fig. 6 is a diagram of the operation principle of the thermoelectric device based on the Seebeck effect.
Fig. 7 is a schematic view of a conventional segmented thermoelectric device structure.
Fig. 8 is a schematic flow diagram of a method for ultra-fast fabrication of a high performance thermoelectric device according to certain embodiments of the present invention.
Fig. 9-20 are process flow diagrams for fabricating high performance thermoelectric devices according to certain embodiments of the present invention.
Description of the main elements and symbols:
high-performance thermoelectric device 1, thermoelectric unit 10, thermoelectric module 20, p-type thermoelectric leg 10p, n-type thermoelectric leg 10n, p-type high-temperature thermoelectric leg 101p, first barrier layer 102p, first buffer stress layer 103p, second barrier layer 104p, p-type intermediate-temperature thermoelectric leg 105p, third barrier layer 106p, second buffer stress layer 107p, fourth barrier layer 108p, p-type low-temperature thermoelectric leg 109p, n-type high-temperature thermoelectric leg 101n, fifth barrier layer 102n, third buffer stress layer 103n, sixth barrier layer 104n, n-type intermediate-temperature thermoelectric leg 105n, seventh barrier layer 106n, fourth buffer stress layer 107n, eighth barrier layer 108n, n-type low-temperature thermoelectric leg 109n, ninth barrier layer 110a, fifth buffer stress layer 111a, tenth barrier layer 112a, eleventh barrier layer 110b, sixth buffer stress layer 111b, twelfth barrier layer 112b, insulating interlayer 113, The phonon scattering layer 113a, the negative thermal expansion buffer layer 113b, the first electrical output electrode 114p, the first electrical output lead 115p, the second electrical output electrode 114n and the second electrical output lead 115 n;
an inner package 201, an outer package 202;
an upper ram 301, a die 302, a first diaphragm 303, a second diaphragm 304, a middle diaphragm 305, and a lower ram 306.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In the description of the present invention, it is to be understood that the terms "first", "second" and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
Referring to fig. 1 to 7 together, a high-performance thermoelectric device 1 according to an embodiment of the present invention includes a thermoelectric module 20 (shown in fig. 16) and a package structure.
In which the thermoelectric module 20 is formed by stacking the thermoelectric cells 10 (shown in fig. 10) and the insulating interlayers 113 in sequence. Referring to fig. 10 and 16, the thermoelectric element 10 includes a p-type thermoelectric leg 10p and an n-type thermoelectric leg 10 n. The p-type thermoelectric leg 10p comprises a p-type high-temperature thermoelectric leg 101p, a first barrier layer 102p, a first buffer stress layer 103p, a second barrier layer 104p, a p-type medium-temperature thermoelectric leg 105p, a third barrier layer 106p, a second buffer stress layer 107p, a fourth barrier layer 108p and a p-type low-temperature thermoelectric leg 109p which are sequentially arranged from top to bottom. The n-type thermoelectric leg 10n comprises an n-type high-temperature thermoelectric leg 101n, a fifth barrier layer 102n, a third buffer stress layer 103n, a sixth barrier layer 104n, an n-type medium-temperature thermoelectric leg 105n, a seventh barrier layer 106n, a fourth buffer stress layer 107n, an eighth barrier layer 108n and an n-type low-temperature thermoelectric leg 109n which are sequentially arranged from top to bottom. The p-type high-temperature thermoelectric leg 101p and the n-type high-temperature thermoelectric leg 101n are connected through the ninth barrier layer 110a, the fifth buffer stress layer 111a and the tenth barrier layer 112a to form the thermoelectric unit 10. The n-type low-temperature thermoelectric legs 109n and the p-type low-temperature thermoelectric legs 109p of the adjacent thermoelectric units 10 are fixedly connected through the eleventh barrier layer 110b, the sixth buffer stress layer 111b and the twelfth barrier layer 112b and are sequentially stacked by being inlaid with the insulating interlayer 113 to form the thermoelectric module 20.
The outer surface of the thermoelectric module 20 is provided with an inner package 201, and the outer surface of the inner package 201 is provided with an outer package 202.
The p-type low-temperature thermoelectric legs 109p on both sides of the bottom end of the thermoelectric module 20 are provided with first electrical output electrodes 114p, and the n-type low-temperature thermoelectric legs 109n are provided with second electrical output electrodes 114 n. First electrical output lead 115p is coupled to first electrical output electrode 114p through inner package 201 and outer package 202 in sequence. A second electrical output lead 115n is connected to a second electrical output electrode 114n, passing through the inner package 201 and the outer package 202 in sequence.
Referring to fig. 11, the insulating interlayer 113 is a composite material in which a phonon scattering layer 113a and a negative thermal expansion buffer layer 113b are sequentially stacked. The phonon scattering layer 113a is made of insulating nanoparticles, and the particles do not contact each other. The insulating interlayer 113 is mounted between the adjacent p-type thermoelectric legs 10p and n-type thermoelectric legs 10n (shown in fig. 12, 14 and 15). In addition, an insulating interlayer 113 is further provided between the outer surface of the thermoelectric module 20 and the inner package 201. Among them, the insulating interlayers 113 are provided only on the left and right sides of the outer surface of the thermoelectric module 20 (shown in fig. 18, 19, and 20).
Referring to fig. 6, in the high-performance thermoelectric device 1 according to the embodiment of the invention, under the action of the temperature difference, the internal holes and electrons of the p-type thermoelectric leg 10p and the n-type thermoelectric leg 10n are transferred, so that the thermal energy is converted into electric energy.
The high-performance thermoelectric device 1 of the embodiment of the invention adopts high-temperature, medium-temperature and low-temperature segmented thermoelectric materials, so that the temperature difference between the hot surface and the cold surface of the high-performance thermoelectric device 1 can be utilized to the maximum extent, and the energy conversion efficiency is improved; the segmented structure of the barrier layer, the buffer stress layer, the phonon scattering layer 113a, the negative thermal expansion buffer layer 113b and the packaging structure is adopted for design, so that the defects of low energy utilization rate, small volume specific power, poor working stability and impact resistance and the like caused by limitation of the traditional thermoelectric device (shown in figure 7) to contact thermal expansion, element migration diffusion and sublimation and oxidation of thermoelectric materials are overcome, and the electrical output performance and the working stability of the high-performance thermoelectric device 1 are greatly improved.
Furthermore, the barrier layer of the high-performance thermoelectric device 1 according to the embodiment of the present invention can prevent the elements between the thermoelectric material (i.e., the materials of the p-type thermoelectric leg 10p and the n-type thermoelectric leg 10n) and the buffer stress layer from diffusing into each other during the high-temperature sintering process in the fabrication of the high-performance thermoelectric device 1, and can enhance the bonding strength between the buffer stress layer and the thermoelectric material, thereby forming a good ohmic contact and reducing the contact resistance. The material of the buffer stress layer of the high-performance thermoelectric device 1 has good component, structure and thermal matching with the thermoelectric material, and forms a compound with the powder of the thermoelectric material and the powder of the barrier layer in the densification sintering process, so that the interface forms a mosaic structure, the bonding strength is increased, the cracks are reduced, the migration of elements in the contact interface is blocked, the contact resistance is reduced, and the carrier extraction capability is increased.
In addition, the high-performance thermoelectric device 1 of the embodiment of the invention is directly connected with the p-type thermoelectric legs 10p and the n-type thermoelectric legs 10n, and combines the difference of the mean free path of phonons and electrons (the mean free path of electrons is 1nm magnitude, the mean free path of phonons is 100nm magnitude), the composite material of the nano-structure phonon scattering layer 113a and the negative thermal expansion buffer layer 113b is designed and adopted to occupy the air gap existing between the adjacent thermoelectric legs of the traditional thermoelectric device and support the adjacent p-type thermoelectric legs 10p and the n-type thermoelectric legs 10n in an embedding manner, the internal thermal resistance of the high-performance thermoelectric device 1 is increased, the contact resistance is reduced, the specific power per unit volume is increased, the phonon scattering of the thermoelectric material is enhanced, the thermal contact expansion is reduced and even eliminated, the current backflow is avoided, the energy conversion efficiency of the high-performance thermoelectric device 1 is improved to a great extent, the low-carbon and environment-, Integrating the requirements of high efficiency, economy and universality.
In addition, the high-performance thermoelectric device 1 according to the embodiment of the present invention adopts the inner package 201 and the outer package 202 to fix the structure of the thermoelectric module 20, which is helpful for buffering mechanical overstock and thermal stress existing in the internal structure of the high-performance thermoelectric device 1, and buffering mechanical impact between the high-performance thermoelectric device 1 and the external environment, so that the high-performance thermoelectric device 1 has a certain self-repairing function, and can better work in various severe environments.
Referring again to fig. 1, in some embodiments, the structure of the high-performance thermoelectric device 1 according to the embodiments of the present invention may be a square structure. The plurality of high-performance thermoelectric devices 1 may be combined in series, in parallel, or in series and parallel. When the high-performance thermoelectric device 1 is applied, a DC/DC boost module can be optionally assembled to manage the electrical output of the high-performance thermoelectric device 1. Specifically, the output end of one high-performance thermoelectric device 1 may be assembled with a DC/DC boost module, and the output end of a plurality of high-performance thermoelectric devices 1 combined in series, parallel, or series-parallel may be assembled with a DC/DC boost module. Thus, the output voltage of the high-performance thermoelectric device 1 can be raised.
Referring to fig. 1 again, in some embodiments, the material of the p-type high temperature thermoelectric leg 101p may be p-type SiGe-based material, p-type CoSb3Base material, p-type SnSe base material, p-type PbSe base material and p-type Cu2Se-based material, p-type BiCuSeO-based material, p-type Half-Heusler material, p-type Cu (In, Ga) Te2Material, p-type FeSi2Base material, CrSi2、MnSi1.73CoSi, p-type Cu1.8An S-based material or a p-type oxide material. The p-type intermediate-temperature thermoelectric leg 105p can be made of p-type PbTe base materials or p-type CoSb3Base material, p-type Half-Heusler material, p-type Cu1.8S-based material or p-type AgSbTe2A base material. The p-type low-temperature thermoelectric leg 109p may be made of p-type Bi2Te3Base material, p-type Sb2Se3Base material or p-type Sb2Te3A base material. The material of the n-type high-temperature thermoelectric leg 101n can be n-type SiGe-based material or n-type CoSb3Base material, n-type SnSe base material, n-type SnTe base material, n-type Cu2Se-based materials, n-type Half-Heusler materials or n-type oxide materials. The material of the n-type medium-temperature thermoelectric leg 105n can be n-type PbTe-based material, n-type PbS-based material or n-type CoSb3Base material, n-type Mg2Si-based material, n-type Zn4Sb3Base material, n-type InSb base material, n-type Half-Heusler material, n-type oxide material or n-type AgSbTe2A base material. The material of the n-type low-temperature thermoelectric legs 109n may be n-type Bi2Te3Base material, n-type BiSb base material and n-type Zn4Sb3Base material, n-type Mg3Sb2Base material, n-type Bi2Se3Base material or n-type Sb2Se3A base material.
Referring back to fig. 1, in some embodiments, the thickness of the first barrier layer 102p is in a range of [0.01mm,0.1mm ], for example, the thickness of the first barrier layer 102p may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The first barrier layer 102p may be in the form of a powder, a film, or a foil. The material of the first barrier layer 102p may be one or more of gold (Au), silver (Ag), tantalum (Ta), copper (Cu), titanium (Ti), titanium nitride (TiN), titanium Tungsten (TiW), nickel (Ni), or molybdenum (Mo), for example, the material of the first barrier layer 102p may be Au, Cu, Ti, or TiW, the material of the first barrier layer 102p may also be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, and the like. The thickness of the ninth blocking layer 110a may be in a range of [0.01mm,0.1mm ], for example, the thickness of the ninth blocking layer 110a may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1mm, etc. The ninth barrier layer 110a may be in the form of powder, a film, or a foil. The material of the ninth blocking layer 110a may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the ninth blocking layer 110a may be Au, Cu, Ti, or TiW, the material of the ninth blocking layer 110a may be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, or the like. In the embodiment of the present invention, the materials used for the first barrier layer 102p and the ninth barrier layer 110a in the same thermoelectric unit 10 are the same. It can be understood that, as shown in fig. 1, the first barrier layer 102p and the ninth barrier layer 110a in the same thermoelectric unit 10 are located adjacent to each other in the thermoelectric unit 10, and the first barrier layer 102p and the ninth barrier layer 110a are in contact with the same p-type high-temperature thermoelectric leg 101p, so that the first barrier layer 102p and the ninth barrier layer 110a made of the same material can facilitate material selection on one hand, and can form stress matching when the thermoelectric unit 10 is manufactured on the other hand, thereby enhancing the structural stability of the thermoelectric unit 10.
Referring back to fig. 1, in some embodiments, the thickness of the second barrier layer 104p is in a range of [0.01mm,0.1mm ], for example, the thickness of the second barrier layer 104p may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The second barrier layer 104p may be in the form of a powder, a film, or a foil. The material of the second barrier layer 104p may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the second barrier layer 104p may be Au, Cu, Ti, or TiW, the material of the second barrier layer 104p may be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, or the like. The thickness of the third barrier layer 106p may be in a range of [0.01mm,0.1mm ], for example, the thickness of the third barrier layer 106p may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1mm, etc. The third barrier layer 106p may be in the form of a powder, a film, or a foil. The material of the third barrier layer 106p may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the third barrier layer 106p may be Au, Cu, Ti, or TiW, the material of the third barrier layer 106p may also be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, and the like. In an embodiment of the present invention, the materials used for the second barrier layer 104p and the third barrier layer 106p in the same thermoelectric unit 10 are the same. It is understood that in fig. 1, the second barrier layer 104p and the third barrier layer 106p in the same thermoelectric unit 10 are in contact with the same p-type intermediate-temperature thermoelectric leg 105p, and therefore, the materials of the second barrier layer 104p and the third barrier layer 106p can be selected conveniently by using the same material.
Referring back to fig. 1, in some embodiments, the thickness of the fourth barrier layer 108p is in a range of [0.01mm,0.1mm ], for example, the thickness of the fourth barrier layer 108p may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The fourth barrier layer 108p may be in the form of a powder, a film, or a foil. The material of the fourth barrier layer 108p may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the fourth barrier layer 108p may be Au, Cu, Ti, or TiW, the material of the fourth barrier layer 108p may also be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, and the like. The thickness of the twelfth barrier layer 112b may be in a range of [0.01mm,0.1mm ], and for example, the thickness of the twelfth barrier layer 112b may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The twelfth barrier layer 112b may be in the form of a powder, a film, or a foil. The material of the twelfth barrier layer 112b may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, and Mo, for example, the material of the twelfth barrier layer 112b may be Au, Cu, Ti, or TiW, the material of the twelfth barrier layer 112b may be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, and the like. In the embodiment of the invention, the materials used for the first barrier layer 102p and the ninth barrier layer 110a in two adjacent thermoelectric units 10 are the same. It can be understood that, as shown in fig. 1, the fourth barrier layer 108p and the twelfth barrier layer 112b of two adjacent thermoelectric units 10 are located at positions adjacent to each other, and the fourth barrier layer 108p and the twelfth barrier layer 112b are in contact with the same p-type low-temperature thermoelectric leg 109p, so that the fourth barrier layer 108p and the twelfth barrier layer 112b made of the same material can facilitate material selection on one hand, and can form stress matching when manufacturing the thermoelectric module 20 on the other hand, thereby enhancing the structural stability of the thermoelectric module 20 (shown in fig. 16).
Referring back to fig. 1, in some embodiments, the thickness of the fifth barrier layer 102n is in a range of [0.01mm,0.1mm ], for example, the thickness of the fifth barrier layer 102n may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The fifth barrier layer 102n may be in the form of a powder, a film or a foil. The material of the fifth barrier layer 102n may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the fifth barrier layer 102n may be Au, Cu, Ti, or TiW, the material of the fifth barrier layer 102n may also be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, and the like. The thickness of the tenth barrier layer 112a may be in a range of [0.01mm,0.1mm ], and for example, the thickness of the tenth barrier layer 112a may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, 0.1mm, or the like. The tenth barrier layer 112a may be in the form of a powder, a film, or a foil. The tenth blocking layer 112a may be made of one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the tenth blocking layer 112a may be made of Au, Cu, Ti, or TiW, the tenth blocking layer 112a may be made of Au, Ag alloy, Cu, Ti, Ni alloy, Au, Ta, Cu, Ni, or Mo. In the embodiment of the present invention, the materials used for the fifth barrier layer 102n and the tenth barrier layer 112a in the same thermoelectric unit 10 are the same. It can be understood that, as shown in fig. 1, the fifth barrier layer 102n and the tenth barrier layer 112a in the same thermoelectric unit 10 are located adjacent to each other, and the fifth barrier layer 102n and the tenth barrier layer 112a are in contact with the same n-type high-temperature thermoelectric leg 101n, so that the fifth barrier layer 102n and the tenth barrier layer 112a made of the same material can facilitate material selection, and can form stress matching during the manufacturing of the thermoelectric unit 10, thereby enhancing the structural stability of the thermoelectric unit 10.
Referring back to fig. 1, in some embodiments, the thickness of the sixth barrier layer 104n is in a range of [0.01mm,0.1mm ], for example, the thickness of the sixth barrier layer 104n may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The sixth barrier layer 104n may be in the form of a powder, a film or a foil. The material of the sixth barrier layer 104n may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the sixth barrier layer 104n may be Au, Cu, Ti, or TiW, the material of the sixth barrier layer 104n may be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, or the like. The thickness of the seventh barrier layer 106n may be in a range of [0.01mm,0.1mm ], for example, the thickness of the seventh barrier layer 106n may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, 0.1mm, or the like. The seventh barrier layer 106n may be in the form of a powder, a film or a foil. The material of the seventh barrier layer 106n may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the seventh barrier layer 106n may be Au, Cu, Ti, or TiW, the material of the seventh barrier layer 106n may be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, or the like. In the embodiment of the present invention, the materials used for the sixth barrier layer 104n and the seventh barrier layer 106n in the same thermoelectric unit 10 are the same. It is understood that, as shown in fig. 1, the sixth barrier layer 104n and the seventh barrier layer 106n in the same thermoelectric unit 10 are in contact with the same n-type intermediate-temperature thermoelectric leg 105n, and therefore, the sixth barrier layer 104n and the seventh barrier layer 106n can be made of the same material, which is convenient for material selection.
Referring back to fig. 1, in some embodiments, the thickness of the eighth barrier layer 108n is in a range of [0.01mm,0.1mm ], for example, the thickness of the eighth barrier layer 108n may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The eighth barrier layer 108n may be in the form of a powder, a film or a foil. The material of the eighth barrier layer 108n may be one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, or Mo, for example, the material of the eighth barrier layer 108n may be Au, Cu, Ti, or TiW, the material of the eighth barrier layer 108n may be an alloy of Au and Ag, an alloy of Cu, Ti, and Ni, an alloy of Au, Ta, Cu, Ni, and Mo, or the like. The thickness of the eleventh barrier layer 110b may be in a range of [0.01mm,0.1mm ], for example, the thickness of the eleventh barrier layer 110b may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1mm, etc. The eleventh barrier layer 110b may be in the form of a powder, a film, or a foil. The eleventh blocking layer 110b may be made of one or more of Au, Ag, Ta, Cu, Ti, TiN, TiW, Ni, and Mo, for example, the eleventh blocking layer 110b may be made of Au, Cu, Ti, or TiW, the eleventh blocking layer 110b may be made of Au or Ag alloy, Cu, Ti, and Ni alloy, and Au, Ta, Cu, Ni, and Mo alloy. In the embodiment of the invention, the materials used for the eighth barrier layer 108n and the eleventh barrier layer 110b in two adjacent thermoelectric units 10 are the same. It can be understood that, as shown in fig. 1, the eighth barrier layer 108n and the eleventh barrier layer 110b of two adjacent thermoelectric units 10 are located adjacent to each other, and the eighth barrier layer 108n and the eleventh barrier layer 110b are in contact with the same n-type low-temperature thermoelectric leg 109n, so that, on one hand, the material selection can be facilitated by using the same material for making the eighth barrier layer 108n and the eleventh barrier layer 110b, and on the other hand, stress matching can be formed during the manufacture of the thermoelectric module 20, thereby enhancing the structural stability of the thermoelectric module 20 (shown in fig. 16).
Referring to fig. 1 again, in some embodiments, the materials used for the first barrier layer 102p, the second barrier layer 104p, the third barrier layer 106p, the fourth barrier layer 108p, the fifth barrier layer 102n, the sixth barrier layer 104n, the seventh barrier layer 106n, the eighth barrier layer 108n, the ninth barrier layer 110a, the tenth barrier layer 112a, the eleventh barrier layer 110b and the twelfth barrier layer 112b may all be the same, so as to facilitate the selection of the barrier layer materials and further simplify the manufacturing of the high-performance thermoelectric device 1.
Referring back to fig. 1, in some embodiments, the thickness of the first barrier layer 102p may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the second barrier layer 104p may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the third barrier layer 106p may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the fourth barrier layer 108p may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the fifth barrier layer 102n may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the sixth barrier layer 104n may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the seventh barrier layer 106n may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the eighth barrier layer 108n may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. The thickness of the ninth barrier layer 110a may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the tenth barrier layer 112a may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the eleventh barrier layer 110b may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the twelfth barrier layer 112b may be adjusted according to the actual working environment of the high-performance thermoelectric device 1.
Referring to fig. 1 again, in some embodiments, the thickness of the first buffer stress layer 103p may be in a range of [0.01mm,0.1mm ], for example, the thickness of the first buffer stress layer 103p may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The first buffer stress layer 103p may be in the form of powder, a film, or a foil. The material of the first buffer stress layer 103p may be one or more of metals Cu, Pt, Ni, and Cu — Mo alloy, for example, the material of the first buffer stress layer 103p may be Cu, Pt, Ni, or the like, the material of the first buffer stress layer 103p may be an alloy of Cu and Pt, an alloy of Cu and Ni, an alloy of Cu, Pt, Ni, and Cu — Mo alloy, or the like. The thickness of the second buffer stress layer 107p may be set to a value in the range of [0.01mm,0.1mm ], and for example, the thickness of the second buffer stress layer 107p may be set to 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, 0.1mm, or the like. The second buffer stress layer 107p may be in the form of a powder, a film, or a foil. The material of the second buffer stress layer 107p may be one or more of metals Cu, Pt, Ni, and Cu — Mo alloy, for example, the material of the second buffer stress layer 107p may be Cu, Pt, Ni, or the like, the material of the second buffer stress layer 107p may be an alloy of Cu and Pt, an alloy of Cu and Ni, an alloy of Cu, Pt, Ni, and Cu — Mo alloy, or the like. The thickness of the fifth buffer stress layer 111a may be in a range of [0.01mm,0.1mm ], and for example, the thickness of the fifth buffer stress layer 111a may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, 0.1mm, or the like. The fifth buffer stress layer 111a may be in the form of a powder, a film or a foil. The material of the fifth buffer stress layer 111a may be one or more of metals Cu, Pt, Ni, and Cu — Mo alloy, for example, the material of the fifth buffer stress layer 111a may be Cu, Pt, Ni, or the like, the material of the fifth buffer stress layer 111a may be an alloy of Cu and Pt, an alloy of Cu and Ni, an alloy of Cu, Pt, Ni, and Cu — Mo alloy, or the like. The thickness of the sixth buffer stress layer 111b may be set to a value in the range of [0.01mm,0.1mm ], and for example, the thickness of the sixth buffer stress layer 111b may be set to 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, or 0.1 mm. The sixth buffer stress layer 111b may be in the form of a powder, a film or a foil. The material of the sixth buffer stress layer 111b may be one or more of metals Cu, Pt, Ni, and Cu — Mo alloy, for example, the material of the sixth buffer stress layer 111b may be Cu, Pt, Ni, or the like, the material of the sixth buffer stress layer 111b may be an alloy of Cu and Pt, an alloy of Cu and Ni, an alloy of Cu, Pt, Ni, and Cu — Mo alloy, or the like. In the embodiment of the present invention, the materials used for the first, second, fifth and sixth buffer stress layers 103p, 107p, 111a and 111b are the same.
It can be understood that, as shown in fig. 1, the first buffer stress layer 103p and the fifth buffer stress layer 111a in the same thermoelectric unit 10 are located adjacent to each other, and therefore, the first buffer stress layer 103p and the fifth buffer stress layer 111a made of the same material can facilitate material selection, and can form stress matching during the manufacturing of the thermoelectric unit 10, so as to enhance the structural stability of the thermoelectric unit 10. Similarly, the second buffer stress layer 107p and the sixth buffer stress layer 111b in two adjacent thermoelectric modules 20 are located adjacent to each other, so that the second buffer stress layer 107p and the sixth buffer stress layer 111b made of the same material can facilitate material selection, and can form stress matching during manufacturing of the thermoelectric module 20, thereby enhancing the structural stability of the thermoelectric module 20 (shown in fig. 16). The first buffer stress layer 103p and the second buffer stress layer 107p are components of the p-type thermoelectric leg 10p in the same thermoelectric unit 10, and the first buffer stress layer 103p and the second buffer stress layer 107p made of the same material can facilitate material selection, thereby simplifying the manufacture of the high-performance thermoelectric device 1. The fifth buffer stress layer 111a can be connected with the p-type high-temperature thermoelectric leg 101p and the n-type high-temperature thermoelectric leg 101n in the same thermoelectric unit 10, the sixth buffer stress layer 111b can be connected with the p-type low-temperature thermoelectric leg 109p and the n-type low-temperature thermoelectric leg 109n in the adjacent thermoelectric unit 10, the fifth buffer stress layer 111a and the sixth buffer stress layer 111b have similar functions, and the fifth buffer stress layer 111a and the sixth buffer stress layer 111b are made of the same material, so that the material selection can be facilitated, and the manufacturing of the high-performance thermoelectric device 1 is simplified.
Referring to fig. 1 again, in some embodiments, the thickness of the third buffer stress layer 103n is in a range of [0.01mm,0.1mm ]]For example, the thickness of the third buffer stress layer 103n may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, 0.1mm, or the like. The third buffer stress layer 103n may be in the form of powder, a film, or a foil. The material of the third buffer stress layer 103n may be Cu, Pt, MoOxFor example, the material of the third buffer stress layer 103n may be Cu, Pt, Ni, or the like, the material of the first buffer stress layer 103p may be an alloy of Cu and Pt, an alloy of Cu and Ni, an alloy of Cu, Pt and Ni, or molybdenum oxide MoOxCu-Mo alloys, and the like. The thickness of the fourth buffer stress layer 107n is in the range of [0.01mm,0.1 mm%]For example, the thickness of the fourth buffer stress layer 107n may be 0.01mm, 0.02mm, 0.025mm, 0.031mm, 0.05mm, 0.06mm, 0.07mm, 0.08mm, 0.09mm, 0.1mm, or the like. The fourth buffer stress layer 107n may be in the form of a powder, a film or a foil. The material of the fourth buffer stress layer 107n may be one or more of metal Cu, Pt, Ni and Cu-Mo alloy, for example, the material of the fourth buffer stress layer 107n may be Cu, Pt, Ni, etc., the material of the second buffer stress layer 107p may be Cu, Pt alloy, Cu, Ni alloy, Cu, Pt, Ni alloy, molybdenum oxide MoOxCu-Mo alloys, and the like. It can be understood that the third buffer stress layer 103n and the fourth buffer stress layer 107n are components of the n-type thermoelectric leg 10n in the same thermoelectric unit 10, and the third buffer stress layer is made of the same materialThe layer 103n and the fourth buffer stress layer 107n can facilitate material selection, and simplify the manufacture of the high-performance thermoelectric device 1.
Referring to fig. 1 again, in some embodiments, the first buffer stress layer 103p, the second buffer stress layer 107p, the third buffer stress layer 103n, the fourth buffer stress layer 107n, the fifth buffer stress layer 111a, and the sixth buffer stress layer 111b may all be made of the same material, so that the selection of the material of the buffer stress layer may be facilitated, and the manufacturing of the high-performance thermoelectric device 1 may be further simplified.
Referring to fig. 1 again, in some embodiments, the thickness of the first buffer stress layer 103p may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the second buffer stress layer 107p may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the third buffer stress layer 103n may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the fourth buffer stress layer 107n may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the fifth buffer stress layer 111a may be adjusted according to the actual working environment of the high-performance thermoelectric device 1. The thickness of the sixth buffer stress layer 111b may be adjusted according to the actual working environment of the high-performance thermoelectric device 1.
Referring again to fig. 1, in some embodiments, the material of the inner package 201 may be carbon fiber or Graphite-Epoxy resin thermal Composite (GEC). The material of the outer package 202 may be FeNi kovar.
Referring to fig. 1 and 16, in some embodiments, the package structure may also be a single-layer package structure. The single encapsulation layer is disposed on the outer surface of the thermoelectric module 20. First electrical output lead 115p is coupled to first electrical output electrode 114p through the single encapsulation layer and second electrical output lead 115n is coupled to second electrical output electrode 114n through the single encapsulation layer. An insulating interlayer 113 is disposed between the outer surface of the thermoelectric module 20 and the single-layer encapsulation layer. Among them, the insulating interlayers 113 are provided only on the left and right sides of the outer surface of the thermoelectric module 20 (shown in fig. 1). The single-layer package layer may be the inner package 201, the material of the single-layer package layer may be carbon fiber or graphite-epoxy resin heat-conducting composite material, the first electrical output lead 115p passes through the inner package 201 and is connected to the first electrical output electrode 114p, the second electrical output lead 115n passes through the inner package 201 and is connected to the second electrical output electrode 114n, and an insulating interlayer 113 is disposed between the outer surface of the thermoelectric module 20 and the inner package 201. The single-layer package layer may also be the outer package 202, and the material of the single-layer package layer may be FeNi kovar alloy, the first electrical output wire 115p is connected to the first electrical output electrode 114p through the outer package 202, and the second electrical output wire 115n is connected to the second electrical output electrode 114n through the outer package 202. An insulating interlayer 113 is disposed between the outer surface of the thermoelectric module 20 and the outer package 202.
Referring to fig. 1 again, in some embodiments, when the package structure is a double-layer structure, the thickness of the inner package 201 may be adjusted according to the actual operating environment of the high-performance thermoelectric device 1, and the thickness of the outer package 202 may also be adjusted according to the actual operating environment of the high-performance thermoelectric device 1. When the packaging structure is a single-layer packaging layer, the thickness of the single-layer packaging layer can be adjusted according to the actual working environment of the high-performance thermoelectric device 1.
Referring to fig. 1 again, in some embodiments, the thickness of the phonon scattering layer 113a (shown in fig. 11) in the insulating interlayer 113 is in the range of [1nm,100nm ]]For example, the thickness of the phonon scattering layer 113a may be 1nm, 15nm, 30nm, 41.3nm, 57nm, 66nm, 70nm, 85nm, 93nm, 98nm, 100nm, or the like. The number of phonon-scattering layers 113a was in the range of [10,10000]]For example, the number of phonon scattering layers 113a may be 10, 68, 100, 827, 1000, 2500, 4000, 5100, 6015, 7777, 8000, 9000, 10000, or the like. The phonon scattering layer 113a may be made of SiO2、Al2O3、AlN、MgO、TiO2、Si3N4Or SiC, for example, the material of the phonon-scattering layer 113a may be SiO2、Al2O3、Si3N4Or TiO2The material of the phonon scattering layer 113a may be SiO2、Al2O3Mixture of (3), AlN, MgO, Si3N4And mixtures of SiC, SiO2、Al2O3、AlN、MgO、TiO2、Si3N4And mixtures of SiC, and the like. Since the number of phonon scattering layers 113a may be multiple, in the embodiment of the present invention, after the material of the first layer of phonon scattering layer 113a is determined, the material of the remaining number of phonon scattering layers 113a should be the same as the material of the first layer of phonon scattering layer 113a, so that the material of the phonon scattering layer 113a can be selected and the insulating interlayer 113 can be manufactured.
Referring to fig. 1 again, in some embodiments, the thickness of the negative thermal expansion buffer layer 113b (shown in fig. 11) in the insulating interlayer 113 is in the range of [1nm,100nm ]]For example, the thickness of the negative thermal expansion buffer layer 113b may be 1nm, 15nm, 30nm, 41.3nm, 57nm, 66nm, 70nm, 85nm, 93nm, 98nm, 100nm, or the like. The number of layers of the negative thermal expansion buffer layer 113b is in the range of [10,10000]]For example, the number of layers of the negative thermal expansion buffer layer 113b may be 10, 68, 100, 827, 1000, 2500, 4000, 5100, 6015, 7777, 8000, 9000, 10000, or the like. The material of the negative thermal expansion buffer layer 113b may be SiO2、Al2O3、AlN、MgO、TiO2、Si3N4Or SiC, for example, the material of the negative thermal expansion buffer layer 113b may be SiO2、Al2O3、Si3N4Or TiO2The material of the negative thermal expansion buffer layer 113b may be SiO2、Al2O3Mixture of (3), AlN, MgO, Si3N4And mixtures of SiC, SiO2、Al2O3、AlN、MgO、TiO2、Si3N4And mixtures of SiC, and the like. Since the number of layers of the negative thermal expansion buffer layer 113b can be multiple, in the embodiment of the invention, after the material of the first layer of the negative thermal expansion buffer layer 113b is determined, the material of the remaining layers of the negative thermal expansion buffer layer 113b should be the same as the material of the first layer of the negative thermal expansion buffer layer 113b, so as to select the material of the negative thermal expansion buffer layer 113b and manufacture the insulating interlayer 113.
Referring to FIG. 1, in some embodiments, the first electrical output electrode 114p can be made of Cu, Au, Ag, Mo, W, Fe, Pd, Pt, Al, Ni or Ti. The material of second electrical output electrode 114n can be Cu, Au, Ag, Mo, W, Fe, Pd, Pt, Al, Ni, or Ti. In an embodiment of the present invention, the material of the first electrical output electrode 114p is the same as that of the second electrical output electrode 114n, so that the material of the output electrode can be selected and the high-performance thermoelectric device 1 can be manufactured conveniently.
Referring to fig. 1 again, in some embodiments, the first electrical output wire 115p and the second electrical output wire 115n are made of the same material, and are all pvc insulated copper core wires.
Referring to fig. 8 to 20, the present invention also provides a method for ultra-fast manufacturing a high-performance thermoelectric device 1. The ultra-fast preparation method of the high-performance thermoelectric device 1 comprises the following steps:
1) preparation of thermoelectric Unit 10
ST 01: and weighing the simple substance powder according to the stoichiometric ratio of each element in the p-type high-temperature thermoelectric leg 101p, the p-type medium-temperature thermoelectric leg 105p, the p-type low-temperature thermoelectric leg 109p, the n-type high-temperature thermoelectric leg 101n, the n-type medium-temperature thermoelectric leg 105n and the n-type low-temperature thermoelectric leg 109n to obtain the thermoelectric material powder. The first barrier layer 102p, the second barrier layer 104p, the third barrier layer 106p, the fourth barrier layer 108p, the fifth barrier layer 102n, the sixth barrier layer 104n, the seventh barrier layer 106n, the eighth barrier layer 108n, the ninth barrier layer 110a and the tenth barrier layer 112a are respectively weighed to obtain barrier layer powder. And respectively weighing material powders of each layer of the first buffer stress layer 103p, the second buffer stress layer 107p, the third buffer stress layer 103n, the fourth buffer stress layer 107n and the fifth buffer stress layer 111a to obtain buffer stress layer powders.
Specifically, for example, p-type CoSb is used respectively3The base material is p-type high-temperature thermoelectric leg 101p material, the p-type PbTe base material is p-type medium-temperature thermoelectric leg 105p material, and p-type Bi material2Te3The base material is p-type low-temperature thermoelectric leg 109p material and n-type CoSb3The base material is an n-type high-temperature thermoelectric leg 101n material, the n-type PbTe base material is an n-type medium-temperature thermoelectric leg 105n material,n-type Bi2Te3The base material is an n-type low-temperature thermoelectric leg 109n material, and the thermoelectric material powder is obtained by weighing simple substance powder according to the stoichiometric ratio of elements. Metal Mo as a material of the first barrier layer 102p, metal Cu as a material of the first buffer stress layer 103p, metal Mo as a material of the second barrier layer 104p, metal Mo as a material of the third barrier layer 106p, metal Cu as a material of the second buffer stress layer 107p, metal TiN as a material of the fourth barrier layer 108p, metal Mo as a material of the fifth barrier layer 102n, and MoOxThe third buffer stress layer 103n is made of a material containing Mo as a sixth barrier layer 104n, a material containing Mo as a seventh barrier layer 106n, and MoOxThe material powders of the barrier layers and the buffer stress layers are weighed respectively to obtain a barrier layer powder and a buffer stress layer powder as a fourth buffer stress layer 107n material, TiN as an eighth barrier layer 108n material, metal Mo as a ninth barrier layer 110a material, metal Cu as a fifth buffer stress layer 111a material, and metal Mo as a tenth barrier layer 112a material.
ST 02: thermoelectric material powder, barrier layer powder, and buffer stress layer powder are sequentially laid in the order of the thermoelectric material layer, barrier layer, and buffer stress layer in a space surrounded by the mold 302, the upper ram 301, and the lower ram 306, and the first partition plate 303, the intermediate partition plate 305, and the second partition plate 304 separate the respective layers of the thermoelectric leg 10p and the respective layers of the thermoelectric leg 10n in the thermoelectric material powder, and are discharge plasma sintered to form a thermoelectric block (shown in fig. 9 and 10).
The upper pressing head 301 and the lower pressing head 306 are made of graphite. The material of the mold 302 includes graphite, alloy, and Al2O3Base ceramic, AlN base ceramic, Si3N4One or more of a base ceramic or a SiC-based ceramic. For example, the material of the mold 302 may be graphite or Al2O3The material of the mold 302 may be graphite, a mixture of alloys, or Al2O3Base ceramic, AlN base ceramic, Si3N4Mixtures of base ceramics, and the like. A first partition 303, a middle partition 305, a second partitionThe material of the two spacers 304 may be graphite or ceramic. In the embodiment of the present invention, the first partition 303, the middle partition 305, and the second partition 304 are made of the same material.
Specifically, for example, graphite is used as the material of the upper ram 301, the lower ram 306, the first partition plate 303, the intermediate partition plate 305, and the second partition plate 304, and a thermoelectric material powder, a barrier layer powder, and a buffer stress layer powder are sequentially laid in the order of the thermoelectric material layer, the barrier layer, and the buffer stress layer in the space surrounded by the mold 302, the upper ram 301, and the lower ram 306, and the first partition plate 303, the intermediate partition plate 305, and the second partition plate 304 separate the material powder of each layer of the p-type thermoelectric legs 10p and the material powder of each layer of the n-type thermoelectric legs 10n in the thermoelectric material powder, and are discharge plasma sintered to form the thermoelectric block.
ST 03: the thermoelectric block is cut to form the thermoelectric unit 10, and the phonon scattering layer 113a and the negative thermal expansion buffer layer 113b are alternately prepared layer by layer using a chemical vapor deposition method to form the insulating interlayer 113, and the thermoelectric unit 10 is mounted and fixed using the insulating interlayer 113 (shown in fig. 11 and 12).
In particular, for example, in SiO2ZrW is used as a material of the phonon scattering layer 113a2O8As the material of the negative thermal expansion buffer layer 113b, SiO is alternately prepared layer by adopting a chemical vapor deposition method2 Phonon scattering layer 113a and ZrW made of the material2O8The negative thermal expansion buffer layer 113b of a material forming the insulating interlayer 113; and the thermoelectric unit 10 is fixed by embedding the insulating interlayer 113, thereby completing the preparation of the thermoelectric unit 10.
2) Assembled thermoelectric module 20
ST 04: an eleventh barrier layer 110b, a sixth buffer stress layer 111b and a twelfth barrier layer 112b are electrodeposited between the convex section of the n-type low-temperature thermoelectric leg 109n and the convex section of the p-type low-temperature thermoelectric leg 109p of the adjacent thermoelectric units 10, and the thermoelectric units 10 are alternately stacked to obtain the thermoelectric module 20 (shown in fig. 13 to 16);
specifically, for example, TiN is used as a material of the eleventh barrier layer 110b, metal Cu is used as a material of the sixth buffer stress layer 111b, TiN is used as a material of the twelfth barrier layer 112b, TiN is electrodeposited between the n-type low-temperature thermoelectric leg 109n and the p-type low-temperature thermoelectric leg 109p of the adjacent thermoelectric unit 10 as the eleventh barrier layer 110b, metal Cu is used as the sixth buffer stress layer 111b, and TiN is used as the twelfth barrier layer 112b, and the thermoelectric units 10 are alternately stacked to obtain the thermoelectric module 20.
ST 05: first electrical output electrode 114p and second electrical output electrode 114n of thermoelectric module 20 are prepared by electroplating, respectively, and are connected to first electrical output lead 115p and second electrical output lead 115n, respectively (shown in fig. 17 and 18).
Specifically, for example, metal Cu is used as a material of the first electrical output electrode 114p and the second electrical output electrode 114n, and a pvc insulated copper core wire is used as the first electrical output wire 115p and the second electrical output wire 115 n. A metal Cu is electroplated on one p-type low temperature thermoelectric leg 109p of the two thermoelectric units 10 to be assembled to form a first electrical output electrode 114p and is connected in a soldered manner to a first electrical output lead 115 p. Plating metal Cu is electroplated on one n-type low temperature thermoelectric leg 109n of the two thermoelectric units 10 to be assembled to form a second electrical output electrode 114n, and a second electrical output lead 115n is connected in a soldered manner to complete the assembly of the thermoelectric module 20.
In addition, the first and second electrical output electrodes 114p, 114n can be formed by plasma spraying, evaporation, or sputtering.
3) Encapsulating inner package 201 and preparing outer package 202
ST 06: coating the carbon fibers on the outer surface of the thermoelectric module 20 by using high-temperature sealant to form an inner package 201; the outer surface of the inner package 201 is fixedly wrapped with the FeNi kovar alloy of the outer package 202 material, and the interface of the outer package 202 material is fixed by a sealant to form the outer package 202 (shown in fig. 19 and 20).
Of course, when the package structure is a single-layer package layer, the carbon fiber is coated on the outer surface of the thermoelectric module 20 by using a high-temperature sealant to form the single-layer package layer, or the coating material FeNi kovar alloy is fixed on the outer surface of the thermoelectric module 20, and the interface of the FeNi kovar alloy is fixed by using the sealant to form the single-layer package layer.
The ultra-fast preparation method of the high-performance thermoelectric device 1 provided by the embodiment of the invention adopts a hot-pressing process to combine the mold 302 and the partition plate to prepare the thermoelectric unit 10 through one-step molding, so that the direct sintering of the high-temperature-section thermoelectric material, the medium-temperature-section thermoelectric material and the low-temperature-section thermoelectric material, the barrier layer and the buffer stress layer is realized, the mutual diffusion among elements is reduced, the bonding strength and the thermal matching degree between the segmented thermoelectric device layers are enhanced, and the contact resistance is reduced.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims (12)

1. A high-performance thermoelectric device (1), characterized in that the high-performance thermoelectric device (1) comprises a thermoelectric module (20), the thermoelectric module (20) being formed by sequentially stacking a thermoelectric unit (10) and an insulating interlayer (113); the thermoelectric unit (10) comprises a p-type thermoelectric leg (10p) and an n-type thermoelectric leg (10 n); the p-type thermoelectric leg (10p) comprises a p-type high-temperature thermoelectric leg (101p), a first barrier layer (102p), a first buffer stress layer (103p), a second barrier layer (104p), a p-type medium-temperature thermoelectric leg (105p), a third barrier layer (106p), a second buffer stress layer (107p), a fourth barrier layer (108p) and a p-type low-temperature thermoelectric leg (109p) which are sequentially arranged from top to bottom; the n-type thermoelectric leg (10n) comprises an n-type high-temperature thermoelectric leg (101n), a fifth barrier layer (102n), a third buffer stress layer (103n), a sixth barrier layer (104n), an n-type medium-temperature thermoelectric leg (105n), a seventh barrier layer (106n), a fourth buffer stress layer (107n), an eighth barrier layer (108n) and an n-type low-temperature thermoelectric leg (109n) which are sequentially arranged from top to bottom; the p-type high-temperature thermoelectric leg (101p) and the n-type high-temperature thermoelectric leg (101n) are connected through a ninth barrier layer (110a), a fifth buffer stress layer (111a) and a tenth barrier layer (112a) to form the thermoelectric unit (10), the n-type low-temperature thermoelectric leg (109n) and the p-type low-temperature thermoelectric leg (109p) adjacent to the thermoelectric unit (10) are fixedly connected through an eleventh barrier layer (110b), a sixth buffer stress layer (111b) and a twelfth barrier layer (112b) and are inlaid by adopting the insulating interlayer (113) to form the thermoelectric module (20); the p-type low-temperature thermoelectric legs (109p) and the n-type low-temperature thermoelectric legs (109n) on two sides of the bottom end of the thermoelectric module (20) are respectively provided with a first electrical output electrode (114p) and a second electrical output electrode (114n), the first electrical output electrode (114p) is connected with a first electrical output lead (115p), and the second electrical output electrode (114n) is connected with a second electrical output lead (115 n);
the insulating interlayer (113) comprises a phonon scattering layer (113a) and a negative thermal expansion buffer layer (113b), and the phonon scattering layer (113a) and the negative thermal expansion buffer layer (113b) are sequentially stacked;
the phonon scattering layer (113a) is a nano insulating particle layer, the thickness of the phonon scattering layer (113a) is in a value range of [1nm,100nm ], the number of layers of the phonon scattering layer (113a) is in a value range of [10,10000], the thickness of the negative thermal expansion buffer layer (113b) is in a value range of [1nm,100nm ], and the number of layers of the negative thermal expansion buffer layer (113b) is in a value range of [10,10000 ].
2. The high-performance thermoelectric device (1) as claimed in claim 1, wherein said high-performance thermoelectric device (1) is a square structure, and a plurality of said high-performance thermoelectric devices (1) are combined in series, parallel or series-parallel.
3. High performance thermoelectric device (1) according to claim 1, characterized in that the material of the p-type high temperature thermoelectric leg (101p) comprises p-type SiGe based material, p-type CoSb3Base material, p-type SnSe base material, p-type PbSe base material and p-type Cu2Se-based material, p-type BiCuSeO-based material, p-type Half-Heusler material, p-type Cu (In, Ga) Te2Material, p-type FeSi2Base material, CrSi2、MnSi1.73CoSi, p-type Cu1.8An S-based material or a p-type oxide material;
the p-type medium-temperature thermoelectric leg (105p) is made of p-type PbTe base materials and p-type CoSb3Base material, p-type Half-Heusler material, p-type Cu1.8S-based material or p-type AgSbTe2A base material;
the material of the p-type low-temperature thermoelectric leg (109p) comprises p-type Bi2Te3Base material, p-type Sb2Se3Base material or p-type Sb2Te3A base material;
the n-type high-temperature thermoelectric leg (101n) is made of n-type SiGe-based material or n-type CoSb3Base material, n-type SnSe base material, n-type SnTe base material, n-type Cu2Se-based materials, n-type Half-Heusler materials or n-type oxide materials;
the n-type medium-temperature thermoelectric leg (105n) comprises n-type PbTe-based materials, n-type PbS-based materials and n-type CoSb3Base material, n-type Mg2Si-based material, n-type Zn4Sb3Base material, n-type InSb base material, n-type Half-Heusler material, n-type oxide material or n-type AgSbTe2A base material;
the material of the n-type low-temperature thermoelectric leg (109n) comprises n-type Bi2Te3Base material, n-type BiSb base material and n-type Zn4Sb3Base material, n-type Mg3Sb2Base material, n-type Bi2Se3Base material or n-type Sb2Se3A base material.
4. The high performance thermoelectric device (1) according to claim 1, wherein the thicknesses of said first barrier layer (102p), said second barrier layer (104p), said third barrier layer (106p), said fourth barrier layer (108p), said fifth barrier layer (102n), said sixth barrier layer (104n), said seventh barrier layer (106n), said eighth barrier layer (108n), said ninth barrier layer (110a), said tenth barrier layer (112a), said eleventh barrier layer (110b), said twelfth barrier layer (112b) all have a value in the range of [0.01mm,0.1mm ];
the first barrier layer (102p), the second barrier layer (104p), the third barrier layer (106p), the fourth barrier layer (108p), the fifth barrier layer (102n), the sixth barrier layer (104n), the seventh barrier layer (106n), the eighth barrier layer (108n), the ninth barrier layer (110a), the tenth barrier layer (112a), the eleventh barrier layer (110b), the twelfth barrier layer (112b) are all in the form of powder, a thin film or a foil;
the first barrier layer (102p), the second barrier layer (104p), the third barrier layer (106p), the fourth barrier layer (108p), the fifth barrier layer (102n), the sixth barrier layer (104n), the seventh barrier layer (106n), the eighth barrier layer (108n), the ninth barrier layer (110a), the tenth barrier layer (112a), the eleventh barrier layer (110b), and the twelfth barrier layer (112b) are made of one or more of gold, silver, tantalum, copper, titanium nitride, titanium tungsten, nickel, or molybdenum;
the first barrier layer (102p) and the ninth barrier layer (110a) are made of the same material; the second barrier layer (104p) and the third barrier layer (106p) are made of the same material; the fourth barrier layer (108p) and the twelfth barrier layer (112b) are made of the same material; the fifth barrier layer (102n) and the tenth barrier layer (112a) are made of the same material; the sixth barrier layer (104n) and the seventh barrier layer (106n) are made of the same material; the eighth barrier layer (108n) and the eleventh barrier layer (110b) are made of the same material;
the thicknesses of the first buffer stress layer (103p), the second buffer stress layer (107p), the third buffer stress layer (103n), the fourth buffer stress layer (107n), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are in the range of [0.01mm,0.1mm ];
the first buffer stress layer (103p), the second buffer stress layer (107p), the third buffer stress layer (103n), the fourth buffer stress layer (107n), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are all in the form of powder, a film or a foil;
the first buffer stress layer (103p), the second buffer stress layer (107p), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are made of one or more of copper, platinum, nickel and copper-molybdenum alloy, and the first buffer stress layer (103p), the second buffer stress layer (107p), the fifth buffer stress layer (111a) and the sixth buffer stress layer (111b) are made of the same material;
the third buffer stress layer (103n) and the fourth buffer stress layer (107n) are made of one or more of molybdenum oxide, copper, platinum, nickel and copper-molybdenum alloy, and the third buffer stress layer (103n) and the fourth buffer stress layer (107n) are made of the same material.
5. The high performance thermoelectric device (1) according to claim 1, wherein the first electrical output electrode (114p) and the second electrical output electrode (114n) are made of one or more of gold, palladium, platinum, aluminum, copper, nickel and titanium, and the first electrical output electrode (114p) and the second electrical output electrode (114n) are made of the same material;
the first electrical output lead (115p) and the second electrical output lead (115n) are both made of polyvinyl chloride insulated copper core leads.
6. The high performance thermoelectric device (1) as claimed in claim 1, wherein said insulating interlayer (113) is inlay-fixed between adjacent p-type thermoelectric legs (10p) and n-type thermoelectric legs (10 n).
7. The high performance thermoelectric device (1) according to claim 1, wherein said high performance thermoelectric device (1) further comprises an encapsulation structure comprising two layers, an inner encapsulation (201) and an outer encapsulation (202), respectively, an outer surface of said thermoelectric module (20) being provided with said inner encapsulation (201), an outer surface of said inner encapsulation (201) being provided with said outer encapsulation (202); said first electrical output lead (115p) accessing said first electrical output electrode (114p) through said outer package (202) and said inner package (201), said second electrical output lead (115n) accessing said second electrical output electrode (114n) through said outer package (202) and said inner package (201); or
The encapsulation structure comprises a single encapsulation layer arranged on the outer surface of the thermoelectric module (20), the first electrical output lead (115p) being routed through the single encapsulation layer to the first electrical output electrode (114p), and the second electrical output lead (115n) being routed through the single encapsulation layer to the second electrical output electrode (114 n).
8. The high performance thermoelectric device (1) as claimed in claim 7, wherein said insulating interlayer (113) is disposed opposite to the left and right and between said thermoelectric module (20) and said inner package (201); or
The insulating interlayers (113) are oppositely arranged at the left and the right and are positioned between the thermoelectric module (20) and the single-layer packaging layer.
9. The high performance thermoelectric device (1) according to claim 6 or 8, characterized in that the material of said phonon scattering layer (113a) comprises SiO2、Al2O3、AlN、MgO、TiO2、Si3N4Or SiC;
the material of the negative thermal expansion buffer layer (113b) comprises BaTiO3、PbTiO3、LaCrO3、ZrW2O8、ZrV2O7Or HfW2O8One or more of (a).
10. The high performance thermoelectric device (1) as claimed in claim 7, wherein when said encapsulation structure comprises two layers, the material of said inner encapsulation (201) comprises carbon fiber or graphite-epoxy resin heat-conducting composite material, and the material of said outer encapsulation (202) comprises FeNi Kovar alloy.
11. A method for ultra-fast manufacturing a high-performance thermoelectric device (1), the method comprising:
weighing single substance powder according to the stoichiometric ratio of elements in a p-type high-temperature thermoelectric leg (101p), a p-type intermediate-temperature thermoelectric leg (105p), a p-type low-temperature thermoelectric leg (109p), an n-type high-temperature thermoelectric leg (101n), an n-type intermediate-temperature thermoelectric leg (105n) and an n-type low-temperature thermoelectric leg (109n) to obtain thermoelectric material powder, and weighing the material powder of each layer of a first barrier layer (102p), a second barrier layer (104p), a third barrier layer (106p), a fourth barrier layer (108p), a fifth barrier layer (102n), a sixth barrier layer (104n), a seventh barrier layer (106n), an eighth barrier layer (108n), a ninth barrier layer (110a) and a tenth barrier layer (112a) to obtain barrier layer powder; respectively weighing material powder of each layer of a first buffer stress layer (103p), a second buffer stress layer (107p), a third buffer stress layer (103n), a fourth buffer stress layer (107n) and a fifth buffer stress layer (111a) to obtain buffer stress layer powder;
sequentially paving thermoelectric material powder, barrier layer powder and buffer stress layer powder in a space surrounded by a die (302), an upper pressure head (301) and a lower pressure head (306) according to the sequence of a thermoelectric material layer, a barrier layer and a buffer stress layer, separating the material powder of each layer of a p-type thermoelectric leg (10p) and the material powder of each layer of an n-type thermoelectric leg (10n) in the thermoelectric material powder by using a first partition plate (303), a middle partition plate (305) and a second partition plate (304), and performing discharge plasma sintering to form a thermoelectric block body;
cutting the thermoelectric block to form a thermoelectric unit (10);
alternately preparing a phonon scattering layer (113a) and a negative thermal expansion buffer layer (113b) layer by adopting a chemical vapor deposition method to form an insulating interlayer (113), and inlaying and fixing the thermoelectric unit (10) by utilizing the insulating interlayer (113);
electroplating and depositing an eleventh barrier layer (110b), a sixth buffer stress layer (111b) and a twelfth barrier layer (112b) between the convex section of the n-type low-temperature thermoelectric leg (109n) and the convex section of the p-type low-temperature thermoelectric leg (109p) of the adjacent thermoelectric unit (10), and alternately stacking the thermoelectric units (10) to obtain a thermoelectric module (20);
respectively preparing a first electrical output electrode (114p) and a second electrical output electrode (114n) of the thermoelectric module (20) by electroplating, and respectively connecting a first electrical output lead (115p) and a second electrical output lead (115 n);
coating carbon fibers on the outer surface of the thermoelectric module (20) by adopting high-temperature sealant to form an inner package (201);
and fixedly wrapping FeNi kovar alloy which is the material of the outer package (202) on the outer surface of the inner package (201), and fixing the interface of the material of the outer package (202) by using a sealant to form the outer package (202).
12. The ultra-fast manufacturing method of the high-performance thermoelectric device (1) as claimed in claim 11, wherein the upper ram (301) and the lower ram (306) are made of graphite;
the material of the die (302) comprises graphite, alloy and Al2O3Base ceramic, AlN base ceramic, Si3N4One or more of a base ceramic or a SiC-based ceramic;
the first partition plate (303), the middle partition plate (305) and the second partition plate (304) are made of graphite or ceramic, and the first partition plate (303), the middle partition plate (305) and the second partition plate (304) are made of the same material.
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