CN107871783B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN107871783B
CN107871783B CN201710822062.4A CN201710822062A CN107871783B CN 107871783 B CN107871783 B CN 107871783B CN 201710822062 A CN201710822062 A CN 201710822062A CN 107871783 B CN107871783 B CN 107871783B
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nitride semiconductor
semiconductor layer
heterojunction
main surface
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CN107871783A (zh
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富田英干
兼近将一
上田博之
森朋彦
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Denso Corp
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Denso Corp
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Abstract

本发明提供半导体装置及其制造方法，在具备纵型漂移区域(即，JFET区域)的半导体装置中，改善耐压与接通电阻之间存在的此消彼长的关系。半导体装置(1)具备在氮化物半导体层(20)的表面上的一部分设置的异质接合区域(42)。异质接合区域(42)与纵型漂移区域(21b)向氮化物半导体层(20)的表面露出的范围的至少一部分接触，且具有比纵型漂移区域(21b)宽的带隙。在异质接合区域(42)与纵型漂移区域(21b)之间的异质接合界面形成二维电子气体，接通电阻下降。

Description

半导体装置及其制造方法
技术领域
本说明书公开的技术涉及半导体装置及其制造方法。
背景技术
图9所示的以往的半导体装置100具备N型的氮化物半导体基板110、层叠在氮化物半导体基板110上的氮化物半导体层120、将氮化物半导体基板110的背面覆盖的漏电极132、将氮化物半导体层120的表面覆盖的源电极134、及在氮化物半导体层120的表面上的一部分设置的绝缘栅极部136。氮化物半导体层120具有N型的漂移区域121、P型的基极区域122、P型的沟道区域123、P型的接触区域124及N型的源极区域125。漂移区域121由横型漂移区域121a和纵型漂移区域121b构成，该纵型漂移区域121b向氮化物半导体层120的表面露出。在本说明书中，有时也将纵型漂移区域121b特别称为JFET区域。
基极区域122配置在横型漂移区域121a与沟道区域123之间，包含高浓度的P型杂质，为了抑制在关断(off)时沟道区域123穿通而形成。沟道区域123配置在与纵型漂移区域121b相邻的位置，向氮化物半导体层120的表面露出。接触区域124向氮化物半导体层120的表面露出，并与源电极134电连接。源极区域125被沟道区域123从纵型漂移区域121b隔开，向氮化物半导体层120的表面露出，并与源电极134电连接。绝缘栅极部136的栅电极136b隔着栅极绝缘膜136a与将纵型漂移区域121b和源极区域125隔开的部分的沟道区域123对向。绝缘栅极部136的栅电极136b通过层间绝缘膜152而从源电极134绝缘分离。
在该半导体装置100接通(on)时，通过栅电极136b的电位而在将纵型漂移区域121b和源极区域125隔开的部分的沟道区域123形成反转层，经由该反转层从源极区域125向纵型漂移区域121b流入电子。流入到纵型漂移区域121b的电子在纵型漂移区域121b中沿纵向流动而前往漏电极132。由此，漏电极132与源电极134导通。
在半导体装置100关断时，耗尽层从基极区域122及沟道区域123向纵型漂移区域121b内延伸。纵型漂移区域121b被设计成，在半导体装置100关断时，纵型漂移区域121b通过从两侧延伸的耗尽层相连而成为夹断的状态。通过纵型漂移区域121b夹断，向绝缘栅极部136的栅极绝缘膜136a施加的电场得到缓和，栅极绝缘膜136a的绝缘破坏受到抑制，半导体装置100的耐压提高。需要说明的是，当半导体装置100接通时，纵型漂移区域121b、基极区域122及沟道区域123的电位大致相等，耗尽层消失。由N型的纵型漂移区域121b和P型的基极区域122构成了JFET构造，且由N型的纵型漂移区域121b和P型的沟道区域123构成了JFET构造。专利文献1公开了具有纵型漂移区域(即，JFET区域)的半导体装置的一例。
在先技术文献
专利文献
专利文献1：日本特开2015-041719号公报
发明内容
发明所要解决的课题
为了在半导体装置100关断时纵型漂移区域121b良好地夹断而抑制栅极绝缘膜136a的绝缘破坏，优选的是将纵型漂移区域121b的杂质浓度设定得低。然而，若纵型漂移区域121b的杂质浓度低，则纵型漂移区域121b的电阻升高，半导体装置100的接通电阻增加。
这样，在具有纵型漂移区域的半导体装置中，在耐压与接通电阻之间存在此消彼长(trade-off)的关系。尤其是，使用了氮化物半导体的半导体装置为了充分地发挥氮化物半导体具有的高绝缘破坏电场这一特性而将氮化物半导体层的厚度设计得比较薄，在向栅极绝缘膜施加高电场的条件下使用。因此，在使用了氮化物半导体的半导体装置中，尤其强烈地希望开发出改善上述的此消彼长关系的技术。
用于解决课题的手段
本说明书公开的半导体装置具备：氮化物半导体层；绝缘栅极部，设置于氮化物半导体层的一方的主面上的一部分；及异质接合区域，设置于氮化物半导体层的所述主面上的另外的一部分。氮化物半导体层具有N型的纵型漂移区域、P型的沟道区域及N型的源极区域。纵型漂移区域向氮化物半导体层的所述主面露出。沟道区域与纵型漂移区域相邻，并向氮化物半导体层的所述主面露出。源极区域被沟道区域从纵型漂移区域隔开，并向氮化物半导体层的所述主面露出。绝缘栅极部与将纵型漂移区域和源极区域隔开的沟道区域对向。异质接合区域与纵型漂移区域向氮化物半导体层的所述主面露出的范围的至少一部分接触，是具有比纵型漂移区域的带隙宽的带隙的N型或I型的氮化物半导体。
在上述半导体装置中，纵型漂移区域与异质接合区域进行异质接合，在纵型漂移区域的表面部生成二维电子气体。在二维电子气体中存在高密度的电子载体，因此纵型漂移区域的表面部的电阻大幅下降。由此，半导体装置的接通电阻下降。换言之，上述半导体装置即使为了良好地夹断而将纵型漂移区域的杂质浓度设定得低，也能够具有低的接通电阻。这样，上述半导体装置能够改善耐压与接通电阻之间的此消彼长关系。
本说明书公开的半导体装置的制造方法包括异质接合层的形成工序、蚀刻工序、沟道区域形成工序、源极区域形成工序及绝缘栅极部形成工序。在异质接合层的形成工序中，在N型的氮化物半导体层的一方的主面上形成具有比氮化物半导体层的带隙宽的带隙的N型或I型的异质接合层。在蚀刻工序中，对异质接合层的一部分进行蚀刻来形成与氮化物半导体层进行异质接合的异质接合区域，并在与所述异质接合区域相邻的位置使所述氮化物半导体层的所述主面露出。在沟道区域形成工序中，朝向通过蚀刻工序而露出的所述主面照射P型的杂质，形成向所述主面露出的沟道区域。在源极区域形成工序中，朝向在沟道区域内向所述主面露出的所述氮化物半导体层的一部分照射N型的杂质，形成向氮化物半导体层的所述主面露出的源极区域。在绝缘栅极部形成工序中，在氮化物半导体层的所述主面上形成绝缘栅极部，该绝缘栅极部与将异质接合区域和源极区域隔开的沟道区域对向。
根据上述半导体装置的制造方法，通过在与通过蚀刻工序而残留的异质接合区域相邻的位置形成沟道区域，能够在残留的异质接合区域的下方选择性地形成纵型漂移区域。换言之，能够在纵型漂移区域的主面上选择性地形成异质接合区域。这样，根据上述半导体装置的制造方法，能够容易地进行纵型漂移区域与异质接合区域的对位。
附图说明
图1示意性地示出半导体装置的主要部分剖视图。
图2示意性地示出半导体装置的一个制造过程中的半导体装置的主要部分剖视图。
图3示意性地示出半导体装置的一个制造过程中的半导体装置的主要部分剖视图。
图4示意性地示出半导体装置的一个制造过程中的半导体装置的主要部分剖视图。
图5示意性地示出半导体装置的一个制造过程中的半导体装置的主要部分剖视图。
图6示意性地示出半导体装置的一个制造过程中的半导体装置的主要部分剖视图。
图7示意性地示出半导体装置的一个制造过程中的半导体装置的主要部分剖视图。
图8示意性地示出变形例的半导体装置的主要部分剖视图。
图9示意性地示出以往的半导体装置的主要部分剖视图。
具体实施方式
如图1所示，半导体装置1具备：N型的氮化物半导体基板10、氮化物半导体层20，层叠在氮化物半导体基板10上；异质接合区域42，层叠在氮化物半导体层20的表面上的一部分；漏电极32，将氮化物半导体基板10的背面覆盖；源电极34，将氮化物半导体层20的表面覆盖；及绝缘栅极部36，设置在氮化物半导体层20的表面上的一部分。氮化物半导体层20具有N型的漂移区域21、P型的基极区域22、P型的沟道区域23、P型的接触区域24及N型的源极区域25。漂移区域21由横型漂移区域21a和纵型漂移区域21b构成，该纵型漂移区域21b向氮化物半导体层20的表面露出。异质接合区域42不是氮化物半导体层20的一部分，而是形成于氮化物半导体层20的上侧的主面的一部分。
氮化物半导体基板10以包含高浓度的N型杂质的氮化镓(GaN)为材料。漏电极32与氮化物半导体基板10的背面整体进行欧姆接触。氮化物半导体基板10是用于供氮化物半导体层20进行外延生长的基底基板。
氮化物半导体层20在氮化物半导体基板10上进行外延生长而堆积。氮化物半导体层20以包含比氮化物半导体基板10低的浓度的N型杂质的氮化镓(GaN)为材料。在氮化物半导体层20形成有后述的多个种类的扩散区域。
漂移区域21构成为在氮化物半导体层20形成了多个种类的扩散区域后的剩余部分，具有横型漂移区域21a及纵型漂移区域21b。横型漂移区域21a配置在氮化物半导体基板10上。纵型漂移区域21b以具有从横型漂移区域21a沿纵向突出的凸状的形态的方式配置在横型漂移区域21a上，且向氮化物半导体层20的表面的一部分露出。在从与氮化物半导体层20的表面正交的方向(纸面上下方向)观察时，纵型漂移区域21b沿着长度方向(纸面进深方向)呈直线状地延伸。
基极区域22配置在横型漂移区域21a与沟道区域23之间，并配置在纵型漂移区域21b的两侧。基极区域22包含比沟道区域23高的浓度的P型杂质，为了抑制在关断时沟道区域23穿通而形成。基极区域22通过利用离子注入技术朝向氮化物半导体层20的表面照射镁而形成。
沟道区域23配置在基极区域22上，配置在纵型漂移区域21b的两侧，并向氮化物半导体层20的表面露出。沟道区域23通过利用离子注入技术朝向氮化物半导体层20的表面照射镁而形成。
接触区域24配置在沟道区域23上，并向氮化物半导体层20的表面露出。接触区域24包含高浓度的P型杂质，与源电极34进行欧姆接触。接触区域24通过利用离子注入技术朝向氮化物半导体层20的表面照射镁而形成。
源极区域25配置在沟道区域23上，被沟道区域23从漂移区域21隔开，并向氮化物半导体层20的表面露出。源极区域25包含高浓度的N型杂质，与源电极34进行欧姆接触。源极区域25通过利用离子注入技术朝向氮化物半导体层20的表面照射硅而形成。
异质接合区域42设置在氮化物半导体层20的表面上的一部分。准确地说，异质接合区域42以与纵型漂移区域21b向氮化物半导体层20的表面露出的整个范围接触的方式设置。异质接合区域42以N型或I型的铝镓氮(AlGaN)为材料。由于异质接合区域42由铝镓氮(AlGaN)形成，纵型漂移区域21b由氮化镓(GaN)形成，因此异质接合区域42与纵型漂移区域21b进行异质接合。因此，在纵型漂移区域21b的表面部生成二维电子气体(2DEG)。需要说明的是，异质接合区域42的材料也可以是ZnAlGaN。
绝缘栅极部36设置在氮化物半导体层20的表面上的一部分，具有氧化硅的栅极绝缘膜36a及多晶硅的栅电极36b。详细而言，栅极绝缘膜36a覆盖将纵型漂移区域21b和源极区域25隔开的部分的沟道区域23的表面、异质接合区域42的侧面及异质接合区域42的表面的一部分。栅电极36b隔着栅极绝缘膜36a与将纵型漂移区域21b和源极区域25隔开的部分的沟道区域23对向，并经由栅极绝缘膜36a的开口与异质接合区域42的表面接触。需要说明的是，栅电极36b也可以根据需要而不与异质接合区域42接触。栅电极36b通过层间绝缘膜52而从源电极34绝缘分离。
接下来，说明半导体装置1的动作。在使用时，向漏电极32施加正电压，将源电极34接地。当向栅电极36b施加比栅极阈值高的正电压时，在将纵型漂移区域21b和源极区域25隔开的部分的沟道区域23形成反转层，半导体装置1开启。此时，经由反转层从源极区域25向纵型漂移区域21b流入电子。流入到纵型漂移区域21b的电子在该纵型漂移区域21b中沿纵向流动而前往漏电极32。由此，漏电极32与源电极34导通。在半导体装置1接通时，在纵型漂移区域21b的表面部生成二维电子气体。在二维电子气体中存在高密度的电子载体，因此纵型漂移区域21b的表面部的电阻大幅下降。由此，半导体装置1的接通电阻下降。
若将栅电极36b接地，则反转层消失，半导体装置1关闭。此时，耗尽层从基极区域22及沟道区域23向纵型漂移区域21b内延伸。纵型漂移区域21b通过从两侧延伸来的耗尽层相连而成为夹断的状态。通过纵型漂移区域21b夹断，向绝缘栅极部36的栅极绝缘膜36a施加的电场得到缓和，栅极绝缘膜36a的绝缘破坏受到抑制，半导体装置1能够具有高的耐压。
在半导体装置1中，为了使纵型漂移区域21b良好地夹断，纵型漂移区域21b的杂质浓度低。在这样的情况下，基于纵型漂移区域21b的杂质浓度的电阻升高。然而，在半导体装置1中，如上所述，在纵型漂移区域21b的表面部生成有电子载体的密度大的二维电子气体，由此，半导体装置1能够具有低的接通电阻。即，半导体装置1即使为了良好地夹断而将纵型漂移区域21b的杂质浓度设定得低，也能够具有低的接通电阻。其结果是，半导体装置1能够改善耐压与接通电阻之间的此消彼长关系。
此外，与图9所示的以往的半导体装置100进行对比可知，在半导体装置1中，在纵型漂移区域21b的表面不存在栅极绝缘膜36a。因此，本来就不存在该部分的栅极绝缘膜36a的绝缘破坏这一问题。在这一点上，半导体装置1也能够具有高耐压。
半导体装置1也可以在关断时以向栅电极36b施加负电压的方式来驱动。这种情况下，能够在半导体装置1关断时使二维电子气体消失，能够使纵型漂移区域21b更良好地夹断。
接下来，说明半导体装置1的制造方法。首先，如图2所示，利用外延生长技术使氮化物半导体层20堆积于氮化物半导体基板10的表面。
接下来，如图3所示，利用外延生长技术使异质接合层142堆积于氮化物半导体层20的表面。
接下来，如图4所示，在异质接合层142的表面上进行掩模54的图案形成，并对异质接合层142的一部分进行蚀刻。由此，在氮化物半导体层20的表面上的一部分残留异质接合区域42，位于该异质接合区域42的两侧方的氮化物半导体层20的表面露出。
接下来，如图5所示，在使掩模54残留的状态下，利用离子注入技术朝向露出的氮化物半导体层20的表面照射镁。通过调整离子注入时的射程距离及镁导入量而形成基极区域22及沟道区域23。这样，通过将在对异质接合层142进行蚀刻而使氮化物半导体层20的表面露出的工序和形成基极区域22及沟道区域23的工序中使用的掩模54一物多用，能够在残留的异质接合区域42的下方选择性地形成纵型漂移区域21b。换言之，能够在纵型漂移区域21b的表面上选择性地形成异质接合区域42。这样，通过将掩模54一物多用，能够容易地进行纵型漂移区域21b与异质接合区域42的对位。
接下来，如图6所示，利用离子注入技术形成接触区域24及源极区域25。例如，向接触区域24照射镁，向源极区域25照射硅。接下来，如图7所示，在氮化物半导体层20的表面的一部分形成绝缘栅极部36。最后，通过将漏电极32及源电极34覆膜，图1所示的半导体装置1完成。
(变形例)
图8所示的变形例的半导体装置2的特征在于还具备表面覆盖区域44。表面覆盖区域44以层叠的方式设置在异质接合区域42的表面。表面覆盖区域44以P型的氮化镓(GaN)为材料。栅电极36b经由栅极绝缘膜36a的开口与表面覆盖区域44的表面进行欧姆接触或肖特基接触。
在半导体装置2关断时，表面覆盖区域44的电位与栅电极36b的接地电位大致相同，表面覆盖区域44与异质接合区域42的接合面受到反向偏置，耗尽层从表面覆盖区域44朝向异质接合区域42延伸。通过该耗尽层，纵型漂移区域21b的表面部的二维电子气体消失。在上述的半导体装置1中，为了在关断时使二维电子气体消失，需要向栅电极36b施加负电压。另一方面，在半导体装置2中，由于设置有表面覆盖区域44，所以能够在将栅电极36b接地时即关断时使二维电子气体消失。因此，驱动半导体装置2的驱动装置无需生成负电压，所以能够通过简易的电路结构的驱动装置来驱动半导体装置2。
以下，对本说明书中公开的技术特征进行整理。需要说明的是，以下记载的技术要素是分别独立的技术要素，以单独或各种组合的方式发挥技术有用性，不限定于申请时权利要求记载的组合。
本说明书公开的半导体装置可以具备：氮化物半导体层；绝缘栅极部，设置在氮化物半导体层的一方的主面上的一部分；及异质接合区域，设置在氮化物半导体层的所述主面上的另外的一部分。氮化物半导体层可以具有N型的漂移区域、P型的沟道区域及N型的源极区域。漂移区域具有向氮化物半导体层的所述主面露出的纵型漂移区域。沟道区域将纵型漂移区域夹在中间而配置(配置在纵型漂移区域的相邻的位置)，并向氮化物半导体层的所述主面露出。源极区域被沟道区域从纵型漂移区域隔开，并向氮化物半导体层的所述主面露出。绝缘栅极部与将纵型漂移区域和源极区域隔开的沟道区域对向。在绝缘栅极部与半导体层之间也可以存在其他的层。异质接合区域与纵型漂移区域向氮化物半导体层的所述主面露出的范围的至少一部分接触，是具有比纵型漂移区域的带隙宽的带隙的N型或I型的氮化物半导体。
在上述半导体装置中，异质接合区域可以与纵型漂移区域向氮化物半导体层的所述主面露出的整个范围接触。这种情况下，在纵型漂移区域的表面部的大范围内生成二维电子气体，因此半导体装置能够具有更低的接通电阻。
上述半导体装置可以还具备表面覆盖区域，该表面覆盖区域是设置在异质接合区域上的P型的氮化物半导体。表面覆盖区域与绝缘栅极部的栅电极电连接。根据该半导体装置，能够在关断时使纵型漂移区域的表面部的二维电子气体消失。由此，纵型漂移区域能够良好地夹断。
以上，虽然详细地说明了本发明的具体例，但这些只不过是例示，不对权利要求书进行限定。权利要求书记载的技术包括对以上例示的具体例进行各种变形、变更而得到的技术。而且，本说明书或附图说明的技术要素以单独或各种组合的方式发挥技术有用性，不限定于申请时权利要求记载的组合。而且，本说明书或附图例示的技术能够同时实现多个目的，实现其中一个目的自身就具有技术有用性。
标号说明
1：半导体装置
10：氮化物半导体基板
20：氮化物半导体层
21：漂移区域
21a：横型漂移区域
21b：纵型漂移区域
22：基极区域
23：沟道区域
24：接触区域
25：源极区域
32：漏电极
34：源电极
36：绝缘栅极部
36a：栅极绝缘膜
36b：栅电极
42：异质接合区域
52：层间绝缘膜

Claims (4)

1.一种半导体装置，具备：
氮化物半导体层；
绝缘栅极部，设置于所述氮化物半导体层的一方的主面上的一部分；及
异质接合区域，设置于所述氮化物半导体层的所述主面上的另外的一部分，
所述氮化物半导体层具有：
N型的纵型漂移区域，向所述主面露出；
P型的沟道区域，与所述纵型漂移区域相邻，并向所述主面露出；及
N型的源极区域，被所述沟道区域从所述纵型漂移区域隔开，并向所述主面露出，
所述绝缘栅极部与将所述纵型漂移区域和所述源极区域隔开的所述沟道区域对向，
所述异质接合区域与所述纵型漂移区域向所述主面露出的范围的至少一部分接触，并且未设置在所述绝缘栅极部与所述沟道区域之间，是具有比所述纵型漂移区域的带隙宽的带隙的N型或I型的氮化物半导体。
2.根据权利要求1所述的半导体装置，
所述异质接合区域与所述纵型漂移区域向所述氮化物半导体层的所述主面露出的整个范围接触。
3.根据权利要求1或2所述的半导体装置，
还具备表面覆盖区域，该表面覆盖区域是设置在所述异质接合区域上的P型的氮化物半导体，
所述表面覆盖区域与所述绝缘栅极部的栅电极电连接。
4.一种半导体装置的制造方法，包括：
异质接合层的形成工序，在N型的氮化物半导体层的一方的主面上形成异质接合层，该异质接合层是具有比所述氮化物半导体层的带隙宽的带隙的N型或I型的氮化物半导体；
蚀刻工序，对所述异质接合层的一部分进行蚀刻，形成与所述氮化物半导体层进行异质接合的异质接合区域，并在与所述异质接合区域相邻的位置使所述氮化物半导体层的所述主面露出；
沟道区域形成工序，朝向通过所述蚀刻工序而露出的所述主面照射P型的杂质，形成向所述主面露出的沟道区域；
源极区域形成工序，朝向在所述沟道区域内向所述主面露出的所述氮化物半导体层的一部分照射N型的杂质，形成向所述主面露出的源极区域；及
绝缘栅极部形成工序，在所述氮化物半导体层的所述主面上形成绝缘栅极部，该绝缘栅极部与将所述异质接合区域和所述源极区域隔开的所述沟道区域对向。
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