CN107785332A - 半导体结构 - Google Patents

半导体结构 Download PDF

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Publication number
CN107785332A
CN107785332A CN201611123605.5A CN201611123605A CN107785332A CN 107785332 A CN107785332 A CN 107785332A CN 201611123605 A CN201611123605 A CN 201611123605A CN 107785332 A CN107785332 A CN 107785332A
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CN
China
Prior art keywords
chip
semiconductor structure
structure according
elastic component
dielectric layer
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CN201611123605.5A
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English (en)
Inventor
林柏均
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Nanya Technology Corp
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Nanya Technology Corp
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Publication of CN107785332A publication Critical patent/CN107785332A/zh
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Abstract

一种半导体结构，包含电子元件与板状结构。板状结构包含介电层结构与至少一弹性件。介电层结构具有装置区与围绕装置区的边缘区，其中电子元件设置在装置区上，边缘区具有至少一第一通孔。弹性件设置于第一通孔中。通过设置弹性件于边缘区中，由装置区传递至边缘区的应力将会被弹性件吸收，因而减少边缘区的翘曲程度，或使边缘区的翘曲消失。因此，凸块将不会接收到过大的应力，因而得以避免接点容易产生断路的问题。

Description

半导体结构
技术领域
本发明是有关于一种半导体结构。
背景技术
随着电子产业的蓬勃发展，电子产品亦逐渐进入多功能、高性能的研发方向。为满足半导体元件高积集度(Integration)以及微型化(Miniaturization)的要求，半导体封装结构的各项要求亦越来越高，而前所未见的问题亦可能伴随产生。举例来说，在半导体封装结构的线宽和间距(Pitch)越来越小的同时，接点变得容易产生断路。
为了进一步改善半导体封装结构的各项特性，相关领域莫不费尽心思开发。如何能提供一种具有较佳特性的半导体封装结构，实属当前重要研发课题之一，亦成为当前相关领域亟需改进的目标。
发明内容
本发明的一技术态样是在提供一种半导体结构，以解决接点容易产生断路的问题。
根据本发明一实施方式，一种半导体结构包含电子元件与板状结构。板状结构包含介电层结构与至少一弹性件。介电层结构具有装置区与围绕装置区的边缘区，其中电子元件设置在装置区上，边缘区具有至少一第一通孔。弹性件设置于第一通孔中。
于本发明的一或多个实施方式中，介电层结构具有相对的第一面与第二面，第一面与第二面裸露弹性件。
于本发明的一或多个实施方式中，弹性件凸出于第一面与第二面的至少其中的一者。
于本发明的一或多个实施方式中，介电层结构具有相对的第一面与第二面，弹性件的厚度大于或等于第一面与第二面之间的最小直线距离。
于本发明的一或多个实施方式中，弹性件的材质为聚酰亚胺(Polyimide，PI)。
于本发明的一或多个实施方式中，弹性件穿过介电层结构。
于本发明的一或多个实施方式中，弹性件相邻于装置区。
于本发明的一或多个实施方式中，电子元件在板状结构上的正投影与弹性件至少部分重叠。
于本发明的一或多个实施方式中，板状结构的长边为沿着第一方向，在第一方向上弹性件的中心与电子元件在板状结构上的正投影的外缘的距离小于5毫米。
于本发明的一或多个实施方式中，板状结构还包含图案化导电层，图案化导电层设置于介电层结构上。
于本发明的一或多个实施方式中，介电层结构还具有至少一第二通孔，板状结构还包含至少一导电盲孔，导电盲孔设置于第二通孔中且电性连接图案化导电层。
于本发明的一或多个实施方式中，介电层结构为核心层或中介层。
于本发明的于本发明的一或多个实施方式中，介电层结构包含核心层与至少一增层介电层。
于本发明的一或多个实施方式中，板状结构为晶片承载件，且电子元件包含晶片。
于本发明的一或多个实施方式中，电子元件还包含多个凸块，凸块连接晶片与板状结构，其中装置区的外缘由凸块中设置于最***者的设置位置定义。
于本发明的一或多个实施方式中，电子元件还包含晶片粘着层(DieAttachment)，晶片粘着层设置于晶片与板状结构之间，其中装置区的外缘由晶片在板状结构上的正投影的外缘定义。
于本发明的一或多个实施方式中，电子元件还包含晶片粘着层，晶片粘着层设置于晶片与板状结构之间，板状结构的长边为沿着第一方向，其中装置区小于晶片在板状结构上的正投影，且在第一方向上装置区的外缘与晶片在板状结构上的正投影的外缘的距离小于5毫米。
于本发明的一或多个实施方式中，板状结构为印刷电路板，且电子元件包含晶片承载件与设置于晶片承载件上的晶片。
于本发明的一或多个实施方式中，电子元件还包含连接晶片承载件与板状结构的多个凸块，其中装置区的外缘由凸块中设置于最***者的设置位置定义。
于本发明的一或多个实施方式中，板状结构为铜箔基板(Copper CladLaminate)。
因为晶片为设置于装置区上，因此装置区将会因为晶片的支持而不会产生严重的翘曲。然而，因为没有其他的支持物，边缘区的翘曲往往很严重。通过设置弹性件于边缘区中，由装置区传递至边缘区的应力将会被弹性件吸收，因而减少边缘区的翘曲程度，或使边缘区的翘曲消失。因此，凸块将不会接收到过大的应力，因而得以避免接点容易产生断路的问题。
附图说明
图1绘示依照本发明一实施方式的半导体结构的剖面示意图；
图2绘示依照本发明另一实施方式的半导体结构的剖面示意图；
图3绘示依照本发明另一实施方式的半导体结构的剖面示意图；
图4绘示依照本发明另一实施方式的半导体结构的剖面示意图；
图5绘示依照本发明另一实施方式的半导体结构的剖面示意图；
图6绘示依照本发明另一实施方式的半导体结构的剖面示意图；
图7绘示依照本发明另一实施方式的半导体结构的剖面示意图；
图8至图12绘示依照本发明一实施方式的半导体结构的制程各步骤的剖面示意图；
图13绘示依照本发明一实施方式的半导体结构与印刷电路板的剖面示意图。
具体实施方式
以下将以附图揭露本发明的多个实施方式，为明确说明起见，许多实务上的细节将在以下叙述中一并说明。然而，应了解到，这些实务上的细节不应用以限制本发明。也就是说，在本发明部分实施方式中，这些实务上的细节是非必要的。此外，为简化附图起见，一些已知惯用的结构与元件在附图中将以简单示意的方式绘示。
图1绘示依照本发明一实施方式的半导体结构100的剖面示意图。本发明不同实施方式提供一种半导体结构100。具体而言，半导体结构100为封装结构。
如图1所绘示，一种半导体结构100包含电子元件110与板状结构120。板状结构120包含介电层结构121与至少一弹性件129。介电层结构121具有装置区122与围绕装置区122的边缘区123，其中电子元件110设置在装置区122上，边缘区123具有至少一第一通孔123t。弹性件129设置于第一通孔123t中。
具体而言，电子元件110包含晶片111与多个凸块112。凸块112连接晶片111与板状结构120。板状结构120为晶片承载件。
具体而言，介电层结构121还具有至少一第二通孔121t。板状结构120还包含两个图案化导电层124与至少一导电盲孔125。两个图案化导电层124分别设置于介电层结构121的两侧。导电盲孔125设置于第二通孔121t中且电性连接图案化导电层124。
板状结构120还包含多个凸块126。凸块126设置于设置在介电层结构121相对于电子元件110的一侧上的图案化导电层124上。
因为晶片111与板状结构120具有不同的热膨胀系数，晶片111与板状结构120之间的热膨胀系数不匹配将会导致板状结构120的翘曲。当板状结构120设置于印刷电路板上时，板状结构120的翘曲将会产生应力于凸块126上，因而导致凸块126容易损坏，接点容易产生断路。
因为晶片111为设置于装置区122上，因此装置区122将会因为晶片111的支持而不会产生严重的翘曲。然而，因为没有其他的支持物，边缘区123的翘曲往往很严重。通过设置弹性件129于边缘区123中，由装置区122传递至边缘区123的应力将会被弹性件129吸收，因而减少边缘区123的翘曲程度，或使边缘区123的翘曲消失。因此，凸块126将不会接收到过大的应力，因而得以避免接点容易产生断路的问题。
具体而言，弹性件129相邻于装置区122。应了解到，以上所举的弹性件129的具体实施方式仅为例示，而非用以限制本发明，本发明所属技术领域中具有通常知识者，可依实际需要，弹性选择弹性件129的具体实施方式。
具体而言，弹性件129的材质为聚酰亚胺(Polyimide，PI)。应了解到，以上所举的弹性件129的材质仅为例示，而非用以限制本发明，本发明所属技术领域中具有通常知识者，可依实际需要，弹性选择弹性件129的材质。
在本实施方式中，介电层结构121为核心层，但此并不限制本发明。在其他实施方式中，介电层结构121可为中介层，例如玻璃材质的中介层或者硅材质的中介层。
具体而言，板状结构120为铜箔基板(Copper Clad Laminate)。设置于介电层结构121的两侧的图案化导电层124的材质为铜。
具体而言，介电层结构121具有相对的第一面121a与第二面121b，第一面121a与第二面121b裸露弹性件129。换句话说，弹性件129穿过介电层结构121。
在本实施方式中，弹性件129的厚度约等于第一面121a与第二面121b之间的最小直线距离，但此并不限制本发明。在其他实施方式中，弹性件129的厚度可能大于第一面121a与第二面121b之间的最小直线距离。
具体而言，电子元件110在板状结构120上的正投影与弹性件129至少部分重叠。在本实施方式中，板状结构120的长边为沿着第一方向D，在第一方向D上弹性件129的中心与电子元件110在板状结构120上的正投影的外缘的距离G1小于5毫米。应了解到，以上所举的电子元件110与板状结构120的具体实施方式仅为例示，而非用以限制本发明，本发明所属技术领域中具有通常知识者，可依实际需要，弹性选择电子元件110与板状结构120的具体实施方式。
在本实施方式中，装置区122的外缘由凸块112中设置于最***者的设置位置定义。具体而言，装置区122的外缘由凸块112中设置于最***者在板状结构120上的正投影的外缘定义。
板状结构120还包含两个防焊层127，防焊层127分别覆盖设置于介电层结构121的两侧上的两个图案化导电层124。
图2绘示依照本发明另一实施方式的半导体结构100的剖面示意图。如图2所绘示，本实施方式的半导体结构100与图1的半导体结构100大致相同，两者的主要差异在于，在本实施方式中，弹性件129凸出于第一面121a。因此，弹性件129的厚度大于第一面121a与第二面121b之间的最小直线距离，但此并不限制本发明。在其他实施方式中，弹性件129可能凸出于第一面121a与第二面121b的至少其中的一者。
进一步来说，因为弹性件129凸出于第一面121a，且部分的弹性件129为嵌设于防焊层127中，因此这部分的弹性件129将具有与防焊层127相同的功能。换句话说，嵌设于防焊层127中的此部分的弹性件129亦具有保护图案化导电层124的功能。
图3绘示依照本发明另一实施方式的半导体结构100的剖面示意图。如图3所绘示，本实施方式的半导体结构100与图1的半导体结构100大致相同，两者的主要差异在于，在本实施方式中，半导体结构100还包含封装层130。封装层130设置于板状结构120面对电子元件110的一侧并覆盖电子元件110。在本实施方式中，封装层130亦设置于防焊层127上且覆盖晶片111。
封装层130的材质为封胶胶材(Molding Compound)。具体而言，封装层130的材质为环氧树脂。应了解到，以上所举的封装层130的材质仅为例示，并非用以限制本发明，本发明所属技术领域中具有通常知识者，应视实际需要，弹性选择封装层130的材质。
图4绘示依照本发明另一实施方式的半导体结构100的剖面示意图。如图4所绘示，本实施方式的半导体结构100与图1的半导体结构100大致相同，两者的主要差异在于，在本实施方式中，介电层结构121包含核心层128a与至少一增层介电层128b。进一步来说，图案化导电层124的数量可能大于两个，并且一些图案化导电层124设置于核心层128a与增层介电层128b之间，或者设置于增层介电层128b与增层介电层128b之间(假如增层介电层128b的数量大于两个)。介电层结构121还包含至少一盲孔121h与至少一埋孔(未绘示)，并且在此实施方式中可能没有第二通孔121t。导电盲孔125设置于盲孔121h中。
图5绘示依照本发明另一实施方式的半导体结构100的剖面示意图。如图5所绘示，本实施方式的半导体结构100与图1的半导体结构100大致相同，两者的主要差异在于，在本实施方式中，电子元件110包含晶片111与晶片粘着层(Die Attachment)113，晶片粘着层113设置于晶片111与板状结构120之间。装置区122的外缘由晶片111在板状结构120上的正投影的外缘定义。
进一步来说，半导体结构100还包含至少一接合导线140。接合导线140连接晶片111与设置于介电层结构121面对电子元件110的一侧上的图案化导电层124。
此外，在本实施方式中，弹性件129没有凸出于第一面121a与第二面121b的至少其中的一者。但此并不限制本发明。在其他实施方式中，弹性件129可能凸出于第一面121a与第二面121b的至少其中的一者。
具体而言，晶片粘着层113可为粘着胶或者粘着薄膜。应了解到，以上所举的晶片粘着层113的具体实施方式仅为例示，并非用以限制本发明，本发明所属技术领域中具有通常知识者，应视实际需要，弹性选择晶片粘着层113的具体实施方式。
图6绘示依照本发明另一实施方式的半导体结构100的剖面示意图。如图6所绘示，本实施方式的半导体结构100与图5的半导体结构100大致相同，两者的主要差异在于，在本实施方式中，装置区122小于晶片111在板状结构120上的正投影，且在第一方向D上装置区122的外缘与晶片111在板状结构120上的正投影的外缘的距离G2小于5毫米。
图7绘示依照本发明另一实施方式的半导体结构100的剖面示意图。如图7所绘示，本实施方式的半导体结构100与图5的半导体结构100大致相同，两者的主要差异在于，在本实施方式中，装置区122还具有窗口122w。窗口122w将晶片111裸露至板状结构120相对于电子元件110的一侧。另外，半导体结构100并没有包含接合导线140。取而代之地，半导体结构100还包含至少一接合导线141。接合导线141连接晶片111与设置于介电层结构121相对于电子元件110的一侧上的图案化导电层124。
图8至图12绘示依照本发明一实施方式的半导体结构100的制程各步骤的剖面示意图。如图8所绘示，提供介电层结构121(在本实施方式中，介电层结构121为核心层)。然后，形成至少一第一通孔123t于介电层结构121上。
具体而言，第一通孔123t为通过雷射钻孔或机械钻孔形成。应了解到，以上所举的第一通孔123t的形成方法仅为例示，并非用以限制本发明，本发明所属技术领域中具有通常知识者，应视实际需要，弹性选择第一通孔123t的形成方法。
如图9所绘示，形成至少一弹性件129于第一通孔123t中。在本实施方式中，弹性件129的材质为聚酰亚胺。弹性件129可通过先填充溶液态聚酰亚胺于第一通孔123t中，再加热固化溶液态聚酰亚胺而形成。
然后，如图10所绘示，形成两个导电层124p于介电层结构121的两侧。在本实施方式中，导电层124p的材质为铜。导电层124p为通过金属热压而形成于介电层结构121的两侧。
如图10与图11所绘示，形成至少一第二通孔121t于介电层结构121中。然后，形成至少一导电盲孔125于第二通孔121t中。接着，图案化导电层124p而形成两个图案化导电层124。之后，形成两个防焊层127于设置于介电层结构121的两侧的两个图案化导电层124上，其中这两个防焊层127分别覆盖这两个图案化导电层124。
具体而言，第二通孔121t为通过雷射钻孔或机械钻孔形成。导电盲孔125为通过电镀形成。导电层124p为通过蚀刻制程而图案化形成图案化导电层124。防焊层127分别具有多个开口127o，以裸露图案化导电层124。
如图12所绘示，设置电子元件110于图案化导电层124上。在本实施方式中，电子元件110包含晶片111与多个凸块112。凸块112连接晶片111与裸露的图案化导电层124。
然后形成封装层130于防焊层127与电子元件110上，于是封装层130环绕电子元件110。
接着，形成多个凸块126于设置于介电层结构121相对于电子元件110的一侧上的裸露的图案化导电层124。
图13绘示依照本发明一实施方式的半导体结构100与印刷电路板200的剖面示意图。如图13所绘示，设置半导体结构100于印刷电路板200上，在本实施方式中，凸块126连接图案化导电层124与印刷电路板200的图案化导电层224。
本发明另一实施方式提供一种印刷电路板200，印刷电路板200为半导体结构。在本实施方式中，印刷电路板200包含电子元件与板状结构220。电子元件为半导体结构100。板状结构220包含介电层结构221与至少一弹性件229。介电层结构221具有装置区222与围绕装置区222的边缘区223，其中半导体结构100设置在装置区222上，边缘区223具有至少一第一通孔223t。弹性件229设置于第一通孔223t中。
具体而言，半导体结构100包含晶片承载件190与设置于晶片承载件190上的晶片111。
具体而言，半导体结构100还包含连接晶片承载件190与板状结构220的多个凸块126。装置区222的外缘由凸块126中设置于最***者的设置位置定义。具体而言，装置区222的外缘由凸块126中设置于最***者在板状结构220上的正投影的外缘定义。
虽然本发明已以实施方式揭露如上，然其并非用以限定本发明，任何熟悉此技艺者，在不脱离本发明的精神和范围内，当可作各种的更动与润饰，因此本发明的保护范围当视所附的权利要求书所界定的范围为准。

Claims (20)

1.一种半导体结构，其特征在于，包含：
一电子元件；以及
一板状结构，包含：一介电层结构，具有一装置区与围绕该装置区的一边缘区，其中该电子元件设置在该装置区上，该边缘区具有至少一第一通孔；以及至少一弹性件，设置于该第一通孔中。
2.根据权利要求1所述的半导体结构，其特征在于，该介电层结构具有相对的一第一面与一第二面，该第一面与该第二面裸露该弹性件。
3.根据权利要求2所述的半导体结构，其特征在于，该弹性件凸出于该第一面与该第二面的至少其中的一者。
4.根据权利要求1所述的半导体结构，其特征在于，该介电层结构具有相对的一第一面与一第二面，该弹性件的厚度大于或等于该第一面与该第二面之间的最小直线距离。
5.根据权利要求1所述的半导体结构，其特征在于，该弹性件的材质为聚酰亚胺。
6.根据权利要求1所述的半导体结构，其特征在于，该弹性件穿过该介电层结构。
7.根据权利要求1所述的半导体结构，其特征在于，该弹性件相邻于该装置区。
8.根据权利要求1所述的半导体结构，其特征在于，该电子元件在该板状结构上的正投影与该弹性件至少部分重叠。
9.根据权利要求1所述的半导体结构，其特征在于，该板状结构的长边为沿着一第一方向，在该第一方向上该弹性件的中心与该电子元件在该板状结构上的正投影的外缘的距离小于5毫米。
10.根据权利要求1所述的半导体结构，其特征在于，该板状结构还包含一图案化导电层，该图案化导电层设置于该介电层结构上。
11.根据权利要求10所述的半导体结构，其特征在于，该介电层结构还具有至少一第二通孔，该板状结构还包含至少一导电盲孔，该导电盲孔设置于该第二通孔中且电性连接该图案化导电层。
12.根据权利要求1所述的半导体结构，其特征在于，该介电层结构为一核心层或一中介层。
13.根据权利要求1所述的半导体结构，其特征在于，该介电层结构包含一核心层与至少一增层介电层。
14.根据权利要求1所述的半导体结构，其特征在于，该板状结构为一晶片承载件，且该电子元件包含一晶片。
15.根据权利要求14所述的半导体结构，其特征在于，该电子元件还包含多个凸块，所述多个凸块连接该晶片与该板状结构，其中该装置区的外缘由所述多个凸块中设置于最***者的设置位置定义。
16.根据权利要求14所述的半导体结构，其特征在于，该电子元件还包含一晶片粘着层，该晶片粘着层设置于该晶片与该板状结构之间，其中该装置区的外缘由该晶片在该板状结构上的正投影的外缘定义。
17.根据权利要求14所述的半导体结构，其特征在于，该电子元件还包含一晶片粘着层，该晶片粘着层设置于该晶片与该板状结构之间，该板状结构的长边为沿着一第一方向，其中该装置区小于该晶片在该板状结构上的正投影，且在该第一方向上该装置区的外缘与该晶片在该板状结构上的正投影的外缘的距离小于5毫米。
18.根据权利要求1所述的半导体结构，其特征在于，该板状结构为一印刷电路板，且该电子元件包含一晶片承载件与设置于该晶片承载件上的一晶片。
19.根据权利要求18所述的半导体结构，其特征在于，该电子元件还包含连接该晶片承载件与该板状结构的多个凸块，其中该装置区的外缘由所述多个凸块中设置于最***者的设置位置定义。
20.根据权利要求1所述的半导体结构，其特征在于，该板状结构为一铜箔基板。
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