CN107634011A - 一种阵列基板及其制造方法 - Google Patents

一种阵列基板及其制造方法 Download PDF

Info

Publication number
CN107634011A
CN107634011A CN201710870202.5A CN201710870202A CN107634011A CN 107634011 A CN107634011 A CN 107634011A CN 201710870202 A CN201710870202 A CN 201710870202A CN 107634011 A CN107634011 A CN 107634011A
Authority
CN
China
Prior art keywords
layer
lattice
polysilicon
amorphous silicon
array base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710870202.5A
Other languages
English (en)
Inventor
余威
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to CN201710870202.5A priority Critical patent/CN107634011A/zh
Priority to US15/576,188 priority patent/US10629746B2/en
Priority to PCT/CN2017/107179 priority patent/WO2019056447A1/zh
Publication of CN107634011A publication Critical patent/CN107634011A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78663—Amorphous silicon transistors
    • H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02592—Microstructure amorphous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

本发明提供一种阵列基板及其制造方法，所述制造方法包括：在衬底基板表面形成栅极层；在所述栅极表面形成绝缘层；在所述绝缘层表面形成具有分隔部的多晶硅层；在所述具有分隔部的多晶硅层表面形成源极漏极层，使所述源极漏极层不直接与所述多晶硅层接触。通过上述方式，有效提高了源极漏极层和非晶硅层接触电阻，从而有效减小了漏电，大幅度改善了TFT器件的特性。

Description

一种阵列基板及其制造方法
技术领域
本发明涉及液晶显示器技术领域，特别是涉及一种阵列基板及其制造方法。
背景技术
液晶显示器件(Liquid Crystal Display，LCD)以及有机电致发光显示器(Organic Light-emitting Diode，OLED)通过电场来控制液晶(Liquid Crystal，LC)的透光率显示图像，或通过电流来控制有机发光材料显示图像。此类显示器一般都需要通过薄膜晶体管(Thin-Film Technology，TFT)阵列基板来实现对像素的驱动以及控制。
为了实现高分辨率的要求，目前TFT阵列基板多采用低温多晶硅(Low-Temperature polysilicon technology，LTPS)的制造工艺，LTPS由于电子迁移率高，亚阈值摆幅好，开关态电流比大，耗电低，且可以应用在柔性OLED基板上等特点，近几年引起了广泛的关注；但是传统的LTPS制作采用准分子镭射退火结晶(Excimer laser annealing，ELA)来结晶，机台昂贵，制作成本高，而且在ELA结晶时由于均一性不好，容易产生亮度不均，无法制作大尺寸显示面板；固相结晶(solid phase crystallization，SPC)由于成本低且结晶均一性好，且在结晶前注入一定剂量的硼离子可以大幅度降低结晶需要的温度和时间，这种新型的SPC结晶又开始引起业界的关注。
LTPS传统的制作方法将非晶硅注入硼离子，通过快速热退火结晶的方式处理非晶硅，非晶硅上表面会形成阻抗很小的多晶硅导体层101，下部会形成半导体状的多晶硅层102；利用源极漏极层103金属电极为掩模进行干法刻蚀，将沟道区域上表面的多晶硅导体层101刻蚀掉，形成沟道，最后盖上一层钝化层104，完成所述TFT器件；但是源极漏极层103和下部的半导体状的多晶硅层102接触，会增大漏电流的路径，使漏电流增大，影响TFT的特性，如图1所示。
因此，提供一种阵列基板及其制造方法实为必要。
发明内容
本发明解决的技术问题是，提供一种阵列基板及其制造方法，通过改变传统结构中源极漏极层和非晶硅层直接接触，达到减小漏电的目的，从而可以大幅度改善TFT器件的特性。
为解决上述技术问题，本发明采用的第一个技术方案是：提供一种阵列基板的制造方法，所述方法包括：
在衬底基板表面形成栅极层；在所述栅极表面形成绝缘层；在所述绝缘层表面形成具有分隔部的多晶硅层；在所述具有分隔部的多晶硅层表面形成源极漏极层，在所述具有分隔部的多晶硅层表面形成源极漏极层；所述分隔部将所述源极漏极层与所述多晶硅层隔开。
所述在所述绝缘层表面形成具有分隔部的多晶硅层，使所述分隔部的电子迁移率比所述多晶硅的电子迁移率低的步骤具体包括：
在所述绝缘层上图案化形成非晶硅层；在图案化的非晶硅层设置光阻，所述光阻的开口宽度小于非晶硅层的宽度；光罩后去除光阻，对所述非晶硅层进行结晶。
进一步的，所述在所述绝缘层表面形成具有分隔部的多晶硅层，使所述分隔部的电子迁移率比所述多晶硅的电子迁移率低的步骤具体包括：
在所述绝缘层预定区域形成凹槽，在所述凹槽内形成非晶硅层，在所述非晶硅层上形成多晶硅导体层，对所述非晶硅层进行结晶。
其中，所述对所述非晶硅层进行结晶的步骤具体包括：采用快速热退火在650℃对所述非晶硅层实现结晶。
其中，所述在所述具有分隔部的多晶硅层表面形成源极漏极层的步骤具体包括：沉积源极漏极层并图案化；蚀刻形成沟槽；其中，所述源极与所述漏极通过所述沟道相隔开；在所述源极以及漏极的表面沉积钝化层。
其中，所述在衬底基板表面形成栅极层的步骤具体包括：采用气象沉积的方式在所述衬底基板上形成金属层；蚀刻所述金属层形成所述栅极层。
所述在所述栅极表面形成绝缘层的步骤具体包括：采用物理或化学沉积的方式在所述栅极上形成绝缘层。
为解决上述技术问题，本发明采用的第二个技术方案是：提供一种阵列基板包括：
依次形成在衬底基板上的栅极层、绝缘层、多晶硅层和源极漏极层；
其中，所述多晶硅层包括分隔部，所述分隔部将所述源极漏极层和所述多晶硅层隔开，所述分隔部的电子迁移率比所述多晶硅的电子迁移率低。
其中，所述绝缘层上蚀刻有凹槽，所述分隔部为所述绝缘层上凹槽的侧壁。
可选的，所述分隔部是由非晶硅材料形成的分隔部。
本发明的有益效果是：本发明通过改变传统结构中源极漏极层和多晶硅层直接接触，使用分隔部将多晶硅层和源极漏极层隔开，使接触电阻大幅提高，从而可以达到大幅减小漏电的目的，大幅度改善了TFT器件的特性。此外，本发明采用注入硼离子的固相结晶的方式来代替准分子镭射退火结晶，有效改善了准分子镭射退火结晶带来的均一性问题，同时大幅度降低结晶需要的温度和时间，有效降低了生产成本。
附图说明
图1是现有技术阵列基板的结构示意图；
图2是本发明阵列基板的制造方法一实施例的流程示意图；
图3是本发明阵列基板第一实施例的结构示意图；
图4是本发明阵列基板第二实施例的结构示意图；
图5是本发明阵列基板第三实施例的结构示意图；
图6是本发明阵列基板第四实施例的结构示意图；
图7是本发明阵列基板第五实施例的结构示意图；
图8是本发明阵列基板第六实施例的结构示意图。
具体实施方式
请参阅图2，图2是本发明阵列基板的制造方法一实施例的流程图，本实施例的阵列基板的制造方法包括如下步骤：
201：在衬底基板表面形成栅极层。
具体的，将衬底基板放入沉积腔室中，沉积一层金属层，并对该金属层图案化形成栅极。其中，在形成该金属层之前，先在该衬底基板上沉积缓冲层，缓冲层根据阵列基板的用途可以加设遮光层和离子阻挡层，在此不在赘述。
上述衬底基板为玻璃、石英中的至少一种，在其它实施方式中，也可以为其它透明材质，在此不做限定。
202：在栅极表面形成绝缘层。
其中，该栅极绝缘层通过物理或化学气相沉积的方式形成。其中，栅极绝缘层包括氮化硅SiNx，非晶氧化硅SiOx中的至少一种。
203：在绝缘层表面形成具有分隔部的多晶硅层；
具体的，在绝缘层上图案化形成非晶硅层，在图案化的非晶硅层设置光阻，并在非晶硅层注入硼离子，注入硼离子后将经过光罩处理后的光阻剥离；其中，光阻开开口宽度小于非多晶硅层的宽度。
可选的，在绝缘层中部预定区域形成凹槽，在绝缘层上沉积非晶硅层，并保留凹槽内非晶硅层；在凹槽内沉积形成多晶硅导体层，在多晶硅导体层注入的硼离子，对非晶硅层进行结晶。
在一个可选的实施方式中，可采用快速热退火技术对上述多晶硅层形成结晶。
在一个具体的实施方式中，可通过650℃的温度对该上述多晶硅层形成结晶。在其它实施方式中，也可通过其它温度，如700摄氏度、640摄氏度等，只要能够按照标准实现该多晶硅的结晶即可，在此不做奠定。烘烤时间可以为15min，也可以为14分钟、16分钟，在此不做限定。
在另一个实施方式中，还可以通过准分子镭射退火的方式使掺杂离子即硼离子和磷离子扩散，以形成多晶硅层，在此不做限定。
204：在具有分隔部的多晶硅层表面形成源极漏极层，使源极漏极层不直接与多晶硅层接触。
其中，沉积源极漏极层并图案化；蚀刻形成沟槽；其中，源极与漏极通过沟道相隔开；在源极以及漏极的表面沉积钝化层。
具体地，在多晶硅层上形成以一沟道分隔开的源极和漏极，最后在栅极、源极和漏极形成以后，在薄膜晶体管的表面沉积绝缘钝化层。
下面将结合附图对本发明作进一步说明。
如图3～5所示，本实施例中阵列基板一实施方式的的制造过程如下：
如图3所示，将衬底基板1放入沉积腔室中，使用PECVD(Plasma EnhancedChemical Vapor Deposition，等离子体增强化学气相沉积法)在衬底基板1上形成缓冲层2；其中，缓冲层2包括经过光刻处理的遮光层以及离子阻挡层(图中未标出)；而后再次利用PECVD技术在缓冲层2上沉积图案化形成栅极层3，在栅极层3上沉积图案化形成绝缘层4，在图案化的绝缘层4上设置一层非晶硅层5并图案化，在图案化的非晶硅层5两侧设置一层光阻6并图案化(如图4所示)，使非晶硅层5层宽度要大于两侧光阻6开口宽度。
如图4所示，再利用离子注入技术注入一定剂量的硼离子，其中，硼离子的载体可采用B2H6和H2的混合气体；光罩后去除光阻，然后利用快速热退火技术对非晶硅层5进行固相结晶处理，采用快速热退火在650℃对非晶硅层实现结晶，结晶从上表面向下部进行，非晶硅层5上表面会形成阻抗很小的多晶硅导体层8，多晶硅导体层8下部会形成半导体状的多晶硅层7，两侧由于非晶硅层5宽度要大于两侧光阻6开口宽度，光阻6薄膜阻碍了两侧离子的注入，使得非晶硅层5两侧没有参杂硼离子，两侧依然保持非晶硅状态，形成非晶硅分隔部9。
如图5所示，沉积SD电极(源极漏极)并图案化形成源极漏极层11，接着以SD电极为掩体对多晶硅导体层8进行刻蚀，将沟道10上表面的多晶硅导体层8刻蚀掉，留下下部的沟道10半导体状的多晶硅层7；然后再次图案化形成钝化层12，将沟道10覆盖，最后通过校验后完成阵列基板的制造。
区别于现有技术，本实施例采用结晶过程采用固相结晶的方式来代替传统的准分子镭射退火结晶，大幅度降低结晶需要的温度和时间，有效降低了生产成本。此外，本实施例通过改变传统结构中源极漏极层和非晶硅层直接接触，采用非晶硅与源极漏极层接触，使接触电阻大幅提高，从而可以达到大幅减小漏电的目的，大幅度改善了TFT器件的特性。
如图6～8所示，本实施例中阵列基板另一实施方式的制造过程如下：
如图6所示，将衬底基板1放入沉积腔室中，使用PECVD在衬底基板14上形成缓冲层15；其中，缓冲层15包括经过光刻处理的遮光层以及离子阻挡层(图中未标出)；而后再次利用PECVD技术在缓冲层15上沉积图案化形成栅极层16；在栅极层16上沉积图案化形成绝缘层17，在绝缘层17预定区域(一般为绝缘层17中部)形成凹槽18(如图6所示)。
如图7所示，在凹槽18内形成非晶硅层(图中未标出)，在非晶硅层上形成多晶硅导体层20(如图7所示),加入适量的B2H6后对非晶硅层进行固相结晶，在650℃烘烤15min左右，结晶从上表面向下部进行，非晶硅层上表面多晶硅导体层20不发生改变，多晶硅导体层20下部会形成半导体状的多晶硅层19。
如图8所示，沉积SD电极(源极漏极)并图案化形成源极漏极层21，接着以SD电极为掩体对多晶硅导体层20进行刻蚀，将沟道23(如图8所示)上表面的多晶硅导体层20刻蚀掉，留下下部的沟道23半导体状的多晶硅层19，然后再次图案化形成钝化层12，将沟道10覆盖，最后通过校验后完成阵列基板的制造。
区别于上述实施例，本实施例分隔部采用绝缘层上凹槽的侧壁来代替上述非晶硅材料形成的分隔部，进一步提高了接触电阻，从而达到了大幅减小漏电的目的，大幅度改善了TFT器件的特性。此外，对比于上述实施例，本实施例省略了设置和除去光阻的过程，进一步降低了生产成本，提高了生产效率。
本发明还提供一种阵列基板，依次形成在衬底基板上的栅极层、绝缘层、多晶硅层和源极漏极层；其中，多晶硅层包括分隔部，分隔部的电子迁移率比多晶硅的电子迁移率低。
其中，衬底基板上设有缓冲层，缓冲层包括经过光刻处理的遮光层以及离子阻挡层，缓冲层上设有栅极层，栅极层上设有绝缘层；绝缘层上设有多晶硅层和源极漏极层；分隔部设置在多晶硅层两侧，从而可以达到大幅减小漏电。
具体地，阵列基板的制造方法，制造方法包括：在衬底基板表面形成栅极层；在栅极表面形成绝缘层；在绝缘层表面形成具有分隔部的多晶硅层；在具有分隔部的多晶硅层表面形成源极漏极层，使源极漏极层不直接与多晶硅层接触。
在一个具体的实施例中，如图5所示，包括：衬底基板1、缓冲层2、栅极层3、绝缘层4、非晶硅层5、光阻6、多晶硅层7、多晶硅导体层8、非晶硅分隔部9、沟道10、源极漏极层11和钝化层12；其中，缓冲层可依据具体阵列基板规格调整为多层；其中，多晶硅层包括分隔部，分隔部将源极漏极层11和多晶硅层7隔开，分隔部的电子迁移率比多晶硅的电子迁移率低。
其中，分隔部是由非晶硅材料形成的分隔部。
具体地，多晶硅分隔部材料为非晶硅材料，一般与多晶硅相差2个数量级，所以相较于与多晶硅直接接触来讲，源极漏极层与非晶硅接触时可使电阻大幅度提高，从而可以达到大幅减小漏电的目的。
在另一个具体的实施例中，如图8所示，包括：衬底基板14、缓冲层15、栅极层16、绝缘层17、凹槽18、多晶硅层19、多晶硅导体层20、源极漏极层21和钝化层22；其中，缓冲层可依据具体阵列基板规格调整为多层；其中，多晶硅层包括分隔部(图中为标出)，分隔部将源极漏极层21和多晶硅层19隔开，分隔部的电子迁移率比多晶硅的电子迁移率低；分隔部是绝缘层上凹槽的侧壁。
其中，分隔部采用绝缘层上凹槽的侧壁来代替上述非晶硅材料形成的分隔部，进一步提高了接触电阻，从而达到了大幅减小漏电的目的，大幅度改善了TFT器件的特性。
区别于现有技术，本实施例通过改变传统结构中源极漏极层和多晶硅层直接接触，使用分隔部将多晶硅层和源极漏极层隔开，使接触电阻大幅提高，从而可以达到大幅减小漏电的目的，大幅度改善了TFT器件的特性。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其它相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种阵列基板的制造方法，其特征在于，所述制造方法包括：
在衬底基板表面形成栅极层；
在所述栅极表面形成绝缘层；
在所述绝缘层表面形成具有分隔部的多晶硅层；
在所述具有分隔部的多晶硅层表面形成源极漏极层；所述分隔部将所述源极漏极层与所述多晶硅层隔开。
2.根据权利要求1所述的阵列基板的制造方法，其特征在于，所述在所述绝缘层表面形成具有分隔部的多晶硅层，使所述分隔部的电子迁移率比所述多晶硅的电子迁移率低的步骤具体包括：
在所述绝缘层上图案化形成非晶硅层；
在图案化的非晶硅层设置光阻，所述光阻的开口宽度小于非晶硅层的宽度；
光罩后去除光阻，对所述非晶硅层进行结晶。
3.根据权利要求1所述的阵列基板的制造方法，其特征在于，所述在所述绝缘层表面形成具有分隔部的多晶硅层，使所述分隔部的电子迁移率比所述多晶硅的电子迁移率低的步骤具体包括：
在所述绝缘层预定区域形成凹槽，在所述凹槽内形成非晶硅层，在所述非晶硅层上形成多晶硅导体层，对所述非晶硅层进行结晶。
4.根据权利要求2或3所述的阵列基板的制造方法，其特征在于，所述对所述非晶硅层进行结晶的步骤具体包括：采用快速热退火在650℃对所述非晶硅层实现结晶。
5.根据权利要求1所述的阵列基板的制造方法，其特征在于，所述在所述具有分隔部的多晶硅层表面形成源极漏极层的步骤具体包括：沉积源极漏极层并图案化；蚀刻形成沟槽；其中，所述源极与所述漏极通过所述沟道相隔开；
在所述源极以及漏极的表面沉积钝化层。
6.根据权利要求1所述的阵列基板的制造方法，其特征在于，所述在衬底基板表面形成栅极层的步骤具体包括：
采用气象沉积的方式在所述衬底基板上形成金属层；
蚀刻所述金属层形成所述栅极层。
7.根据权利要求1或6所述的阵列基板的制造方法，其特征在于，所述在所述栅极表面形成绝缘层的步骤具体包括：
采用物理或化学沉积的方式在所述栅极上形成绝缘层。
8.一种阵列基板，其特征在于，包括：
依次形成在衬底基板上的栅极层、绝缘层、多晶硅层和源极漏极层；
其中，所述多晶硅层包括分隔部，所述分隔部将所述源极漏极层和所述多晶硅层隔开，所述分隔部的电子迁移率比所述多晶硅的电子迁移率低。
9.如权利要求8所述的阵列基板，其特征在于，所述绝缘层上蚀刻有凹槽，所述分隔部为所述绝缘层上凹槽的侧壁。
10.如权利要求8所述的阵列基板，其特征在于，所述分隔部是由非晶硅材料形成的分隔部。
CN201710870202.5A 2017-09-20 2017-09-20 一种阵列基板及其制造方法 Pending CN107634011A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201710870202.5A CN107634011A (zh) 2017-09-20 2017-09-20 一种阵列基板及其制造方法
US15/576,188 US10629746B2 (en) 2017-09-20 2017-10-21 Array substrate and manufacturing method thereof
PCT/CN2017/107179 WO2019056447A1 (zh) 2017-09-20 2017-10-21 一种阵列基板及其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710870202.5A CN107634011A (zh) 2017-09-20 2017-09-20 一种阵列基板及其制造方法

Publications (1)

Publication Number Publication Date
CN107634011A true CN107634011A (zh) 2018-01-26

Family

ID=61103388

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710870202.5A Pending CN107634011A (zh) 2017-09-20 2017-09-20 一种阵列基板及其制造方法

Country Status (3)

Country Link
US (1) US10629746B2 (zh)
CN (1) CN107634011A (zh)
WO (1) WO2019056447A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110993611A (zh) * 2019-11-26 2020-04-10 武汉华星光电半导体显示技术有限公司 一种tft基板的制作方法和tft基板

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11908911B2 (en) * 2019-05-16 2024-02-20 Intel Corporation Thin film transistors with raised source and drain contacts and process for forming such
FR3124045B1 (fr) 2021-06-11 2023-05-05 Tekcem Accordeur d’antenne, et antenne accordable comportant cet accordeur d’antenne

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120241743A1 (en) * 2010-03-03 2012-09-27 Au Optronics Corporation Thin film transistor
CN105070724A (zh) * 2015-07-16 2015-11-18 深圳市华星光电技术有限公司 Tft基板的制作方法及制得的tft基板
CN105789327A (zh) * 2016-05-17 2016-07-20 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板、显示装置
CN106057827A (zh) * 2016-08-12 2016-10-26 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置
CN106663697A (zh) * 2015-03-27 2017-05-10 堺显示器制品株式会社 薄膜晶体管及显示面板

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005057056A (ja) 2003-08-04 2005-03-03 Sharp Corp 薄膜トランジスタおよびその製造方法
KR101084233B1 (ko) * 2009-10-13 2011-11-16 삼성모바일디스플레이주식회사 박막트랜지스터 및 그 제조 방법
CN104183648B (zh) 2014-07-25 2017-06-27 京东方科技集团股份有限公司 一种薄膜晶体管及其制作方法、阵列基板和显示装置
TWI555183B (zh) 2015-03-26 2016-10-21 友達光電股份有限公司 薄膜電晶體以及畫素結構
WO2016157351A1 (ja) * 2015-03-30 2016-10-06 堺ディスプレイプロダクト株式会社 薄膜トランジスタ及び表示パネル
CN106711155B (zh) 2017-01-16 2020-04-21 京东方科技集团股份有限公司 一种阵列基板、显示面板及显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120241743A1 (en) * 2010-03-03 2012-09-27 Au Optronics Corporation Thin film transistor
CN106663697A (zh) * 2015-03-27 2017-05-10 堺显示器制品株式会社 薄膜晶体管及显示面板
CN105070724A (zh) * 2015-07-16 2015-11-18 深圳市华星光电技术有限公司 Tft基板的制作方法及制得的tft基板
CN105789327A (zh) * 2016-05-17 2016-07-20 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板、显示装置
CN106057827A (zh) * 2016-08-12 2016-10-26 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110993611A (zh) * 2019-11-26 2020-04-10 武汉华星光电半导体显示技术有限公司 一种tft基板的制作方法和tft基板

Also Published As

Publication number Publication date
US20190221671A1 (en) 2019-07-18
US10629746B2 (en) 2020-04-21
WO2019056447A1 (zh) 2019-03-28

Similar Documents

Publication Publication Date Title
CN106206622B (zh) 一种阵列基板及其制备方法、显示装置
CN103390592B (zh) 阵列基板制备方法、阵列基板以及显示装置
CN103745955B (zh) 显示装置、阵列基板及其制造方法
CN103996716B (zh) 一种多晶硅薄膜晶体管的制备方法
CN106098628B (zh) Tft背板的制作方法及tft背板
CN104916584A (zh) 一种制作方法、阵列基板及显示装置
CN104659285A (zh) 适用于amoled的tft背板制作方法及结构
CN104752343A (zh) 双栅极氧化物半导体tft基板的制作方法及其结构
CN105304500B (zh) N型tft的制作方法
CN103839825A (zh) 一种低温多晶硅薄膜晶体管、阵列基板及其制作方法
CN103268855B (zh) 多晶硅形成方法、tft阵列基板制造方法及显示装置
CN106653861A (zh) 一种薄膜晶体管及其制备方法、阵列基板及其制备方法
CN103050410A (zh) 低温多晶硅薄膜晶体管的制造方法、低温多晶硅薄膜晶体管
CN104900654A (zh) 双栅极氧化物半导体tft基板的制作方法及其结构
CN107359177A (zh) 一种柔性背板的制作方法、液晶显示面板以及oled显示面板
CN101110432A (zh) 薄膜晶体管阵列基板、其制造方法和显示装置
CN103296034A (zh) 一种阵列基板、制备方法以及显示装置
CN105185792B (zh) 液晶显示面板、阵列基板及其制造方法
CN105280716B (zh) 薄膜晶体管的制造方法
CN107634011A (zh) 一种阵列基板及其制造方法
CN107170759A (zh) 一种阵列基板及其制作方法、显示装置
CN103985716B (zh) 薄膜晶体管阵列基板制造方法及薄膜晶体管阵列基板
CN105655352B (zh) 低温多晶硅tft阵列基板的制作方法
KR20120127318A (ko) 폴리실리콘 활성층을 함유한 박막트랜지스터, 그 제조방법 및 어레이 기판
CN106952963B (zh) 一种薄膜晶体管及制作方法、阵列基板、显示装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20180126

WD01 Invention patent application deemed withdrawn after publication