CN107395539A - A kind of 8B10B encoder design methods the agreement suitable for JESD204B - Google Patents
A kind of 8B10B encoder design methods the agreement suitable for JESD204B Download PDFInfo
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- CN107395539A CN107395539A CN201710776254.6A CN201710776254A CN107395539A CN 107395539 A CN107395539 A CN 107395539A CN 201710776254 A CN201710776254 A CN 201710776254A CN 107395539 A CN107395539 A CN 107395539A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
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Abstract
The present invention proposes a kind of 8B10B encoder design methods agreement suitable for JESD204B, this method is using look-up table by the way of combinational logic method is combined, K bytes and D bytes are encoded separately, coding schedule is simplified, reduces the number of plies of logical process, simultaneously, due to code error be only possible to be invalid K codes input, therefore, the error detection of coding is located in K byte code modules, further reduces the number of plies of D byte codes module logic processing.It is located at the 8B10B encoder design methods of system data link layer the agreement provided by the invention suitable for JESD204B, there is certain improvement compared to conventional method and comply fully with JESD204B protocol specifications, can be applied in the design of the HSSI High-Speed Serial Interface based on JESD204B agreements.
Description
Technical field
The present invention relates to a kind of 8B10B encoders, and in particular to the 8B10B codings a kind of agreement suitable for JESD204B
Device design method.
Background technology
JESD204B agreements employ the Serdes interfacings of main flow, and provide that Serdes interfaces use 8B10B volume
Coding/decoding method meets the requirement of high-speed transfer.8B10B encoding scheme major functions are into 10bit numbers by 8bit data encodings
According to the code character that 0,1 distribution balance as far as possible can be picked out when sending data from 1024 10B code characters is sent, to maintain
The DC balance of link, avoids null offset；Meanwhile keep the maximum continuous length for sending in sequence 0 and 1 to be no more than 5, have
Beneficial to the recovery of clock.
Different from traditional 8B10B codings, the 8B10B codings in JESD204B interface protocols have the characteristics that：1st, number
Include D11.7, D13.7, D14.7, D17.7, D18.7, D20.76 special bytes according to character code.2nd, 8B10B codings
With 5 kinds of control characters, respectively K28.0, K28.3, K28.4, K28.5, K28.7.
Traditional 8B10B codings implementation method includes table look-at method and purely logical realizes method.Although table look-at method reality
Now facilitate, but resource consumption is big, and the operating rate of coding-decoding circuit is limited by FPGA internal storage read access times, simultaneously
Add the area and power consumption of chip.Purely logical to realize method circuit complexity, difficulty is big, simultaneously because risk, competition and delay
In the presence of making output data shake serious, limit the highest operating rate of chip.
The content of the invention
In order to solve the above problems, the present invention proposes one kind and is located at system data link suitable for JESD204B agreements
The design method of the 8B10B encoders of layer.
To achieve the above object, the present invention, which one of adopts the following technical scheme that, realizes.
A kind of 8B10B encoder design methods agreement suitable for JESD204B, it uses look-up table and combinational logic
The mode that method is combined realizes 8B10B encoders；8B10B encoders include K byte codes and D byte codes；K bytes are compiled
Code and D byte codes separate, and simplify coding schedule, reduce the number of plies of logical process.Wherein, K byte codes are used and directly looked into
Table method is realized；Simplify K byte code tables using equalization information is added, and K is together decided on using equalization information and polarity information
Whether byte code result, which needs, overturns, while determines K byte code output polarities；Code error is only possible to be due to invalid K
The input of code, therefore the error detection encoded is located in K byte code modules, further reduces D byte code module logics
The number of plies of processing.K byte codes table and its coding principle are as shown in table 1, table 2.
Further, D byte codes are divided into 3B4B coding modules, 5B6B coding modules and polarity computing module, using string
Row structure, i.e., 5B6B codings are first carried out, reuse the polarity after 5B6B codings and carry out 3B4B codings；Wherein, 5B6B coding modules
First I (I=0) is added to obtain ABCDEI6 positions character after 5 character ABCDE are inputted, then again to the certain bits in this 6 characters
Rule carries out necessary upset according to the coding schedule of setting, obtains correct coding result.
Further, 3B4B coding modules first add J (J=0) to obtain FGHJ4 positions character after 3 character FGH are inputted, so
To the certain bits in this 4 characters, the rule according to the coding schedule of setting carries out necessary upset again afterwards, is correctly compiled
Code result.
Further, the polarity that polarity computing module is included in 5B6B cataloged procedures calculates and the pole in 3B4B cataloged procedures
Property calculate；Wherein, the polarity in 5B6B cataloged procedures is calculated according to the polarity access information rule encoded in coding schedule 3, then evidence
Coding result is balanced code or non-equilibrium code to decide whether to overturn polarity；Polarity in 3B4B cataloged procedures calculate with
It is similar in 5B6B cataloged procedures；The polarity results finally encoded according to the 5B6B polarity results encoded and 3B4B together decide on most
Whole coding output polarity.
Further, K byte codes are realized using the method for table look-at.JESD204B agreements only use 5 K codes, point
Not Wei K28.0, K28.3, K28.4, K28.5, K28.7, and according to polarity information, its coding result is that step-by-step negates.Originally set
Count using addition equalization information to simplify K byte code tables, and K byte codes are together decided on using equalization information and polarity information
As a result whether need to overturn.Code error be only possible to be due to invalid K codes input, therefore encode error detection be located at K words
Save in coding module.
Further, 5B6B coding modules first after ABCDE plus I (I=0) obtain ABCDEI6 positions character, then by from
A high position arrives the order of low level, and according to rule shown in coding schedule 3, it is 1 first to force it, then it is 0 to force it, finally according to polarity information
With input 5B characters, determine whether coding result needs to overturn.
Further, 3B4B coding modules are first after FGH plus J (J=0) obtains FGHJ4 positions character, then by from a high position
To the order of low level, according to rule shown in coding schedule 4, it is only necessary to which it is 1 to force it, finally according to 5B6B output polarities and input 3B
Character, determines whether coding result needs to overturn.It is noted here that the replacement between Dx.P7 and Dx.A7, Replacement are：
When 5B6B output polarities are the e=i=0 just and after encode, or when 5B6B output polarities are negative and e=i after encode
=1.
Compared with prior art, the beneficial effect that the present invention is reached：The present invention uses and separately compiles K bytes and D bytes
The mode of code, simplifies coding schedule, reduces the number of plies of logical process, simultaneously because code error is only possible to be invalid K codes
Input, thus encode error detection be located in K byte code modules, D byte codes module need to only be encoded and do not have into
Row error detection, further reduce the number of plies of D byte codes module logic processing.
Brief description of the drawings
Fig. 1 is 8B10B coder structure schematic diagrames.
Fig. 2 is that 8B and 10B encodes corresponding relation figure in example.
Embodiment
With reference to embodiment and accompanying drawing, the implementation to the present invention is described further, but the implementation and protection of the present invention
Not limited to this, if it is noted that the following symbol having not in especially detailed description part such as coding schedule, is this area skill
Art personnel can refer to prior art realize and understand.
The 8B10B encoder designs suitable for JESD204B agreements of this example, the present invention is using look-up table with combining
The mode that logical approach is combined realizes 8B10B encoders, wherein, K bytes and D bytes are encoded separately, simplify code table, subtract
The number of plies of logical process is lacked.Coder structure is as shown in Figure 1.8B10B coding corresponding relations are as shown in Figure 2.
As shown in figure 1, being 8B10B coder structures, each symbol can refer to prior art understanding, 8B10B encoders in figure
K byte codes module and D byte code modules can be divided into, wherein D byte codes module is divided into 3B4B coding modules, 5B6B codings
Module and polarity computing module.
K byte codes are realized using table look-at method.Simplify K byte code tables using equalization information is added, and utilize
Equalization information and polarity information together decide on whether K byte codes result needs to overturn, while determine K byte code output stages
Property.Code error be only possible to be due to invalid K codes input, therefore encode error detection be located in K byte code modules, enter
One step reduces the number of plies of D byte codes module logic processing.K byte codes table and its coding principle are as shown in table 1, table 2.
Table 1K byte code tables
| HGF EDCBA | K_bal abcdei fghj(RD+) | |
| K28.0 | 000 11100 | 1 110000 1011 |
| K28.3 | 011 11100 | 0 110000 1100 |
| K28.4 | 100 11100 | 1 110000 1101 |
| K28.5 | 101 11100 | 0 110000 0101 |
| K28.7 | 111 11100 | 1 110000 0111 |
Table 2K byte code principle tables
The D byte code modules of the present invention are divided into 3B4B coding modules, 5B6B coding modules and polarity computing module, use
Serial code structure.Wherein, 5B6B coding modules first add I (I=0) to obtain ABCDEI6 positions word after 5 character ABCDE are inputted
Symbol, then by the order from a high position to low level, according to rule shown in coding schedule 3, it is 1 first to force it, then it is 0 to force it, most
Afterwards according to polarity information and input 5B characters, determine whether coding result needs to overturn.Being forced to 1 rule is：A-a：Keep
It is constant；B-b：Meet the character of L04 types；C-c：Meet the character of L04 types, or meet L13 types and D=E=1 word
Symbol；D-d：Keep constant；E-e：Meet L13 types and E=0 character；I-i：Meet L22 types and E=0 character, or
Meet L04 types and E=1 character, or meet L13 types and D=0, E=1 character.Being forced to 0 rule is：A-a：
Keep constant；B-b：Meet the character of L40 types；C-c：Keep constant；D-d：Meet the character of L40 types；E-e：Meet L13
The character of type and D=E=1；I-i：Keep constant.Wherein, L04, L13, L22, L31, L40 represent in ABCD 1 and 0
Number, for example, L13 represents there is 11,30 in ABCD.
The 5B6B coding schedules of table 3
The 3B4B coding schedules of table 4
The 3B4B coding modules first add J (J=0) to obtain FGHJ4 positions character after 3 character FGH are inputted, and then pass through
Order from a high position to low level, according to rule shown in coding schedule 4, it is only necessary to which it is 1 to force it, finally encodes output stage according to 5B6B
Property and input 3B characters, determine coding result whether need to overturn.Being forced to 1 rule is：F-f：Keep constant；G-g：F=G
=H=0；H-h：Keep constant；J-j：F is different from J and H=0.It is noted here that the replacement between Dx.P7 and Dx.A7, is replaced
Changing rule is：When 5B6B output polarities are the e=i=0 just and after encode, or when 5B6B output polarities are negative and after encode
E=i=1.
The polarity that the polarity computing module is included in 5B6B cataloged procedures calculates and the polarity meter in 3B4B cataloged procedures
Calculate.Wherein, the polarity in 5B6B cataloged procedures is calculated according to the polarity access information rule encoded in coding schedule 3, then according to coding
Result is balanced code or non-equilibrium code to decide whether to overturn polarity.Polarity entrance is that positive rule is：1st, both it is not inconsistent
L22 types are closed, also do not meet L31 types, and E=0 character.2nd, L13 types and D=E=0 character are met.Polarity entrance
It is for negative rule：Both L22 types had not been met, have not met L13 types, and E=1 character yet.
Polarity in the 3B4B cataloged procedures is calculated with reference to 5B6B cataloged procedures, and polarity entrance is that positive rule is：F=
G=0, polarity entrance are for negative rule：F=G=H=1.The pole finally encoded according to the 5B6B polarity results encoded and 3B4B
Property result together decides on final coding output polarity.
Described above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, without departing from the technical principles of the invention, some improvement and deformation can also be made, these are improved and deformation
Also it should be regarded as protection scope of the present invention.
Claims (4)
1. a kind of 8B10B encoder design methods agreement suitable for JESD204B, it is characterised in that：Using look-up table and group
The mode that logical method is combined realizes 8B10B encoders；8B10B encoders include K byte codes and D byte codes；By K
Byte code and D byte codes separate, wherein, K byte codes are realized using table look-at method；Using addition equalization information come simple
Change K byte code tables, and together decide on whether K byte codes result needs to overturn using equalization information and polarity information, simultaneously
Determine K byte code output polarities；The error detection of coding is located in K byte code modules.
2. the 8B10B encoder design methods a kind of agreement suitable for JESD204B according to claim 1, its feature
It is：D byte codes are divided into 3B4B coding modules, 5B6B coding modules and polarity computing module, using serial structure, i.e., advanced
Row 5B6B is encoded, and is reused the polarity after 5B6B codings and is carried out 3B4B codings；Wherein, 5B6B coding modules are first inputting 5 words
After symbol ABCDE plus I obtains ABCDEI6 positions character, then again to the certain bits in this 6 characters according to the coding schedule of setting
Rule carries out necessary upset, obtains correct coding result.
3. the 8B10B encoder design methods a kind of agreement suitable for JESD204B according to claim 2, its feature
It is：3B4B coding modules first add J to obtain FGHJ4 positions character after 3 character FGH are inputted, then again in this 4 characters
Certain bits rule according to the coding schedule of setting carries out necessary upset, obtains correct coding result.
4. the 8B10B encoder design methods a kind of agreement suitable for JESD204B according to claim 2, its feature
It is：The polarity that polarity computing module is included in 5B6B cataloged procedures calculates to be calculated with the polarity in 3B4B cataloged procedures；Wherein,
Polarity calculating in 5B6B cataloged procedures is balance according to the polarity access information rule encoded in coding schedule, then according to coding result
Code or non-equilibrium code come decide whether overturn polarity；Polarity in 3B4B cataloged procedures is calculated with reference to encoded with 5B6B
Journey, the polarity results finally encoded according to the 5B6B polarity results encoded and 3B4B together decide on final coding output polarity.
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Application publication date: 20171124 |