CN105760329A - Coding and decoding device capable of reducing bus coupling overturn - Google Patents
Coding and decoding device capable of reducing bus coupling overturn Download PDFInfo
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- CN105760329A CN105760329A CN201610077048.1A CN201610077048A CN105760329A CN 105760329 A CN105760329 A CN 105760329A CN 201610077048 A CN201610077048 A CN 201610077048A CN 105760329 A CN105760329 A CN 105760329A
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention discloses a coding and decoding device capable of reducing bus coupling overturn. A coding device carries out XOR coding and XNOR coding on uncoded data needing to be transmitted at the current moment through coded data of a bus at a previous moment, and sends coded data, with the smallest number of overturn times relative to the coded data of the bus at the previous moment, in XOR coded data, XNOR coded data, reverse coded data and true form coded data to the bus for transmission. At a bus receiving side, a decoding device carries out true form decoding and reverse decoding on the coded data on the bus, and carries out XOR decoding and XNOR decoding on the coded data on the bus through the coded data of the bus at the previous moment; correct decoded data is selected out from true form decoded data, reverse decoded data, XOR decoded data and XNOR decoded data through two-level higher mark information of the coded data on the bus. The coding and decoding device capable of reducing bus coupling overturn has the advantages that the number of coupling overturn times of bus data can be reduced, and thus the coupling overturn power consumption of the bus can be effectively reduced.
Description
Technical field
The present invention relates to a kind of coding and decoding device reducing on-chip bus coupling upset, belong to SOC(system on a chip) low power design technique field.
Background technology
Along with the development of semiconductor process technique, performance and the integrated level of SOC(system on a chip) (systemonchip, SoC) chip are obtained for very big lifting, and the power problems thus brought also becomes very prominent.On-chip bus is as connecting the critical component of subsystems in SoC, owing to having data bit width height, physical pathway length and accessing feature frequently and become the important sources of system power dissipation.Under deep submicron process, the power consumption that the coupling upset of bus produces occupies the leading position of bus low power.
Low-power consumption bus code technology can be used for reducing the coupling upset power consumption of on-chip bus.The data needing transmission in bus are encoded by bus code technology, and the power consumption that when reducing twice data transmission before and after in bus, coupling upset brings, its basic structure is as shown in Figure 1.
In existing technology, Chinese patent 201010144090.3 discloses a kind of auto-adaptive time decoding method suppressing bus interference, and the method can reduce the coupling upset power consumption of bus.Its operation principle is: bus current time needing, whether the data of transmission can cause worst case coupling upset to judge, and generates corresponding marking signal;For not causing the data of worst case coupling upset, these data are sent directly in bus by encoder;For causing the data of worst case coupling upset, the odd bits data of these data are first sent in bus by encoder, and subsequent time transmits this data in bus again.The method can eliminate worst case coupling upset, reduces the power consumption of bus.But, the method exists following not enough: (1), for causing the data of worst case coupling upset, two clock cycle of bus requirements send this data, reduce the transmission performance of bus;(2) for reducing bus low power, the method only considered the situation of bus data worst case coupling upset, without the situation considering the coupling upset of bus data entirety.
Summary of the invention
The technical problem to be solved is to propose a kind of coding and decoding device reducing bus coupling upset, it is possible to reduce the coupling upset number of times in bus data transfer process, thus reducing the coupling upset power consumption of bus.
The present invention solves above-mentioned technical problem by the following technical programs: a kind of coding and decoding device reducing bus coupling upset, it is connected with uncoded data including input, exports the encoder being connected with bus transmitting terminal, input is connected with bus receiving terminal, exports the decoder being connected with decoding data, and described encoder includes:
True form coding unit, XOR coding unit, same or coding unit, reversion coding unit, being respectively used to uncoded data carry out true form coding, XOR coding, same or coding, reversion coding, their input is connected with uncoded data, two bit flag information;
First coupling upset counting unit, second coupling upset counting unit, the 3rd coupling upset counting unit, the 4th coupling upset counting unit, be respectively used to calculate the output of true form coding unit, XOR coding unit output, with or coding unit output, reversion coding unit output opposite bus previous moment transmission coding data coupling overturn number;
Four road comparators, for calculating number minimum in the output of the first coupling upset output of counting unit, the second coupling upset output of counting unit, the 3rd coupling upset output of counting unit, the 4th coupling upset counting unit, and generate corresponding two bit flag information;
First selector, the output according to four road comparators, select the output of true form coding unit, XOR coding unit output, with or coding unit output, reversion coding unit output in one as coding data be sent in bus;
First depositor, input is connected with the coding data in bus, for preserving the coding data of bus previous moment transmission;
Described decoder includes:
True form decoding unit, XOR decoding unit, same or decoding unit, reversion decoding unit, be respectively used to coding data carry out true form decoding, XOR decoding, same or decoding, decoding of reversing, and their input is connected with the coding data in bus;
Second selector, for according to the coding data in bus high two bit flag information select the outputs of true form decoding unit, XOR decoding unit output, with or decoding unit output, reversion decoding unit output in one as decoding data;
Second depositor, input is connected with the coding data in bus, for preserving the coding data of bus previous moment transmission.
Further, described true form coding unit is output as uncoded data increases the result of two bit flag information.
Further, the input of described XOR coding unit is also connected with the coding data of bus previous moment transmission, is output as making xor operation and increasing the result of two bit flag information after the coding data of uncoded data and bus previous moment transmission remove high two bit flag information.
Further, described same or coding unit input is also connected with the coding data of bus previous moment transmission, is output as after uncoded data remove high two bit flag information with the coding data of bus previous moment transmission and makes result that is same or that operate and increase by two bit flag information.
Further, described reversion coding unit increases the result of two bit flag information after being output as uncoded data-conversion.
Further, the coding data that described true form decoding unit is output as in bus remove the result after high two bit flag information.
Further, the input of described XOR decoding unit is also connected with the coding data of bus previous moment transmission, and the coding data that the coding data being output as in bus are transmitted with bus previous moment after removing high two bit flag information make the result of xor operation after removing high two bit flag information.
Further, described same or decoding unit input is also connected with the coding data of bus previous moment transmission, and the coding data being output as in bus make result that is same or that operate after removing high two bit flag information with the coding data of bus previous moment transmission after removing high two bit flag information.
Further, the result that the coding data that described reversion decoding unit is output as in bus negate after removing high two bit flag information.
Further, described two bit flag information encode the type of coding of data on record trunk.
The present invention has the advantage that encoder selects the coding data of coupling upset least number of times to be transmitted all the time compared to existing technology, can effectively reduce the coupling upset power consumption of bus.
Accompanying drawing explanation
Fig. 1 bus code basic structure;
Fig. 2 bus code apparatus structure schematic diagram provided by the invention;
Fig. 3 bus encoding/decoding apparatus structure schematic diagram provided by the invention;
The coupling upset counting diagram of adjacent two BITBUS network of Fig. 4.
Detailed description of the invention
Below embodiments of the invention being elaborated, the present embodiment is carried out under premised on technical solution of the present invention, gives detailed embodiment and concrete operating process, but protection scope of the present invention is not limited to following embodiment.
The invention provides a kind of coding and decoding device reducing bus coupling upset, for reducing the coupling upset power consumption of bus.Code device utilize the coding data that bus previous moment transmits current time is needed the uncoded data of transmission carry out XOR coding, with or coding, and XOR is encoded data, with or coding data, reversion coding data, true form coding data in the coding data coupling of opposite bus previous moment transmission overturn the coding data of least number of times and deliver to bus is transmitted.Code device selects the coding data of coupling upset least number of times to be transmitted all the time, therefore can effectively reduce the coupling upset power consumption of bus.
Below in conjunction with accompanying drawing 2 and accompanying drawing 3, technical scheme is described in detail.
Fig. 2 is bus code device provided by the invention, and Fig. 3 is bus encoding/decoding device provided by the invention.An encoder is had, for needing the data sent to be encoded bus current time at bus transmitting terminal;A decoder is had, for the decoding data that bus current time is received at bus receiving terminal.Wherein the input of encoder needs the uncoded data D of transmission for bus current timek, its bit wide is N;Encoder is output as the coding data S that bus current time sendsk, its bit wide is N+2, consistent with bus bit wide;Coding data 2-bit more than uncoded data.The input of decoder is the coding data S in busk;Decoder is output as SkData L after being decodedk, its bit wide is N, Lk=Dk。
Encoder includes:
First depositor, for preserving the coding data S that bus previous moment sendsk-1, its input for bus current time transmission coding data Sk。
True form coding unit, the not uncoded data D to inputkDo any process, be only to increase the flag information 00 of 2-bit, be output as S_org, S_org={2 ' b00, Dk}。
XOR coding unit, inputs as 2-bit flag information 01, uncoded data Dk, the coding data S of bus previous moment transmissionk-1, it is output as S_xor, S_xor={2 ' and b01, Dk^Sk-1[N-1:0]}。
With or coding unit, input as 2-bit flag information 10, uncoded data Dk, the coding data S of bus previous moment transmissionk-1, it is output as S_xnor, S_xnor={2 ' and b10, Dk~^Sk-1[N-1:0]}。
Reversion coding unit, inputs as 2-bit flag information 11, uncoded data Dk, it is output as S_inv, S_inv={2 ' and b11 ,~Dk}。
First coupling rollover counter, is used for calculating the relative S of S_orgk-1The coupling upset number occurred, inputs as S_org, Sk-1, it is output as coupling upset number N_org.The coupling upset counting of adjacent two BITBUS network is as shown in Figure 4.Wherein 01 to become 10,10 coupling upset numbers when becoming 01 maximum.
Second coupling rollover counter, is used for calculating the relative S of S_xork-1The coupling upset number occurred, inputs as S_xor, Sk-1, it is output as coupling upset number N_xor.
3rd coupling rollover counter, is used for calculating the relative S of S_xnork-1The coupling upset number occurred, inputs as S_xnor, Sk-1, it is output as coupling upset number N_xnor.
4th coupling rollover counter, is used for calculating the relative S of S_invk-1The coupling upset number occurred, inputs as S_inv, Sk-1, it is output as coupling upset number N_inv.
Four road comparators, for calculating number minimum in N_org, N_xor, N_xnor, N_inv, and generate flag information flag.If N_org is minimum, then flag=2 ' b00;If N_xor is minimum, then flag=2 ' b01;If N_xnor is minimum, then flag=2 ' b10;If N_inv is minimum, then flag=2 ' b11.
First selector, the flag information flag for generating according to four road comparators selects one in S_org, S_xor, S_xnor, S_inv as coding data SkIt is sent in bus.If flag=2 ' b00, then Sk=S_org;If flag=2 ' b01, then Sk=S_xor;If flag=2 ' b10, then Sk=S_xnor;If flag=2 ' b11, then Sk=S_inv.
Decoder includes:
Second depositor, for preserving the coding data S that bus previous moment sendsk-1, its input for bus current time transmission coding data Sk。
True form decoding unit, inputs as coding data Sk, it is output as SkData D_org, the D_org=S obtained after removing high two bit flag informationk[N-1:0]。
XOR decoding unit, inputs as coding data Sk, the coding data S of bus previous moment transmissionk-1, it is output as D_xor, D_xor=Sk[N-1:0]^Sk-1[N-1:0]。
With or decoding unit, input into coding data Sk, the coding data S of bus previous moment transmissionk-1, it is output as D_xnor, D_xnor=Sk[N-1:0]~^Sk-1[N-1:0]。
Reversion decoding unit, inputs as coding data Sk, it is output as D_inv, D_inv=~Sk[N-1:0]。
Second selector, for according to coding data SkHigh two bit flag information Sk[N+1:N] selects one in D_org, D_xor, D_xnor, D_inv as decoding data Lk.If Sk[N+1:N]=2 ' b00, then Lk=D_org;If Sk[N+1:N]=2 ' b01, then Lk=D_xor;If Sk[N+1:N]=2 ' b10, then Lk=D_xnor;If Sk[N+1:N]=2 ' b11, then Lk=D_inv.
The concrete application of the present invention is described below by way of an example.
Assume the uncoded data D that bus current time to sendk=8 ' b1101_1010, bit wide is 8-bit;The coding data S that bus previous moment sendsk-1=10 ' b00_1100_1101, bit wide is 10-bit.Then true form coding, XOR coding, with or coding, reversion coding be respectively as follows:
S_org=10 ' b00_1101_1010;
S_xor=10 ' b01_0001_0111;
S_xnor=10 ' b10_1110_1000;
S_inv=10 ' b11_0010_0101;
The relative S of S_org, S_xor, S_xnor, S_invk-1Coupling upset number be respectively as follows:
N_org=0+0+0+0+1+0+1+2+2=6;
N_xor=1+2+0+0+1+2+1+0+0=7;
N_xnor=1+0+0+0+1+0+1+0+0=3;
N_inv=0+2+0+2+1+0+1+0+0=6;
Four road comparators can judge that N_xnor is minimum coupling upset number, produces flag information flag=2 ' b10;
First selector is selected S_xnor according to flag=2 ' b10 and is sent in bus as coding data, namely
Sk=10 ' b10_1110_1000;
The coupling upset number of the coding data that the relative previous moment of coding data now sent in bus sends is only 3.Encoder selects the coding data of coupling upset least number of times to be transmitted, and can effectively reduce the coupling upset power consumption of bus.
At bus receiving terminal, true form decoding, XOR decoding, with or decoding, reversion decoding be respectively as follows:
D_org=8 ' b1110_1000;
D_xor=8 ' b0010_0101;
D_xnor=8 ' b1101_1010;
D_inv=8 ' b0001_0111;
Second selector is according to Sk[9:8]=2 ' b10 selects D_xnor as decoding data, namely
Lk=8 ' b1101_1010;Lk=Dk。
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all any amendment, equivalent replacement and improvement etc. made within the spirit and principles in the present invention, should be included within protection scope of the present invention.
Claims (10)
1. the coding and decoding device reducing bus coupling upset, it is connected with uncoded data including input, exports the encoder being connected with bus transmitting terminal, input is connected with bus receiving terminal, exports the decoder being connected with decoding data, it is characterised in that described encoder includes:
True form coding unit, XOR coding unit, same or coding unit, reversion coding unit, being respectively used to uncoded data carry out true form coding, XOR coding, same or coding, reversion coding, their input is connected with uncoded data, two bit flag information;
First coupling upset counting unit, second coupling upset counting unit, the 3rd coupling upset counting unit, the 4th coupling upset counting unit, be respectively used to calculate the output of true form coding unit, XOR coding unit output, with or coding unit output, reversion coding unit output opposite bus previous moment transmission coding data coupling overturn number;
Four road comparators, for calculating number minimum in the output of the first coupling upset output of counting unit, the second coupling upset output of counting unit, the 3rd coupling upset output of counting unit, the 4th coupling upset counting unit, and generate corresponding two bit flag information;
First selector, the output according to four road comparators, select the output of true form coding unit, XOR coding unit output, with or coding unit output, reversion coding unit output in one as coding data be sent in bus;
First depositor, input is connected with the coding data in bus, for preserving the coding data of bus previous moment transmission;
Described decoder includes:
True form decoding unit, XOR decoding unit, same or decoding unit, reversion decoding unit, be respectively used to coding data carry out true form decoding, XOR decoding, same or decoding, decoding of reversing, and their input is connected with the coding data in bus;
Second selector, for according to the coding data in bus high two bit flag information select the outputs of true form decoding unit, XOR decoding unit output, with or decoding unit output, reversion decoding unit output in one as decoding data;
Second depositor, input is connected with the coding data in bus, for preserving the coding data of bus previous moment transmission.
2. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterised in that described true form coding unit is output as uncoded data increases the result of two bit flag information.
3. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterized in that, the input of described XOR coding unit is also connected with the coding data of bus previous moment transmission, is output as making xor operation and increasing the result of two bit flag information after the coding data of uncoded data and bus previous moment transmission remove high two bit flag information.
4. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterized in that, described same or coding unit input is also connected with the coding data of bus previous moment transmission, is output as after uncoded data remove high two bit flag information with the coding data of bus previous moment transmission and makes result that is same or that operate and increase by two bit flag information.
5. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterised in that described reversion coding unit increases the result of two bit flag information after being output as uncoded data-conversion.
6. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterised in that the coding data that described true form decoding unit is output as in bus remove the result after high two bit flag information.
7. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterized in that, the input of described XOR decoding unit is also connected with the coding data of bus previous moment transmission, and the coding data that the coding data being output as in bus are transmitted with bus previous moment after removing high two bit flag information make the result of xor operation after removing high two bit flag information.
8. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterized in that, described same or decoding unit input is also connected with the coding data of bus previous moment transmission, and the coding data being output as in bus make result that is same or that operate after removing high two bit flag information with the coding data of bus previous moment transmission after removing high two bit flag information.
9. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterised in that the result that the coding data that described reversion decoding unit is output as in bus negate after removing high two bit flag information.
10. the coding and decoding device of minimizing bus according to claim 1 coupling upset, it is characterised in that described two bit flag information encode the type of coding of data on record trunk.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112712834A (en) * | 2019-10-25 | 2021-04-27 | 长鑫存储技术(上海)有限公司 | Write operation circuit, semiconductor memory and write operation method |
CN114039704A (en) * | 2021-12-21 | 2022-02-11 | 海光信息技术股份有限公司 | Data transmission method and related device |
WO2024098600A1 (en) * | 2022-11-10 | 2024-05-16 | 山东云海国创云计算装备产业创新中心有限公司 | Encoding method and system, device, and storage medium |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1877995A (en) * | 2006-01-24 | 2006-12-13 | 华为技术有限公司 | Method and apparatus for transmitting chip interface data |
CN101771497A (en) * | 2008-12-31 | 2010-07-07 | 华为技术有限公司 | Signal transmitting method and device |
CN102611951A (en) * | 2012-03-12 | 2012-07-25 | 东南大学 | Method for reducing power consumption of integrated circuit system of Ethernet passive optical network physical layer |
-
2016
- 2016-02-01 CN CN201610077048.1A patent/CN105760329B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1877995A (en) * | 2006-01-24 | 2006-12-13 | 华为技术有限公司 | Method and apparatus for transmitting chip interface data |
CN101771497A (en) * | 2008-12-31 | 2010-07-07 | 华为技术有限公司 | Signal transmitting method and device |
CN102611951A (en) * | 2012-03-12 | 2012-07-25 | 东南大学 | Method for reducing power consumption of integrated circuit system of Ethernet passive optical network physical layer |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112712834A (en) * | 2019-10-25 | 2021-04-27 | 长鑫存储技术(上海)有限公司 | Write operation circuit, semiconductor memory and write operation method |
CN114039704A (en) * | 2021-12-21 | 2022-02-11 | 海光信息技术股份有限公司 | Data transmission method and related device |
WO2024098600A1 (en) * | 2022-11-10 | 2024-05-16 | 山东云海国创云计算装备产业创新中心有限公司 | Encoding method and system, device, and storage medium |
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