CN107123670B - 鳍式场效应晶体管及其形成方法 - Google Patents
鳍式场效应晶体管及其形成方法 Download PDFInfo
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Abstract
描述一种鳍式场效应晶体管,其包括衬底、至少一个栅极结构、间隔件以及应变源极和漏极区。至少一个栅极结构设置在衬底上方以及隔离结构上。间隔件设置在至少一个栅极结构的侧壁上。第一阻挡材料层设置在间隔件上。应变源极和漏极区设置在至少一个栅极结构的两个相对侧上。第二阻挡材料层设置在应变源极和漏极区上。第一阻挡材料层和第二阻挡材料层包括富氧氧化物材料。本发明实施例还提供一种用于形成鳍式场效应晶体管的方法。
Description
技术领域
本发明实施例涉及半导体领域,并且更具体地,涉及鳍式场效应晶体管及其形成方法。
背景技术
随着传统平面MOSFET的尺寸收缩已经遇到诸如漏致势垒降低(DIBL)、器件的波动特性以及电流泄露的问题,已经开发诸如鳍式场效应晶体管(FinFET)的三维多栅极结构作为替代物。
发明内容
根据本发明的一个方面,提供一种鳍式场效应晶体管,包括:衬底,具有隔离结构和位于隔离结构之间的鳍;至少一个栅极结构,设置在衬底上方并且在隔离结构上;间隔件,设置在至少一个栅极结构的侧壁上;第一阻挡材料层,设置在间隔件上;应变源极和漏极区,设置在至少一个栅极结构的相对侧上;以及第二阻挡材料层,设置在应变源极和漏极区上,其中,第一阻挡材料层和第二阻挡材料层包括富氧氧化物材料。
根据本发明的另一方面,提供一种鳍式场效应晶体管,包括:衬底,具有隔离结构和位于隔离结构之间的鳍;至少一个栅极结构,设置在鳍上方并且在隔离结构上;间隔件,间隔件设置在至少一个栅极结构的侧壁上;第一阻挡材料层,设置在间隔件的表面上,其中,第一阻挡材料层包括带负电荷的层;应变源极和漏极区,设置在至少一个栅极结构的相对侧上;以及第二阻挡材料层,设置在应变源极和漏极区的表面上,其中,第二阻挡材料层包括带负电荷的氧化硅层。
根据本发明的另一方面,提供一种用于形成鳍式场效应晶体管的方法,包括:提供具有隔离结构和位于隔离结构之间的鳍的衬底;在隔离结构上和鳍上方形成至少一个堆叠结构;在至少一个堆叠结构的侧壁上形成间隔件;在衬底中以及在至少一个堆叠结构的两个相对侧上形成应变源极和漏极区;通过实施氧化处理在间隔件上形成第一阻挡材料层以及在应变源极和漏极区上形成第二阻挡材料层;以及在去除至少一个堆叠结构后,在隔离结构上和鳍上方形成至少一个栅极结构。
附图说明
当结合附图实施阅读时,根据下面详细的描述可以最佳地理解本发明的各个方面。应该注意,根据工业中的标准实践,各个部件没有按比例绘制。实际上,为了清楚的讨论,各个部件的尺寸可以任意增加或减少。
图1示出了根据本发明的一些实施例的示例性FinFET的立体图。
图2A至图2G是根据本发明的一些实施例示出的用于形成FinFET的制造方法的各个阶段的FinFET的截面图和立体图。
图3是根据本发明的一些实施例示出的用于形成FinFET的制造方法的工艺步骤的示例性流程图。
具体实施方式
以下公开内容提供了许多不同的实施例或实例以实现本发明的不同特征。下面描述组件和布置的具体实例以简化本发明。当然,这些仅是实例并且不意欲限制本发明。例如,在以下描述中,在第二部件上方或上形成第一部件可以包括第一部件和第二部件直接接触的实施例,也可以包括形成在第一部件和第二部件之间的附加部件,使得第一部件和第二部件不直接接触的实施例。此外,本发明可以在各个实例中重复参考标号和/或字符。这种重复是为了简化和清楚的目的,并且其本身并不表示所讨论的实施例和/或配置之间的关系。
此外,为了便于描述,本文中可以使用诸如“在…下方”、“在…下面”、“下部”、“在…上面”、“上部”等的空间关系术语,以描述如图中所示的一个元件或部件与另一元件或部件的关系。除了图中所示的方位外,空间关系术语旨在包括器件在使用或操作过程中的不同方位。装置可以以其他方式定位(旋转90度或在其他方位),并且在本文中使用的空间关系描述符可以同样地作相应地解释。
本发明的实施例描述了FinFET的示例性制造工艺和由该工艺制造的FinFET。在本发明的特定实施例中,FinFET可以形成在单晶半导体衬底上,单晶半导体衬底诸如块状硅衬底。在一些实施例中,FinFET可以可选地形成在绝缘体上硅(SOI)衬底上或者绝缘体上锗(GOI)衬底上。此外,根据实施例,硅衬底可以包括其它导电层、掺杂区或其它半导体元件,其它半导体元件诸如晶体管、二极管等。该实施例旨在用于说明目的而并非意欲限制本公开的范围。
图1示出了根据本发明的一些实施例的实例FinFET的截面图。图2A至图2G示出了根据本发明的一些实施例的用于形成FinFET的制造方法的各个阶段处的FinFET。在图1中,FinFET 20包括在衬底100上形成的至少一个栅极结构120,在栅极结构120的相对侧上形成的间隔件112和第一阻挡材料层114a,以及位于栅极结构120之下的沟道区102。FinFET 20包括在衬底100内和在隔离结构103之间形成的应变源极和漏极区130,在应变源极区和漏极区130的表面上形成的第二阻挡材料层。在一些实施例中,隔离结构103是沟槽隔离结构。在特定的实施例中,沟槽隔离结构是条形并且沟槽隔离结构110平行布置。应变源极和漏极区130位于栅极结构120的两个相对侧处。在一些实施例中,FinFET 20是p沟道FinFET。在一些实施例中,FinFET 20是n沟道FinFET。
在图2A中,提供了衬底100。例如,衬底100为单晶半导体衬底或SOI衬底。在一些实施例中,衬底100是硅衬底。衬底100包括用于电隔离的隔离结构103(图1)和位于隔离结构103之间的鳍102。在一个实施例中,通过蚀刻衬底100形成鳍102以形成沟槽。在一个实施例中,通过填充在具有介电材料的衬底中的沟槽形成隔离结构103,介电材料诸如氧化硅和旋涂材料。
参考图2A,堆叠结构110形成在衬底100上,并且堆叠结构110形成在隔离结构103上,同时堆叠结构110穿过鳍102同时堆叠结构110位于鳍102上方。在一些实施例中,堆叠结构110是平行布置的条形结构并且堆叠结构110的延伸方向垂直于鳍102的延伸方向。在图2A中,示出了两个堆叠结构110,并且堆叠结构110的数量仅用于说明的目的并不是为了限制本发明的结构。在特定的实施例中,堆叠结构110包括多晶硅条106和位于多晶硅条106上的硬掩模条108。在一些实施例中,通过沉积多晶硅层(未示出)形成堆叠结构110,硬掩模层(未示出)在多晶硅层上方,并且随后图案化硬掩模层和多晶硅层以形成多晶硅条106和硬掩模条108。可选的,在形成多晶硅层之前形成氧化物层104以保护鳍102。在一些实施例中,硬掩模层的材料包括通过低压化学汽相沉积(LPCVD)或者等离子体增强化学汽相沉积(PECVD)形成的氮化硅。
在图2B中,在一些实施例中,在堆叠结构110的侧壁110b上形成间隔件112。即,间隔件112形成在硬掩模带108和多晶硅条106的侧壁上。在一个实施例中,通过沉积共形介电层(未示出)形成间隔件112并且随后回蚀介电层以在堆叠结构110的侧壁110b上形成单独的间隔件112。在一些实施例中,间隔件112可以由诸如氧化硅、氮化硅、碳化硅、硅碳氮氧化物(SiCON)或它们的组合的介电材料形成。间隔件112可以是单层或多层结构。
在图2C中,在一些实施例中,通过在预期用于源极和漏极区的位置去除部分的衬底100并且使用堆叠结构110和间隔件112作为蚀刻掩模,在堆叠结构110和间隔件112旁边在衬底100内形成凹槽105。通过使用一个或多个蚀刻工艺形成凹槽105,蚀刻工艺包括各向异性蚀刻,各向同性蚀刻或它们的组合。如图2C示出的,在一些实施例中,在衬底100内形成凹槽105后,通过在凹槽105内沉积应变材料来形成应变源极和漏极区130以填充凹槽105。在一些实施例中,一些应变源极和漏极区130稍微突出于衬底100和隔离结构103。由于应变源极和漏极区130位于沟道区102的相对侧上,并且应变材料的晶格常数不同于衬底100的材料的晶格常数,因此,施加应变或者应力沟道区102以增加器件的载流子迁移率和提高器件性能。此外,例如,应变源极和漏极区130可选的形成有覆盖层(未示出)并且覆盖层的材料包括轻掺杂或者未掺杂的含硅材料。
在特定的实施例中,应变材料包括锗化硅(SiGe)、磷化硅(SiP)或者碳化硅(SiC)。在凹槽105(源极和漏极区)内沉积的应变材料是应力诱导材料,其引起沟道区的单轴压缩应变。应用诸如SiGe的应变材料以用于P沟道FinFET的空穴迁移率增强。为提高在更高节点(诸如节点-28及以下)发展的P沟道FinFET的载流子迁移率,可以将SiGe中的Ge含量在特定范围内调整。类似地,应用诸如SiP的应变材料以用于n沟道FinFET的电子迁移率增强。在一些实施例中,通过外延生长形成应变源极和漏极区130。在一些实施例中,外延生长技术包括低压CVD(LPCVD)、原子层CVD(ALCVD)、超高真空CVD(UHVCVD)、减压CVD(PRCVD)、分子束外延(MBE)、金属有机汽相外延(MOVPE)或它们的组合。可选地,外延生长技术利用循环沉积蚀刻(CDE)外延工艺或选择性外延生长(SEG)工艺以形成高晶体质量的应变材料。
图2D是在制造方法的多个阶段之一处的FinFET的立体图,并且图2E是沿着图2D的线I-I’截取的FinFET的截面图。如图2D和图2E中示出的,第一阻挡材料层114a形成在间隔件112的表面112b上并且第二阻挡材料层114b形成在应变源极和漏极区130的顶面130a上。例如,第一阻挡材料层114a和第二阻挡材料层114b的厚度在从约1nm至约50nm的范围内。在特定的实施例中,第一阻挡材料层114a的厚度在从2nm至5nm的范围内。在特定的实施例中,第二阻挡材料层114b的厚度在从2nm至5nm的范围内。在一些实施例中,第一阻挡材料层114a和第二阻挡材料层114b在相同的时间形成。在特定的实施例中,通过对间隔件112施加氧化处理形成第一阻挡材料层114a,并且通过对应变源极和漏极区130施加氧化处理形成第二阻挡材料层114b。在一个实施例中,该氧化处理是低温基氧化处理,施加低温基氧化处理的操作温度范围从25℃至600℃。例如,氧化处理工艺包括:使用至少一种含有氧(O)的气体施加等离子处理。在氧化处理工艺中,通过在等离子处理中包括的中性自由基、离子、电子或者其组合物氧化间隔件112和/或应变源极和漏极区130的表面。在一些实施例中,第一阻挡材料层114a和第二阻挡材料层114b包括富氧氧化物材料。在一些实施例中,通过施加氧化处理形成第一阻挡材料层114a和第二阻挡材料层114b,氧化处理包括施加等离子处理,并且用于等离子处理的参数包括:在500瓦特至4000瓦特的功率、25℃至600℃的操作温度和0.5托至200托的操作压力下,具有约0.1slm至约30slm的氧气流量,以及约0.05slm至约10slm的氢气流量。在其它实施例中,通过施加氧化处理形成第一阻挡材料层114a和第二阻挡材料层114b,氧化处理包括施加等离子处理,并且用于等离子处理的制造参数包括:在500瓦特至4000瓦特的功率下、在300℃至400℃的操作温度和1托至20托的操作压力下,供应具有约0.1slm至约30slm的氧气流量的氧气和约0.05slm至约10slm的氢气流量的氢气。
在一些实施例中,第一阻挡材料层114a的材料包括氧化物,并且第二阻挡材料层114b的材料包括氧化物。在一些实施例中,第一阻挡材料层114a的氧含量大于间隔件112的氧含量。在一些实施例中,第二阻挡材料层114b的氧含量大于应变源极和漏极区130的氧含量。在特定的实施例中,例如,第一阻挡材料层114a的材料包括富氧氧化物材料,富氧氧化物材料诸如富氧硅氧化硅、富氧氮化硅、富氧硅碳氮氧化物或者其组合物。在一个实施例中,间隔件112的材料包括硅碳氮氧化物(SiCON),并且第一阻挡材料层114a的材料包括富氧SiCON。在一个实施例中,富氧SiCON的氧含量是8%至40%。在一个实施例中,间隔件112的材料包括氮化硅,并且第一阻挡材料层114a的材料包括富氧氮化硅或者富氧SiON。在一个实施例中,富氧SiCON的氧含量是8%至40%。在其它实施例中,间隔件112的材料包括氧化硅,并且第一阻挡材料层114a的材料包括富氧氧化硅。在特定的实施例中,例如,第二阻挡材料层114b的材料包括富氧氧化物材料,富氧氧化物材料诸如富氧氧化硅、富氧硅锗氧化物或者其组合物。在一些实施例中,富氧半导体材料氧化物通过MOx表示,其中,M是Si或者Ge,并且2.1≤x≤2.5。在一个实施例中,第二阻挡材料层114b的材料是富氧氧化硅,SiOx和2.1≤x≤2.5。
在其它实施例中,第一阻挡材料层114a和第二阻挡材料层114b包括带负电荷的层。在一个实施例中,富氧氧化物材料是带负电荷的。在一个实施例中,第一阻挡材料层114a包括带负电荷的SiCON层或者带负电荷的氧化硅层。在一个实施例中,第二阻挡材料层114b包括带负电荷的氧化硅层。在一些实施例中,带负电荷层的表面电荷含量从约-20*1010/cm2至约-150*1010/cm2。对比通过热氧化形成的正常氧化硅或者中性氧化硅,带负电荷氧化硅观察到较低的结合能。
通过第一阻挡材料层114a形成在间隔件112上和第二阻挡材料层114b覆盖应变源极和漏极区130的表面130a,降低了电子或空穴陷阱,减小了泄漏电流。在一些实施例中,由于在间隔件112的表面112b上形成了第一阻挡材料层114a(富氧SiCON层),在间隔件112的复合结构和在间隔件112上的第一阻挡材料层114a上提供低介电常数(4.5-5.0),导致寄生电容的减少并且提高了器件的操作速度。在一些实施例中,在应变源极和漏极区130的表面130a上的第二阻挡材料层114b(富氧氧化硅)覆盖了杂质和/或错位,同时降低了第二阻挡材料层114b的电子或者空穴陷阱。
图2F是在该制造方法的各个阶段的其中一个处的FinFET 20的立体图,并且图2G是沿着图2F的线I-I’截取的FinFET 20的截面图。如图2F和图2G中示出的,在一些实施例中,在去除堆叠结构110后,形成栅极结构120。在一个实施例中,在去除在间隔件112和第一阻挡材料层114a之间的多晶硅带106和位于多晶硅带106上的硬掩模带108后,随后在间隔件112之间和在第一阻挡材料层114a之间的凹槽内形成栅极介电层122和栅极电极层124。如图2F和图2G中示出的,栅极电极层124和栅极介电层122覆盖部分的鳍102,并且该覆盖部分用作沟道区(也标为102)。在一些实施例中,栅极介电层122的材料包括氧化硅,氮化硅或者它们的组合。在一些实施例中,栅极介电层122材料包括高k介电材料,并且高k介电材料具有大于约7.0的k值并且高k介电材料包括Hf、Al、Zr、La、Mg、Ba、Ti、Pb的金属氧化物或硅酸盐及其组合。在一些实施例中,通过原子层沉积(ALD)、分子束沉积(MBD)、物理汽相沉积(PVD)或者热氧化形成栅极介电层122。在一些实施例中,栅极电极层124包括含金属材料,含金属材料诸如Al、Cu、W、Co、Ti、Ta、Ru、TiN、TiAl、TiAlN、TaN、TaC、NiSi、CoSi或者其组合物。根据FinFET 100是P型FinFET还是n型FinFET,来选择栅极介电层122和/或栅极电极层124的材料。可选的,可以实施化学机械抛光(CMP)工艺以去除栅极介电层122和栅极电极层124的过量部分。间隔件112和第一阻挡材料层114a位于栅极介电层122和栅极电极层124的侧壁上。即,替代堆叠结构110并且形成的替代品栅极结构120在栅极结构120的两侧处具有间隔件112和第一阻挡材料层114a。在此描述的一些实施例中,栅极结构是替代栅极,但是栅极结构或者其制造工艺不通过这些实施例限制。
在图2F和图2G中,在一些实施例中,栅极结构120位于隔离结构103上同时栅极结构120位于衬底100上方,并且间隔件112和第一阻挡材料层114a位于栅极结构120的相对侧上。在特定的实施例中,应变源极和漏极区130位于栅极结构120的两个相对侧上同时应变源极和漏极区130位于隔离结构103之间,并且第二阻挡材料层114b位于应变源极和漏极区130的顶面130a上。
因此,由于通过第二阻挡材料层114b覆盖应变源极和漏极区130,高质量富氧氧化物的第二阻挡材料层114b减少电子或空穴陷阱并且减少电流泄漏。归因于低介电常数的间隔件,第一阻挡材料层114a设置在间隔件112上,因此降低了第一阻挡材料层114a的寄生电容。提升了FinFET器件结构的性能。
图3是根据本发明的一些实施例的示出用于形成FinFET的制造方法的一些工艺步骤的示例性流程图。
虽然该方法的步骤被示出和描述为一系列的动作和事件,但是应当理解,这些动作和事件的所示出的顺序不应解释为限制意义。此外,并非所有示出的工艺或步骤必须实施本发明的一个或多个实施例。
在步骤300中,提供了一种具有隔离结构的衬底和位于隔离结构之间的鳍。在步骤302中,在隔离结构上和在衬底上方形成至少一个堆叠结构。衬底是硅衬底或绝缘体上硅(SOI)衬底。在步骤304中,在堆叠结构的侧壁上形成侧壁间隔件。在步骤306中,在衬底中和在堆叠结构的两个相对侧处形成应变源极和漏极区。在步骤308中,通过实施氧化处理,在侧壁间隔件上形成第一阻挡材料层并且在应变源极和漏极区上形成第二阻挡材料层。在步骤310中,在去除堆叠结构后,在隔离结构上和在衬底上方形成至少一个栅极结构。
在上述的实施例中,通过实施氧化处理,在侧壁间隔件上形成第一阻挡材料层和在应变源极和漏极区上形成第二阻挡材料层包括带负电荷的高品质的富氧氧化物材料。氧化处理后生成的第一阻挡材料层和第二阻挡材料层可以减少电子或空穴陷阱以及泄露,同时提供低介电常数,因此第一阻挡材料层和第二阻挡材料层减少了寄生电容同时加强了器件操作速度。对于具有第一阻挡材料层和第二阻挡材料层的器件,提升了器件的电性能。
在本发明的一些实施例中,描述了一种鳍式场效应晶体管。鳍式场效应晶体管包括具有隔离结构的衬底和在隔离结构之间的鳍、至少一个栅极结构、间隔件、第一阻挡材料层和第二阻挡材料层以及应变源极和漏极区。至少一个栅极结构设置在衬底上方并且至少一个栅极结构在隔离结构上。间隔件设置在至少一个栅极结构的侧壁上。第一阻挡材料层设置在间隔件上。应变源极和漏极区设置在至少一个栅极结构的两个相对侧上。第二阻挡材料层设置在应变源极和漏极区上。第一阻挡材料层和第二阻挡材料层包括富氧氧化物材料。
在本发明的一些实施例中,描述了一种鳍式场效应晶体管。鳍式场效应晶体管包括具有隔离结构的衬底和在隔离结构之间的鳍、至少一个栅极结构、间隔件、第一阻挡材料层和第二阻挡材料层以及应变源极和漏极区。至少一个栅极结构设置在衬底上方并且至少一个栅极结构在隔离结构上。间隔件设置在至少一个栅极结构的侧壁上。第一阻挡材料层设置在间隔件的表面上。第一阻挡材料层包括带负电荷的层。应变源极和漏极区设置在至少一个栅极结构的相对侧上。第二阻挡材料层设置在应变源极和漏极区的表面上。第二阻挡材料层包括带负电荷的氧化硅层。
在本发明的一些实施例中,描述了一种用于形成鳍式场效应晶体管的方法。提供一种具有隔离结构的衬底和位于所述隔离结构之间的鳍。在隔离结构上和在鳍上方以及在衬底上方形成至少一个堆叠结构。在至少一个栅极结构的侧壁上形成侧壁间隔件。在衬底中和位于至少一个栅极结构的两个相对侧上形成应变源极和漏极区。通过实施氧化处理,在侧壁间隔件上形成第一阻挡材料层并且在应变源极和漏极区上形成第二阻挡材料层。在去除堆叠结构后,在隔离结构上和在鳍上方以及在衬底上方形成至少一个栅极结构。
根据本发明的一个方面,提供一种鳍式场效应晶体管,包括:衬底,具有隔离结构和位于隔离结构之间的鳍;至少一个栅极结构,设置在衬底上方并且在隔离结构上;间隔件,设置在至少一个栅极结构的侧壁上;第一阻挡材料层,设置在间隔件上;应变源极和漏极区,设置在至少一个栅极结构的相对侧上;以及第二阻挡材料层,设置在应变源极和漏极区上,其中,第一阻挡材料层和第二阻挡材料层包括富氧氧化物材料。
根据本发明的一个实施例,第一阻挡材料层的氧含量大于间隔件的氧含量。
根据本发明的一个实施例,间隔件的材料包括硅碳氮氧化物,并且第一阻挡材料层的材料包括富氧硅碳氮氧化物。
根据本发明的一个实施例,间隔件的材料包括氧化硅,并且第一阻挡材料层的材料包括富氧氧化硅。
根据本发明的一个实施例,第二阻挡材料层的氧含量大于应变源极和漏极区的氧含量。
根据本发明的一个实施例,应变源极和漏极区的材料包括锗化硅或者磷化硅,并且第二阻挡材料层的材料包括富氧氧化硅。
根据本发明的一个实施例,富氧氧化硅由SiOx表示并且2.1≤x≤2.5。
根据本发明的另一方面,提供一种鳍式场效应晶体管,包括:衬底,具有隔离结构和位于隔离结构之间的鳍;至少一个栅极结构,设置在鳍上方并且在隔离结构上;间隔件,间隔件设置在至少一个栅极结构的侧壁上;第一阻挡材料层,设置在间隔件的表面上,其中,第一阻挡材料层包括带负电荷的层;应变源极和漏极区,设置在至少一个栅极结构的相对侧上;以及第二阻挡材料层,设置在应变源极和漏极区的表面上,其中,第二阻挡材料层包括带负电荷的氧化硅层。
根据本发明的一个实施例,第一阻挡材料层的氧含量大于间隔件的氧含量。
根据本发明的一个实施例,间隔件的材料包括硅碳氮氧化物,并且带负电荷的层包括富氧硅碳氮氧化物。
根据本发明的一个实施例,间隔件的材料包括氧化硅,并且带负电荷的层包括富氧氧化硅。
根据本发明的一个实施例,第二阻挡材料层的氧含量大于应变源极和漏极区的氧含量。
根据本发明的一个实施例,应变源极和漏极区的材料包括锗化硅或者磷化硅,并且带负电荷的氧化硅层的材料由SiOx表示并且2.1≤x≤2.5。
根据本发明的另一方面,提供一种用于形成鳍式场效应晶体管的方法,包括:提供具有隔离结构和位于隔离结构之间的鳍的衬底;在隔离结构上和鳍上方形成至少一个堆叠结构;在至少一个堆叠结构的侧壁上形成间隔件;在衬底中以及在至少一个堆叠结构的两个相对侧上形成应变源极和漏极区;通过实施氧化处理在间隔件上形成第一阻挡材料层以及在应变源极和漏极区上形成第二阻挡材料层;以及在去除至少一个堆叠结构后,在隔离结构上和鳍上方形成至少一个栅极结构。
根据本发明的一个实施例,实施氧化处理包括以从25℃至600℃范围内的操作温度实施低温基氧化处理的。
根据本发明的一个实施例,实施氧化处理包括使用至少一种含氧气体应用等离子处理。
根据本发明的一个实施例,在间隔件上形成第一阻挡材料层以及在应变源极和漏极区上形成第二阻挡材料层包括通过应用等离子处理来处理间隔件和应变源极和漏极区的表面,以形成包括富氧氧化物材料的第一阻挡材料层和第二阻挡材料层。
根据本发明的一个实施例,在间隔件上形成第一阻挡材料层以及在应变源极和漏极区上形成第二阻挡材料层包括通过应用等离子处理来处理间隔件和应变源极和漏极区的处理表面,以形成包括带负电荷的层的第一阻挡材料层和第二阻挡材料层。
根据本发明的一个实施例,其中,在间隔件上形成第一阻挡材料层包括在间隔件上形成富氧硅碳氮氧化物层。
根据本发明的一个实施例,在应变源极和漏极区上形成第二阻挡材料层包括在应变源极和漏极区中形成富氧氧化硅层。
以上论述了若干实施例的部件,使得本领域的技术人员可以更好地理解本发明的各个方面。本领域技术人员应该理解,可以很容易地使用本发明作为基础来设计或更改其他的处理和结构以用于达到与本发明所介绍实施例相同的目的和/或实现相同优点。本领域技术人员也应该意识到,这些等效结构并不背离本发明的精神和范围,并且在不背离本发明的精神和范围的情况下,可以实施多种变化、替换以及改变。
Claims (16)
1.一种鳍式场效应晶体管,包括:
衬底,具有隔离结构和位于所述隔离结构之间的鳍;
至少一个栅极结构,设置在所述衬底上方并且在所述隔离结构上;
间隔件,设置在所述至少一个栅极结构的侧壁上;
第一阻挡材料层,设置在所述间隔件上;
应变源极和漏极区,设置在所述至少一个栅极结构的相对侧上;以及
第二阻挡材料层,设置在所述应变源极和漏极区上,其中,所述第一阻挡材料层和所述第二阻挡材料层包括富氧氧化物材料,以及所述第一阻挡材料层的氧含量大于所述间隔件的氧含量,
其中,所述间隔件的材料包括硅碳氮氧化物,并且所述第一阻挡材料层的材料包括富氧硅碳氮氧化物,或者
其中,其中,所述间隔件的材料包括氧化硅,并且所述第一阻挡材料层的材料包括富氧氧化硅。
2.根据权利要求1所述的晶体管,其中,所述第二阻挡材料层的氧含量大于所述应变源极和漏极区的氧含量。
3.根据权利要求2所述的晶体管,其中,所述应变源极和漏极区的材料包括锗化硅或者磷化硅,并且所述第二阻挡材料层的材料包括富氧氧化硅。
4.根据权利要求3所述的晶体管,其中,所述富氧氧化硅由SiOx表示并且2.1≤x≤2.5。
5.一种鳍式场效应晶体管,包括:
衬底,具有隔离结构和位于所述隔离结构之间的鳍;
至少一个栅极结构,设置在所述鳍上方并且设置在所述隔离结构上;
间隔件,所述间隔件设置在所述至少一个栅极结构的侧壁上;
第一阻挡材料层,设置在所述间隔件的表面上,其中,所述第一阻挡材料层包括带负电荷的层;
应变源极和漏极区,设置在所述至少一个栅极结构的相对侧上;以及
第二阻挡材料层,设置在所述应变源极和漏极区的表面上,其中,所述第二阻挡材料层包括带负电荷的氧化硅层,并且所述第二阻挡材料层的氧含量大于所述应变源极和漏极区的氧含量。
6.根据权利要求5所述的晶体管,其中,所述第一阻挡材料层的氧含量大于所述间隔件的氧含量。
7.根据权利要求6所述的晶体管,其中,所述间隔件的材料包括硅碳氮氧化物,并且所述带负电荷的层包括富氧硅碳氮氧化物。
8.根据权利要求6所述的晶体管,其中,所述间隔件的材料包括氧化硅,并且所述带负电荷的层包括富氧氧化硅。
9.根据权利要求5所述的晶体管,其中,所述应变源极和漏极区的材料包括锗化硅或者磷化硅,并且所述带负电荷的氧化硅层的材料由SiOx表示并且2.1≤x≤2.5。
10.一种用于形成鳍式场效应晶体管的方法,包括:
提供具有隔离结构和位于所述隔离结构之间的鳍的衬底;
在所述隔离结构上和所述鳍上方形成至少一个堆叠结构;
在所述至少一个堆叠结构的侧壁上形成间隔件;
在所述衬底中以及在所述至少一个堆叠结构的两个相对侧上形成应变源极和漏极区;
通过对所述间隔件和所述应变源极和漏极区的表面实施氧化处理在所述间隔件上形成第一阻挡材料层而没有覆盖所述隔离结构以及在所述应变源极和漏极区上形成第二阻挡材料层而没有覆盖所述隔离结构;以及
在去除所述至少一个堆叠结构后,在所述隔离结构上和所述鳍上方形成至少一个栅极结构。
11.根据权利要求10所述的方法,其中,实施所述氧化处理包括以从25℃至600℃范围内的操作温度实施低温基氧化处理的。
12.根据权利要求10所述的方法,其中,实施所述氧化处理包括使用至少一种含氧气体应用等离子处理。
13.根据权利要求12所述的方法,其中,在所述间隔件上形成第一阻挡材料层以及在所述应变源极和漏极区上形成第二阻挡材料层包括通过应用所述等离子处理来处理所述间隔件和所述应变源极和漏极区的表面,以形成包括富氧氧化物材料的所述第一阻挡材料层和所述第二阻挡材料层。
14.根据权利要求12所述的方法,其中,在所述间隔件上形成第一阻挡材料层以及在所述应变源极和漏极区上形成第二阻挡材料层包括通过应用所述等离子处理来处理所述间隔件和所述应变源极和漏极区的处理表面,以形成包括带负电荷的层的所述第一阻挡材料层和所述第二阻挡材料层。
15.根据权利要求10所述的方法,其中,在所述间隔件上形成第一阻挡材料层包括在所述间隔件上形成富氧硅碳氮氧化物层。
16.根据权利要求10所述的方法,其中,在所述应变源极和漏极区上形成第二阻挡材料层包括在所述应变源极和漏极区中形成富氧氧化硅层。
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