CN106816409A - Tft基板中电极层的制作方法及柔性tft基板的制作方法 - Google Patents

Tft基板中电极层的制作方法及柔性tft基板的制作方法 Download PDF

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CN106816409A
CN106816409A CN201710138323.0A CN201710138323A CN106816409A CN 106816409 A CN106816409 A CN 106816409A CN 201710138323 A CN201710138323 A CN 201710138323A CN 106816409 A CN106816409 A CN 106816409A
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tft substrate
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王幸
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US15/529,509 priority patent/US20180308942A1/en
Priority to PCT/CN2017/080078 priority patent/WO2018161400A1/zh
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Abstract

本发明提供一种TFT基板中电极层的制作方法及柔性TFT基板的制作方法。本发明TFT基板中电极层的制作方法，首先在硅衬底上形成一层金属镍层，然后采用化学气相沉积法在所述金属镍层上沉积一层石墨烯层，并采用等离子体蚀刻法对所述石墨烯层进行蚀刻，形成图案化的石墨烯层，最后将金属镍层溶解掉，使图案化的石墨烯层与硅衬底分离，将图案化的石墨烯层转移即可得到TFT基板的电极层，采用石墨烯材料的电极层具有优秀的导电及机械性能，同时具有较好的热学稳定性及化学稳定性，该制作方法实现了适用于柔性显示装置弯折的电极层的制作。

Description

TFT基板中电极层的制作方法及柔性TFT基板的制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种TFT基板中电极层的制作方法及柔性TFT基板的制作方法。
背景技术
在显示技术领域，柔性显示器是基于柔性有机材料作为基板的显示器，其具有薄而轻、高对比度、快速响应、宽视角、高亮度、全彩色等优点，可以被弯曲、折叠、甚至作为可穿戴计算机的一部分，因此在显示效果好的便携产品和军事等特殊领域有非常广泛的应用，因此柔性显示技术已然成为下一代主流显示技术。
有源矩阵阵列(Array)基板作为目前显示器中的主要结构部分，用于向显示器提供驱动电路，通常设置有数条栅极扫描线和数条数据线，该数条栅极扫描线和数条数据线限定出多个像素单元，每个像素单元内设置有薄膜晶体管(Thin Film Transistor，TFT)和像素电极，薄膜晶体管的栅极与相应的栅极扫描线相连，当栅极扫描线上的电压达到开启电压时，薄膜晶体管的源极和漏极导通，从而将数据线上的数据电压输入至像素电极，进而控制相应像素区域的显示。通常阵列基板上薄膜晶体管的结构又包括自下而上依次层叠设置于衬底基板上的栅极、栅极绝缘层、有源层、源漏极、及绝缘保护层。
其中，低温多晶硅(Low Temperature Poly-Silicon，LTPS)薄膜晶体管由于具有较高的电子迁移率，而在液晶显示器(Liquid Crystal Display，LCD)与有机发光二极管显示器(Organic Light Emitting Diode，OLED)等显示技术中得到了业界的重视，被视为实现低成本全彩平板显示的重要材料。因此，目前柔性显示装置主要采用低温多晶硅薄膜晶体管的阵列基板。而低温多晶硅薄膜晶体管的栅极材料主要采用单层金属钼，由于金属钼本身硬度较大，在柔性显示装置弯折过程中易发生穿晶断裂致电阻增大，最终导致电流传输慢、信号延迟的问题。
针对上述问题，提出一种适用柔性显示弯折技术要求的电极层的制作方法是非常必要的。
发明内容
本发明的目的在于提供一种TFT基板中电极层的制作方法，能够实现适用于柔性显示装置弯折的电极层的制作。
本发明的另一目的在于提供一种柔性TFT基板的制作方法，采用上述的TFT基板中电极层的制作方法来形成栅电极层，能够有效改善现有柔性显示装置弯折过程中易发生穿晶断裂致电阻增大的技术问题。
为实现上述目的，本发明首先提供一种TFT基板中电极层的制作方法，包括如下步骤：
步骤1、提供一硅衬底，在所述硅衬底上形成一层金属镍层；
步骤2、采用化学气相沉积法在所述金属镍层上沉积一层石墨烯层，采用等离子体蚀刻法对所述石墨烯层进行蚀刻，形成图案化的石墨烯层；
步骤3、将所述硅衬底上的金属镍层溶解掉，从而使图案化的石墨烯层与硅衬底分离，然后将图案化的石墨烯层转移，得到TFT基板的电极层。
所述步骤1中所形成的金属镍层的厚度为10～50nm。
所述步骤2中所沉积形成的石墨烯层的厚度为5～10nm。
所述步骤3中通过对位标记的方式将图案化的石墨烯层定位转移。
所述TFT基板为柔性的低温多晶硅TFT基板。
所述步骤3中形成的电极层为TFT基板的栅电极层。
本发明还提供一种使用上述TFT基板中电极层制作方法的柔性TFT基板的制作方法，包括如下步骤：
步骤10、提供玻璃基板，在所述玻璃基板上形成柔性基板；
步骤20、在柔性基板上依次形成缓冲层、有源层、栅极绝缘层；
步骤30、提供一硅衬底，在所述硅衬底上形成一层金属镍层；采用化学气相沉积法在所述金属镍层上沉积一层石墨烯层，采用等离子体蚀刻法对所述石墨烯层进行蚀刻，形成图案化的石墨烯层；将所述硅衬底上的金属镍层溶解掉，从而使图案化的石墨烯层与硅衬底分离，然后将图案化的石墨烯层转移到栅极绝缘层上，形成栅电极层；
步骤40、在栅极绝缘层、及栅电极层上依次形成层间绝缘层、源漏金属层。
所述柔性TFT基板为柔性的低温多晶硅TFT基板；
所述步骤10中所形成的柔性基板为聚酰亚胺基板，厚度为10～20μm；
所述步骤20中所形成的缓冲层、有源层、及栅极绝缘层的厚度分别为200～300nm、40～50nm、50～200nm；
所述步骤40中所形成的层间绝缘层、及源漏金属层的厚度分别为500～700nm、400～600nm。
所述步骤30中所形成的金属镍层的厚度为10～50nm，所沉积形成的石墨烯层的厚度为5～10nm。
所述步骤30中，通过对位标记的方式，将所述图案化的石墨烯层定位转移到栅极绝缘层上。
本发明的有益效果：本发明的TFT基板中电极层的制作方法，首先在硅衬底上形成一层金属镍层，然后采用化学气相沉积法在所述金属镍层上沉积一层石墨烯层，并采用等离子体蚀刻法对所述石墨烯层进行蚀刻，形成图案化的石墨烯层，最后将金属镍层溶解掉，使图案化的石墨烯层与硅衬底分离，将图案化的石墨烯层转移即可得到TFT基板的电极层，采用石墨烯材料的电极层具有优秀的导电及机械性能，同时具有较好的热学稳定性及化学稳定性，该制作方法实现了适用于柔性显示装置弯折的电极层的制作。本发明的柔性TFT基板的制作方法，采用上述的TFT基板中电极层的制作方法来形成栅电极层，能够有效改善现有柔性显示装置弯折过程中易发生穿晶断裂致电阻增大的技术问题。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为本发明的TFT基板中电极层的制作方法的流程示意图；
图2为本发明的TFT基板中电极层的制作方法的步骤1的示意图；
图3-4为本发明的TFT基板中电极层的制作方法的步骤2的示意图；
图5为本发明的TFT基板中电极层的制作方法的步骤3的示意图；
图6为本发明的柔性TFT基板的制作方法的流程示意图；
图7为本发明的柔性TFT基板的制作方法的步骤10的示意图；
图8为本发明的柔性TFT基板的制作方法的步骤20的示意图；
图9为本发明的柔性TFT基板的制作方法的步骤30的示意图；
图10为本发明的柔性TFT基板的制作方法的步骤40的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1，本发明首先提供一种TFT基板中电极层的制作方法，包括如下步骤：
步骤1、如图2所示，提供一硅衬底200，在所述硅衬底200上形成一层金属镍层300。
具体地，所述步骤1中所形成的金属镍层300的厚度为10～50nm。
步骤2、如图3所示，采用化学气相沉积法(Chemical VapourDeposition，CVD)在所述金属镍层300上沉积一层石墨烯层400，如图4所示，采用等离子体蚀刻法对所述石墨烯层400进行蚀刻，形成图案化的石墨烯层405。
具体地，所述步骤2中所沉积形成的石墨烯层400的厚度为5～10nm。
具体地，所述步骤2中采用等离子体增强化学气相沉积法(Plasma EnhancedChemical Vapor Deposition，PECVD)沉积形成石墨烯层400。
步骤3、如图5所示，将所述硅衬底200上的金属镍层300溶解掉，从而使图案化的石墨烯层405与硅衬底200分离，然后将图案化的石墨烯层405转移，得到TFT基板的电极层。
具体地，所述步骤3中通过对位标记的方式将图案化的石墨烯层405定位转移。
具体地，所述步骤3中采用稀硝酸溶液将金属镍层300溶解掉。
具体地，所述TFT基板为柔性的低温多晶硅TFT基板。
具体地，所述步骤3中形成的电极层为TFT基板的栅电极层。
由于石墨烯具有优秀的导电及机械性能，同时具有较好的热学稳定性及化学稳定性，且石墨烯的薄膜材料可通过化学气相沉积的方法实现，通过等离子体蚀刻法实现图案化，因此，本发明的TFT基板中电极层的制作方法，通过在硅衬底200上形成一层金属镍层300，然后再在金属镍层300上沉积一层石墨烯层400并进行蚀刻，形成图案化的石墨烯层405，最后将金属镍层300溶解掉，通过将图案化的石墨烯层405转移而得到TFT基板的电极层，实现了适用于柔性显示装置弯折的电极层的制作。
请参阅图6，在上述TFT基板中电极层的制作方法的基础上，本发明还提供一种使用该方法的柔性TFT基板的制作方法，具体包括如下步骤：
步骤10、如图7所示，提供玻璃基板100，在所述玻璃基板100上形成柔性基板101。
具体地，所述步骤10中所形成的柔性基板101为聚酰亚胺基板，厚度为10～20μm。
步骤20、如图8所示，在柔性基板101上依次形成缓冲层102、有源层103、栅极绝缘层104。
具体地，所述步骤20中所形成的缓冲层102、有源层103、及栅极绝缘层104的厚度分别为200～300nm、40～50nm、50～200nm。
具体地，所述柔性TFT基板为柔性的低温多晶硅TFT基板；所述有源层103的材料为低温多晶硅。
步骤30、如图9所示，并结合图2至图5，提供一硅衬底200，在所述硅衬底200上形成一层金属镍层300；采用化学气相沉积法在所述金属镍层300上沉积一层石墨烯层400，采用等离子体蚀刻法对所述石墨烯层400进行蚀刻，形成图案化的石墨烯层405；将所述硅衬底200上的金属镍层300溶解掉，从而使图案化的石墨烯层405与硅衬底200分离，然后将图案化的石墨烯层405转移到栅极绝缘层104上，形成栅电极层105。
具体地，所述步骤30中所形成的金属镍层300的厚度为10～50nm，所沉积形成的石墨烯层400的厚度为5～10nm。
具体地，所述步骤30中，通过对位标记的方式，将所述图案化的石墨烯层405定位转移到栅极绝缘层104上。
具体地，所述步骤300中采用稀硝酸溶液将金属镍层300溶解掉。
步骤40、如图10所示，在栅极绝缘层104、及栅电极层105上依次形成层间绝缘层106、源漏金属层107。
具体地，所述步骤40中所形成的层间绝缘层106、及源漏金属层107的厚度分别为500～700nm、400～600nm。
本发明的柔性TFT基板的制作方法，由于所述步骤30中形成的栅电极层105的材料为石墨烯，具有优秀的导电及机械性能，并同时具有较好的热学稳定性及化学稳定性，因此，能够有效改善现有采用金属钼材料作为栅电极层的柔性显示装置在弯折过程中易发生穿晶断裂致电阻增大的技术问题。
综上所述，本发明的TFT基板中电极层的制作方法，首先在硅衬底上形成一层金属镍层，然后采用化学气相沉积法在所述金属镍层上沉积一层石墨烯层，并采用等离子体蚀刻法对所述石墨烯层进行蚀刻，形成图案化的石墨烯层，最后将金属镍层溶解掉，使图案化的石墨烯层与硅衬底分离，将图案化的石墨烯层转移即可得到TFT基板的电极层，采用石墨烯材料的电极层具有优秀的导电及机械性能，同时具有较好的热学稳定性及化学稳定性，该制作方法实现了适用于柔性显示装置弯折的电极层的制作。本发明的柔性TFT基板的制作方法，采用上述的TFT基板中电极层的制作方法来形成栅电极层，能够有效改善现有柔性显示装置弯折过程中易发生穿晶断裂致电阻增大的技术问题。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种TFT基板中电极层的制作方法，其特征在于，包括如下步骤：
步骤1、提供一硅衬底(200)，在所述硅衬底(200)上形成一层金属镍层(300)；
步骤2、采用化学气相沉积法在所述金属镍层(300)上沉积一层石墨烯层(400)，采用等离子体蚀刻法对所述石墨烯层(400)进行蚀刻，形成图案化的石墨烯层(405)；
步骤3、将所述硅衬底(200)上的金属镍层(300)溶解掉，从而使图案化的石墨烯层(405)与硅衬底(200)分离，然后将图案化的石墨烯层(405)转移，得到TFT基板的电极层。
2.如权利要求1所述的TFT基板中电极层的制作方法，其特征在于，所述步骤1中所形成的金属镍层(300)的厚度为10～50nm。
3.如权利要求1所述的TFT基板中电极层的制作方法，其特征在于，所述步骤2中所沉积形成的石墨烯层(400)的厚度为5～10nm。
4.如权利要求1所述的TFT基板中电极层的制作方法，其特征在于，所述步骤3中通过对位标记的方式将图案化的石墨烯层(405)定位转移。
5.如权利要求1所述的TFT基板中电极层的制作方法，其特征在于，所述TFT基板为柔性的低温多晶硅TFT基板。
6.如权利要求1所述的TFT基板中电极层的制作方法，其特征在于，所述步骤3中形成的电极层为TFT基板的栅电极层。
7.一种柔性TFT基板的制作方法，其特征在于，包括如下步骤：
步骤10、提供玻璃基板(100)，在所述玻璃基板(100)上形成柔性基板(101)；
步骤20、在柔性基板(101)上依次形成缓冲层(102)、有源层(103)、栅极绝缘层(104)；
步骤30、提供一硅衬底(200)，在所述硅衬底(200)上形成一层金属镍层(300)；采用化学气相沉积法在所述金属镍层(300)上沉积一层石墨烯层(400)，采用等离子体蚀刻法对所述石墨烯层(400)进行蚀刻，形成图案化的石墨烯层(405)；将所述硅衬底(200)上的金属镍层(300)溶解掉，从而使图案化的石墨烯层(405)与硅衬底(200)分离，然后将图案化的石墨烯层(405)转移到栅极绝缘层(104)上，形成栅电极层(105)；
步骤40、在栅极绝缘层(104)、及栅电极层(105)上依次形成层间绝缘层(106)、源漏金属层(107)。
8.如权利要求7所述的柔性TFT基板的制作方法，其特征在于，所述柔性TFT基板为柔性的低温多晶硅TFT基板；
所述步骤10中所形成的柔性基板(101)为聚酰亚胺基板，厚度为10～20μm；
所述步骤20中所形成的缓冲层(102)、有源层(103)、及栅极绝缘层(104)的厚度分别为200～300nm、40～50nm、50～200nm；
所述步骤40中所形成的层间绝缘层(106)、及源漏金属层(107)的厚度分别为500～700nm、400～600nm。
9.如权利要求7所述的柔性TFT基板的制作方法，其特征在于，所述步骤30中所形成的金属镍层(300)的厚度为10～50nm，所沉积形成的石墨烯层(400)的厚度为5～10nm。
10.如权利要求7所述的柔性TFT基板的制作方法，其特征在于，所述步骤30中，通过对位标记的方式，将所述图案化的石墨烯层(405)定位转移到栅极绝缘层(104)上。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109449308A (zh) * 2018-10-30 2019-03-08 厦门信果石墨烯科技有限公司 一种石墨烯隔绝挡膜及制备方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113078054A (zh) * 2021-03-25 2021-07-06 中国科学院上海微***与信息技术研究所 一种电极层的制备方法及半导体结构

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012033869A1 (en) * 2010-09-08 2012-03-15 President And Fellows Of Harvard College Controlled synthesis of monolithically-integrated graphene structures
CN102568657A (zh) * 2012-02-21 2012-07-11 友达光电股份有限公司 一种透明导电层的制造方法
CN102629579A (zh) * 2011-09-29 2012-08-08 京东方科技集团股份有限公司 一种柔性tft阵列基板及其制造方法和显示装置
CN102741164A (zh) * 2009-12-15 2012-10-17 格尔德殿工业公司 石墨烯在基底上大面积的沉积及包含其之制品
CN103606514A (zh) * 2013-12-03 2014-02-26 西安电子科技大学 基于GaN衬底CVD外延生长石墨烯的化学腐蚀转移方法
CN103928295A (zh) * 2013-01-16 2014-07-16 中国科学院上海微***与信息技术研究所 一种将石墨烯转移到柔性衬底的方法
CN105321808A (zh) * 2015-07-30 2016-02-10 中国电子科技集团公司第五十五研究所 一种可避免有机污染的cvd石墨烯fet器件制造方法
CN105551949A (zh) * 2015-12-11 2016-05-04 中国电子科技集团公司第五十五研究所 采用二维石墨烯薄膜提高电子束纳米栅刻写中衬底导电性的方法
CN105679678A (zh) * 2016-03-18 2016-06-15 武汉华星光电技术有限公司 一种石墨烯薄膜晶体管的制备方法
CN106148909A (zh) * 2015-04-01 2016-11-23 南昌欧菲光学技术有限公司 一种在基材上图案化石墨烯的方法及用于所述方法的模板

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5097172B2 (ja) * 2009-06-23 2012-12-12 株式会社沖データ グラフェン層の剥離方法、グラフェンウエハの製造方法、及び、グラフェン素子の製造方法
CN101997035B (zh) * 2009-08-14 2012-08-29 清华大学 薄膜晶体管
US8992807B2 (en) * 2010-01-14 2015-03-31 Samsung Techwin Co., Ltd. Method of manufacturing deformation-capable graphene sheet, deformation-capable graphene sheet, and device using the same
US8440999B2 (en) * 2011-02-15 2013-05-14 International Business Machines Corporation Semiconductor chip with graphene based devices in an interconnect structure of the chip
US8772181B2 (en) * 2011-02-28 2014-07-08 Japan Science And Technology Agency Method for producing graphene, graphene produced on substrate, and graphene on substrate
KR20130006999A (ko) * 2011-06-28 2013-01-18 삼성디스플레이 주식회사 박막 트랜지스터 및 이의 제조 방법
CN102637584B (zh) * 2012-04-20 2014-07-02 兰州大学 一种图形化石墨烯的转移制备方法
KR101919424B1 (ko) * 2012-07-23 2018-11-19 삼성전자주식회사 트랜지스터 및 그 제조방법
CN103000535B (zh) * 2012-12-31 2016-04-13 西安电子科技大学 一种旁栅石墨烯场效应晶体管的制备方法
US20140205763A1 (en) * 2013-01-22 2014-07-24 Nutech Ventures Growth of graphene films and graphene patterns
JP6241318B2 (ja) * 2014-02-28 2017-12-06 富士通株式会社 グラフェン膜の製造方法及び半導体装置の製造方法
CN103922321B (zh) * 2014-03-21 2015-10-14 京东方科技集团股份有限公司 石墨烯的制备方法、薄膜晶体管、阵列基板及显示面板
KR102216543B1 (ko) * 2014-06-16 2021-02-17 삼성전자주식회사 그래핀-금속 접합 구조체 및 그 제조방법, 그래핀-금속 접합 구조체를 구비하는 반도체 소자
US9987830B2 (en) * 2015-08-18 2018-06-05 Infineon Technologies Ag Method for processing a carrier and method for transferring a graphene layer
CN105304495A (zh) * 2015-09-21 2016-02-03 京东方科技集团股份有限公司 薄膜晶体管及其制备方法、阵列基板

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102741164A (zh) * 2009-12-15 2012-10-17 格尔德殿工业公司 石墨烯在基底上大面积的沉积及包含其之制品
WO2012033869A1 (en) * 2010-09-08 2012-03-15 President And Fellows Of Harvard College Controlled synthesis of monolithically-integrated graphene structures
CN102629579A (zh) * 2011-09-29 2012-08-08 京东方科技集团股份有限公司 一种柔性tft阵列基板及其制造方法和显示装置
CN102568657A (zh) * 2012-02-21 2012-07-11 友达光电股份有限公司 一种透明导电层的制造方法
CN103928295A (zh) * 2013-01-16 2014-07-16 中国科学院上海微***与信息技术研究所 一种将石墨烯转移到柔性衬底的方法
CN103606514A (zh) * 2013-12-03 2014-02-26 西安电子科技大学 基于GaN衬底CVD外延生长石墨烯的化学腐蚀转移方法
CN106148909A (zh) * 2015-04-01 2016-11-23 南昌欧菲光学技术有限公司 一种在基材上图案化石墨烯的方法及用于所述方法的模板
CN105321808A (zh) * 2015-07-30 2016-02-10 中国电子科技集团公司第五十五研究所 一种可避免有机污染的cvd石墨烯fet器件制造方法
CN105551949A (zh) * 2015-12-11 2016-05-04 中国电子科技集团公司第五十五研究所 采用二维石墨烯薄膜提高电子束纳米栅刻写中衬底导电性的方法
CN105679678A (zh) * 2016-03-18 2016-06-15 武汉华星光电技术有限公司 一种石墨烯薄膜晶体管的制备方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109449308A (zh) * 2018-10-30 2019-03-08 厦门信果石墨烯科技有限公司 一种石墨烯隔绝挡膜及制备方法

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Application publication date: 20170609