CN106783834A - 一种模组化的光电二极管封装制造方法 - Google Patents
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Abstract
本发明公开了一种模组化的光电二极管封装制造方法,属于二极管封装技术领域,在基板上切V型槽以形成百个以上单元,在每个单元上制作通孔;将不发光二极管晶粒黏着于通孔内,用环氧树脂填充使不发光二极管晶粒固定在孔内;在基板下方印刷导电胶形成下导体层,使之与不发光二极管晶粒下表面连接;在基板上方印刷导电胶形成上导体层,使之与不发光二极管晶粒上表面连接;采用倒装LED晶粒,其N极与不发光二极管晶粒上方相连的部分上导体层连接,倒装LED晶粒P极与其余上导体层连接;将条状基板折裂成颗粒状元件。本发明采用模组化的光电二极管封装设计,提升产品的发光效率,增加产品的散热效率以及保证LED晶粒的安全性。
Description
技术领域
本发明涉及了一种模组化的光电二极管封装制造方法,属于二极管封装技术领域。
背景技术
随着科学技术的不断发展,电子产品更新迭代的速度也在加快,而LED贴片元件也在向小型化、集成化发展。目前市场上LED贴片的封装技术采用铜支架结合塑胶模型组成,当作载体以固晶、焊线、点胶的技术进行封装,再经剥粒冲压完成封装。
在此市场上的LED贴片封装技术,其产品封装后成品发光角度较小,不发光晶粒设置在发光区域硅胶内,影响发光效率,设计空间占用较多,较不适合小型化的设计需求。
发明内容
本发明所要解决的问题是一种模组化的光电二极管封装制造方法,有利于提高产品的发光效率,增大产品的发光角度,减少组件的占用空间,更适合小型化的产品设计需求。
为了解决上述技术问题,本发明所采用的技术方案是:
一种模组化的光电二极管封装制造方法,其制造步骤如下:
a、在基板上切V型槽以形成百个以上单元,在每个单元上制作通孔;
b、将不发光二极管晶粒黏着于通孔内,用环氧树脂填充使不发光二极管晶粒固定在孔内;
c、在基板下方印刷导电胶形成下导体层,使之与不发光二极管晶粒下表面连接;
d、在基板上方印刷导电胶形成上导体层,使之与不发光二极管晶粒上表面连接;
e、采用倒装LED晶粒,其N极与不发光二极管晶粒上方相连的部分上导体层连接,倒装LED晶粒P极与其余上导体层连接;
f、在基板上方覆上硅胶层封盖整片基板及LED晶粒和上、下导体层;
g、将基板V型槽对应位置的硅胶层上形成切缝;
h、将基板折裂成条状;
i、在基板两侧设置侧导体层,侧导体层连接上下导体层,形成端电极;
j、将条状基板折裂成颗粒状元件;
k、在端电极上形成具有焊锡金属导体层。
前述的一种模组化的光电二极管封装制造方法,所述基板为陶瓷材质。
前述的一种模组化的光电二极管封装制造方法,所述倒装LED芯片外延层的衬底,其能隙高于发光外延层的能隙。AlInGaN倒装LED芯片的衬底为蓝宝石Al2O3; AlxGa(1-x)As倒装LED芯片的衬底为AlyGa(1-y)As, x>y。
前述的一种模组化的光电二极管封装制造方法,所述倒装LED芯片发光波长从300nm到980nm之间,采用串并联型的集成LED芯片组成。
前述的一种模组化的光电二极管封装制造方法,所述不发光二极管晶粒可设计成梯形截面以降低晶粒重心,防止晶粒侧倾;在其上表面设置银质突块以增加导电性。
前述的一种模组化的光电二极管封装制造方法,所述不发光二极管晶粒作为倒装LED芯片保护二极管。
前述的一种模组化的光电二极管封装制造方法,所述硅胶为光学透明硅胶混合荧光粉的混粉胶。
前述的一种模组化的光电二极管封装制造方法,所述在基板V型槽对应位置的硅胶上形成切缝,其采用在硅胶上涂布感光绝缘漆,再经曝光、显影、去模,以形成切缝。
本发明的有益效果是:
1、采用倒装LED晶粒,减少光通量损耗,提升其发光效率;
2、将不发光二极管封装在陶瓷基板内,因陶瓷的导热系数大于环氧树脂,从而大幅提升其散热效率;
3、采用模组化的集成设计,在同一器件中兼具发光元件与电子元件的控制与保护的功能,有效减少产品的占用空间,满足小型化的设计需求。
附图说明
图1是本发明一种模组化的光电二极管封装制造流程图;
图2是本发明为有切切V型槽的基板结构侧视示意图;
图3是本发明为开孔后的基板结构侧视示意图;
图4是本发明于通孔内固晶的侧视示意图;
图5是本发明为不发光二极管梯形晶粒在通孔内固晶的侧视示意图;
图6是本发明为带有银质突块的不发光二极管晶粒封胶侧视示意图;
图7是本发明为不发光二极管晶粒填充环氧树脂侧视示意图;
图8是本发明为印刷下导体层的侧视示意图;
图9是本发明为印刷下导体层的立体示意图;
图10是本发明为印刷上导体层的立体示意图;
图11是本发明为LED倒装芯片固晶的立体示意图;
图12是本发明为LED倒装芯片与不发光二极管并联电路图;
图13是本发明在基板上封硅胶的侧视示意图;
图14是本发明在基板上封硅胶的立体示意图;
图15是本发明为对应基板切沟位置的硅胶切缝侧视示意图;
图16是本发明为基板折裂成条状的立体示意图;
图17是本发明为基板两侧附着导电胶形成端子的立体示意图;
图18是本发明为将条状基板折裂成颗粒的立体示意图;
图19是本发明为单颗产品内部结构的立体示意图。
图20是本发明为单颗串联集成LED芯片侧视示意图。
图21是本发明为单颗串联集成LED芯片电路图。
具体实施方式
为进一步阐述本产品的特征,以下结合说明书附图,对本发明的主要结构以及实施方法、步骤作进一步的说明。
如图1-图21所示,一种模组化的光电二极管封装制造方法,其制造步骤如下:
a、在基板1上切V型槽8以形成数百个以上单元,在每个单元上制作通孔;
b、将不发光二极管晶粒2黏着于通孔内,用环氧树脂3填充使不发光二极管晶粒固定在孔内;
c、在基板下方印刷导电胶形成下导体层4,使之与不发光二极管晶粒下表面连接;
d、在基板上方印刷导电胶形成上导体层5,使之与不发光二极管晶粒上表面连接;
e、采用倒装LED晶粒6,其N极与不发光二极管晶粒上表面相连的部分上导体层连接,倒装LED晶粒P极与其余上导体层(指不与不发光二极管晶粒上表面相连的上导体层)连接;
f、在基板上方覆上硅胶层7封盖整片基板及LED晶粒和导体层;
g、将基板V型槽8对应位置的硅胶层上形成切缝10;
h、将基板折裂成条状;
i、在基板两侧设置侧导体层8,侧导体层连接上下导体层,形成端电极;
j、将条状基板折裂成颗粒状元件;
k、在端电极上形成具有焊锡金属导体层。
所述不发光二极管晶粒设计成梯形截面以降低晶粒重心,防止晶粒侧倾,也可在其上表面设置银质突块9以增加导电性。该封装产品其发光角度达180°,采用模组化的集成封装技术,将保护二极管晶粒封在陶瓷基板内,减少了组件所占用空间,并提升了产品发光效率,也保证了产品的使用安全性,增加其使用生命周期。
综上所述,本发明提供一种模组化的集成光电二极管封装,通过对产品的结构及制造工艺进行重新设计及优化,在保护产品安全性的同时也提升了其光学特性,在LED市场将得到广泛的应用。
上述实施例不以任何形式限制本发明,凡采用等同替换或等效变换的方式所获得的技术方案,均落在本发明的保护范围。
Claims (10)
1.一种模组化的光电二极管封装制造方法,其制造步骤如下:
a、在基板(1)上切V型槽(8)以形成若干单元,在每个单元上制作通孔;
b、将不发光二极管晶粒(2)黏着于通孔内,用环氧树脂(3)填充使不发光二极管晶粒固定在孔内;
c、在基板下方印刷导电胶形成下导体层(4),使之与不发光二极管晶粒下表面连接;
d、在基板上方印刷导电胶形成上导体层(5),使之与不发光二极管晶粒上表面连接;
e、采用倒装LED晶粒(6),其N极与不发光二极管晶粒上方相连的部分上导体层连接,倒装LED晶粒P极与其余上导体层连接;
f、在基板上方覆上硅胶层(7)封盖整片基板及LED晶粒和上、下导体层;
g、将基板V型槽对应位置的硅胶层上形成切缝(10);
h、将基板折裂成条状;
i、在基板两侧设置侧导体层(8),侧导体层连接上下导体层,形成端电极;
j、将条状基板折裂成颗粒状元件;
k、在端电极上形成具有焊锡金属导体层。
2.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述基板(1)为陶瓷材质。
3.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述不发光二极管晶粒(2)为具有PN结结构,且不发光之半导体元件。
4.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述倒装LED晶粒(6)外延层的衬底,其能隙高于发光外延层的能隙。
5.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述倒装LED晶粒(6)发光波长从300nm到980nm之间。
6.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述倒装LED晶粒(6)采用串联型的集成LED晶粒组成倒装晶粒。
7.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述硅胶(7)为混合荧光粉的混粉胶。
8.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述在基板V型槽对应位置的硅胶层上形成切缝的具体过程为:采用在硅胶层上涂布感光绝缘漆,再经曝光、显影、去模,以形成切缝。
9.根据权利要求1所述的一种模组化的光电二极管封装制造方法,其特征在于:所述倒装LED晶粒(6)为串联型的集成AlInGaN LED晶粒组成的倒装晶粒。
10.根据权利要求9所述的一种模组化的光电二极管封装制造方法,其特征在于:所述不发光二极管晶粒与集成AlInGaN LED晶粒以并联电路连接。
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Publication number | Priority date | Publication date | Assignee | Title |
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TW200802996A (en) * | 2006-06-16 | 2008-01-01 | Shinko Electric Ind Co | Semiconductor device and method of manufacturing semiconductor device |
CN101350321A (zh) * | 2007-07-18 | 2009-01-21 | 晶科电子(广州)有限公司 | 直接倒装于支架内的发光二极管的制造方法 |
CN103959492A (zh) * | 2011-12-09 | 2014-07-30 | 日本特殊陶业株式会社 | 发光元件安装用布线基板 |
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TW200802996A (en) * | 2006-06-16 | 2008-01-01 | Shinko Electric Ind Co | Semiconductor device and method of manufacturing semiconductor device |
CN101350321A (zh) * | 2007-07-18 | 2009-01-21 | 晶科电子(广州)有限公司 | 直接倒装于支架内的发光二极管的制造方法 |
CN103959492A (zh) * | 2011-12-09 | 2014-07-30 | 日本特殊陶业株式会社 | 发光元件安装用布线基板 |
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