CN106716629B - 用于制造半导体布置结构的方法以及相应的半导体布置结构 - Google Patents

用于制造半导体布置结构的方法以及相应的半导体布置结构 Download PDF

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CN106716629B
CN106716629B CN201580051771.6A CN201580051771A CN106716629B CN 106716629 B CN106716629 B CN 106716629B CN 201580051771 A CN201580051771 A CN 201580051771A CN 106716629 B CN106716629 B CN 106716629B
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G·费特尔
A·阿佩斯迈尔
H·萨克尔
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Abstract

本发明涉及一种用于制造半导体布置结构(1)的方法，所述半导体布置结构至少具有基础元件(2)和半导体(3)，其中半导体(3)借助于烧结层(4)固定在基础元件(2)上。在此规定了，至少部分地对基础元件(2)的直接抵靠烧结层(4)的区域(9)进行打孔。本发明还涉及一种半导体布置结构(1)。

Description

用于制造半导体布置结构的方法以及相应的半导体布置结构
技术领域
本发明涉及一种用于制造半导体布置结构的方法，所述半导体布置结构至少具有基础元件和半导体，其中所述半导体借助于烧结层固定在基础元件上。本发明还涉及一种半导体布置结构。
背景技术
半导体布置结构至少由基础元件和半导体构成。基础元件例如作为基板或底板存在。基础元件可以用作冷却体，通过该冷却体把聚集在半导体上的热量导出至半导体布置结构的环境中。半导体应该优选无焊接地，即在不存在焊料的情况下固定在基础元件上。为此，设置了至少一个烧结层，该烧结层位于半导体和基础元件之间。
在此不必规定，烧结层直接抵靠在基础元件上和/或直接抵靠在半导体上，即例如直接布置在基础元件和半导体之间。而是完全可以规定，在基础元件和半导体之间存在至少一个中间层。
在此可以规定，该中间层借助于烧结层固定在基础元件上，尤其是直接地固定在基础元件上，从而烧结层一方面抵靠在中间层上且另一方面抵靠在基础元件上。另外的烧结层可以用于把半导体固定在中间层上，从而例如另外的烧结层既抵靠在半导体上也抵靠在中间层上。
在这种半导体布置结构的工作期间，会出现明显的温度负荷，由于该温度负荷产生了热应力，该热应力尤其作用于半导体和/或烧结层。这会导致半导体布置结构迅速老化，因为尤其在烧结层中形成了裂缝。
发明内容
因此本发明的任务在于，提出一种用于制造半导体布置结构的方法，该方法相对于现有技术具有的优点是，尤其避免了或者至少减少了形式为由于热应力导致的形成裂缝的前述缺点。
根据本发明，这通过具有权利要求1所述特征的方法实现。在此规定，至少部分地对基础元件的直接抵靠烧结层的区域进行打孔。在此，在基础元件的至少一个区域中，烧结层与该区域触碰接触。该区域至少部分地被打孔，即设有至少一个缺口。
基本上缺口可以任意设计。例如，其以通孔或盲孔的形式存在，其中通孔穿透基础元件，而盲孔具有封闭的底部。盲孔在此优选仅朝向烧结层方向敞开，在烧结层直接抵靠的区域中穿过基础元件的表面。
借助于打孔可以有针对性地调整基础元件的刚度，并进而影响其膨胀性能。通过这种方式，显著减小了烧结层的在热应力下的负荷，从而改善了半导体布置结构的寿命。
在本发明的另一个设计方案中规定了，在半导体固定到基础元件上之前进行打孔。即基础元件在烧结过程之前和/或在施加形成烧结层的坯件/未加工件之前已经具有了孔或至少一个缺口。这基本上是最简单且最价廉的设计。
此外，通过打孔改进了借助于烧结层的固定，因为烧结层或用于烧结层的坯件在其施加到基础元件上时就可以至少部分地***孔或至少一个缺口中。然而这纯粹是可选的。当然，烧结层或坯件当然也可以在其朝向基础元件的一侧上被设计为平坦的或者平坦地抵靠在基础元件上。
在本发明的另一个优选的设计方案中规定了，打孔包括对基础元件的区域制造至少一个缺口，尤其是多个缺口。之前已经指出，孔包括至少一个缺口。然而尤其优选实现了多个缺口，其中缺口尤其彼此间隔地存在于基础元件的区域中。在此，缺口可以构造为相同的或彼此不同。
例如，缺口的至少一部分，尤其是所有缺口的横截面是圆形的。然而缺口的另一部分或者备选地所有缺口也可以构造为长孔形，即例如设计为横截面为椭圆或球场形。后者可以理解为，从横截面观察，缺口由两个彼此平行的直线界定，所述线在两侧分别借助于弧线，例如半圆形彼此连接。
附加地或可选地，缺口的至少一部分可以作为通孔存在。优选所有缺口设计为通孔。然而附加地或可选地，另一部分也可以作为盲孔存在。例如所有缺口设计为盲孔。在一设计方案中，缺口可以分别具有彼此相同的距离。然而其也可以在所述区域中不规律分布地布置。
在本发明的另一个设计方案中规定了，至少一个缺口设计为边缘闭合(randgeschlossen)的通孔。上文已经讨论了这种缺口作为通孔的设计。其可以理解为，缺口完全穿透基础元件。然而缺口应该如此存在于基础元件中，即其从横截面看是边缘闭合的，即在横截面中观察具有闭合的边界。其尤其应该不穿过基础元件的边缘。
在本发明的另一个优选设计方案中规定了，基础元件具有平坦的面，所述平坦的面被至少一个缺口穿过，且在固定半导体之后，烧结层抵靠在该平坦的面上。因此，基础元件的、烧结层抵靠在其上的区域应该也是平坦的或以平坦的面存在。
本发明的改进方案规定了，基础元件如此设计，使得基础元件的相对于所述面成角度的区域与平坦的面邻接。在此，基础元件不是完全设计为平坦的，而是除了烧结层抵靠在其上的平坦的面之外还具有成角度的区域。例如，成角度的区域同样是平坦的且与所述平坦的面形成最小10°、最小20°、最小30°、最小40°、最小45°、最小50°、最小60°、最小70°、最小80°或者恰好90°的角度。在任何情况下，该角度最大为90°。
可以规定，所述平坦的面的两侧分别直接邻接这样的成角度的区域。此外，附加地或可选地规定了，在所述区域的背离平坦的面的一侧上邻接另外的平坦的面，该另外的平坦的面可以与所述平坦的面平行。换句话说，基础元件的、烧结层直接抵靠其上的区域还邻接如下区域，这些区域在所述平坦的面的垂直方向上与烧结层的间距大于平坦的面(与烧结层的间距)。这些另外的区域优选不被打孔，相反而是设计为实心的。这些区域尤其可以作为散热片存在，通过该散热片把聚集在半导体上的热量导出至半导体布置结构的环境中。
在本发明的改进方案中规定了，在固定之前在半导体上安置了接触层。半导体在此不是直接地，而是仅间接地通过接触层借助于烧结层固定在基础元件上。接触层在基础元件上的固定尤其借助于烧结层进行，从而烧结层既直接抵靠在基础元件上也直接抵靠在接触层上。
在本发明的有利的设计方案中规定了，DCB层或IMS层用作接触层。该接触层在此也可以称为接触基质，DCB层称为DCB基质以及IMS层称为IMS基质。DCB层可以理解为一种由两个外侧的铜层和一中间层形成的多层结构。例如，中间层由陶瓷或铝制成，尤其由Al2O3、Si3N4或者AIN制成。IMS层(IMS：Insulated Metal Substrate)例如可理解为铝芯导体板。
最后可以规定，作为IGBT中的半导体使用二极管或MOSFET。然而原则上，半导体可以任意设计。然而在所述实施方案中，特别明显地暴露了热应力的问题。
本发明还涉及了一种半导体布置结构，尤其是根据前述实施方案制造的半导体布置结构，所述半导体布置结构至少具有基础元件和半导体，其中半导体借助于烧结层固定在基础元件上。在此规定了，基础元件的直接抵靠在烧结层上的区域被至少部分地打孔。已经讨论了半导体布置结构的这种设计以及所述方法的优点。无论是半导体布置结构还是所述方法都能根据上述实施方案得到改进，从而在此参考上述实施方案。
附图说明
下面在不限制本发明的情况下，根据附图中示出的实施例进一步说明本发明。附图示出：
图1是半导体布置结构的一区域的剖面示图，所述半导体布置结构具有基础元件和借助于烧结层固定在基础元件上的半导体；以及
图2是基础元件的细部示图。
具体实施方式
图1示出半导体布置结构1的剖面示图，所述半导体布置结构具有基础元件2和半导体3，在此所述半导体仅局部示出。半导体3借助于烧结层4固定在基础元件2上。为此，烧结层4一方面直接接合在基础元件2上且另一方面直接接合在接触层5上，该接触层例如设计为DCB层且在此具有铜层6和基质层7。基质层7优选由Al2O3制成。
除了烧结层4外还可以设置至少一个另外的烧结层，在此处示出的实施例中设置了两个另外的烧结层8。烧结层8在基础元件2的区域9中直接抵靠在该区域上，其中基础元件2在该区域中具有平坦的面10。在此处示出的半导体布置结构1的视图中可以看出，与该平坦的面10邻接的是基础元件2的成角度的区域11。优选在所述面10的每侧都存在这种区域11。
通过区域11在基础元件2中形成了凹槽12，凹槽的底部13优选是平坦的且平行于所述平坦的面10延伸。在凹槽12的与面10或基质层7相背离的一侧上可以存在另外的平坦的面14，烧结层8形成在该平坦的面14上。面14可以平行于面10和/或与该面10处于同一虚拟平面中。
图2示出基础元件2的详细视图。明显看出，基础元件2在区域9中—烧结层4(此处未示出)直接抵靠在该区域中—至少部分被打孔，即具有至少一个缺口15，尤其是多个缺口15，在此仅示例性示出其中若干个。与此类似，也可以为面14—其上同样可以存在烧结层8—设有至少一个这种缺口15。在此同样仅示例性示出缺口15的若干个。可以看出，缺口15设计为通孔且横截面呈边缘闭合的圆形。然而，缺口15当然也可以作为盲孔存在，也可以具有任意其它横截面设计。
借助于对区域9打孔和优选也对面14打孔可以局部地减小基础元件2的刚度，从而在烧结层4和基础元件2之间存在热应力时更容易实现基础元件2的弹性变形。通过这种方式阻止或至少减小了由于该热应力导致的对烧结层4和/或半导体3的损坏。

Claims (7)

1.一种用于制造半导体布置结构(1)的方法，所述半导体布置结构至少具有基础元件(2)和半导体(3)，其中半导体(3)借助于烧结层(4)固定在基础元件(2)上，其特征在于，至少部分地对基础元件(2)的直接抵靠烧结层(4)的区域(9)进行打孔，以便有针对性地调整基础元件(2)的刚度，其中，所述打孔包括在基础元件(2)的区域(9)中制造多个穿透所述基础元件(2)的、边缘闭合的通孔(15)，其中所述烧结层(4)在其朝向基础元件(2)的一侧上被设计为平坦的，从而该烧结层(4)不接合到通孔(15)中。
2.根据权利要求1所述的方法，其特征在于，在半导体(3)固定在基础元件(2)上之前进行打孔。
3.根据权利要求1或2所述的方法，其特征在于，基础元件(2)具有平坦的面(10)，所述平坦的面被所述通孔(15)穿过且烧结层(4)在固定半导体(3)之后抵靠在所述平坦的面上。
4.根据权利要求3所述的方法，其特征在于，如此设计基础元件(2)，使得所述平坦的面(10)邻接于基础元件(2)的、相对于该面(10)成角度的区域(11)。
5.根据权利要求1或2所述的方法，其特征在于，在固定之前，在半导体(3)上安置接触层(5)。
6.根据权利要求1或2所述的方法，其特征在于，IGBT、二极管或MOSFET被用作半导体(3)。
7.一种半导体布置结构(1)，所述半导体布置结构根据权利要求1至6中任一项所述的方法制造，所述半导体布置结构至少具有基础元件(2)和半导体(3)，其中半导体(3)借助于烧结层(4)固定在基础元件(2)上，其特征在于，至少部分地对基础元件(2)的、直接抵靠烧结层(4)的区域(9)进行打孔，以便有针对性地调整基础元件(2)的刚度，其中，所述打孔包括在基础元件(2)的区域(9)中制造多个穿透所述基础元件(2)的、边缘闭合的通孔(15)，其中所述烧结层(4)在其朝向基础元件(2)的一侧上被设计为平坦的，从而该烧结层(4)不接合到通孔(15)中。
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