CN106531791A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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CN106531791A
CN106531791A CN201610827160.2A CN201610827160A CN106531791A CN 106531791 A CN106531791 A CN 106531791A CN 201610827160 A CN201610827160 A CN 201610827160A CN 106531791 A CN106531791 A CN 106531791A
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dielectric film
semiconductor device
electrode
film
nitride
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冈崎拓行
仓桥健郎
仓桥健一郎
小山英寿
北野俊明
加茂宣卓
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Mitsubishi Electric Corp
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Abstract

得到一种能够提高耐湿性而不使绝缘膜变厚的半导体装置及其制造方法。氮化物半导体膜(4)形成于衬底(1)上。栅极电极(6)形成于氮化物半导体膜(4)上。由氮化硅构成的第1绝缘膜(11)形成于氮化物半导体膜(4)上，与栅极电极(6)的侧面的至少一部分接触，在第1绝缘膜(11)与氮化物半导体膜(4)之间形成界面。由原子层交替排列的氧化铝构成的第2绝缘膜(12)覆盖栅极电极(6)及第1绝缘膜(11)。

Description

半导体装置及其制造方法
技术领域
本发明涉及一种能够提高耐湿性而不使绝缘膜变厚的半导体装置及其制造方法。
背景技术
在现有的装置中，为了提高耐压、改善电流崩塌(current collapse)而在栅极电极和半导体之间***绝缘膜来构成MIS(例如参照专利文献1)。另外，还存在如下装置，即，为了提高可靠性，在由Au构成的栅极金属和SiN绝缘膜间沉积有由氧化物或氮化物形成的阻挡层(例如参照专利文献2)。
专利文献1：日本特开2013－115323号公报
专利文献2：日本特开2012－175089号公报
在现有的高频设备用GaN－HEMT晶体管中，为了抑制半导体表面和对其进行保护的表面保护膜之间的陷阱(trap)，通常使用SiN(硅氮化物)来作为表面保护膜。另外，以覆盖栅极周围和表面保护膜的方式而形成有SiN耐湿膜。但是，存在下述问题，即，如果不使SiN耐湿膜的膜厚变厚，则不能提高耐湿性，然而如果使SiN耐湿膜变厚，则电容增大、RF特性下降。
发明内容
本发明就是为了解决上述课题而提出的，其目的在于得到一种能够提高耐湿性而不使绝缘膜变厚的半导体装置及其制造方法。
本发明所涉及的半导体装置的特征在于，具有：衬底；氮化物半导体膜，其形成于所述衬底上；肖特基电极，其形成于所述氮化物半导体膜上；第1绝缘膜，其由氮化硅构成，形成于所述氮化物半导体膜上，与所述肖特基电极的侧面的至少一部分接触，在所述第1绝缘膜与所述氮化物半导体膜之间形成界面；以及第2绝缘膜，其由原子层交替排列的氧化铝构成，覆盖所述肖特基电极及所述第1绝缘膜。
发明的效果
在本发明中，通过利用由原子层交替排列的氧化铝构成的第2绝缘膜覆盖肖特基电极及第1绝缘膜，从而能够提高耐湿性，而不使绝缘膜变厚。即，由于原子层交替排列的氧化铝的各向同性和覆盖性优异，因此与以往相比，即使是薄膜，耐水性等也提高。
附图说明
图1是表示本发明的实施方式1所涉及的半导体装置的剖视图。
图2是表示本发明的实施方式1所涉及的半导体装置的制造方法的剖视图。
图3是表示本发明的实施方式1所涉及的半导体装置的制造方法的剖视图。
图4是表示本发明的实施方式1所涉及的半导体装置的制造方法的剖视图。
图5是表示本发明的实施方式1所涉及的半导体装置的制造方法的剖视图。
图6是表示与第2绝缘膜的材质相应的HAST偏置试验的结果的图。
图7是表示与第2绝缘膜的材质相应的Ig－Vg、Id－Vg特性的图。
图8是表示与第2绝缘膜的材质相应的高温Vg扫描(sweep)时的破坏温度的图。
图9是表示本发明的实施方式1所涉及的半导体装置的变形例的剖视图。
图10是表示本发明的实施方式2所涉及的半导体装置的剖视图。
图11是表示本发明的实施方式3所涉及的半导体装置的剖视图。
图12是表示与有无源极场板相应的Ig－Vg、Id－Vg特性的图。
图13是表示本发明的实施方式3所涉及的半导体装置的变形例的剖视图。
图14是表示本发明的实施方式3所涉及的半导体装置的俯视图。
图15是表示本发明的实施方式3所涉及的半导体装置的俯视图。
图16是表示本发明的实施方式3所涉及的半导体装置的俯视图。
图17是表示本发明的实施方式4所涉及的半导体装置的剖视图。
图18是表示本发明的实施方式4所涉及的半导体装置的变形例的剖视图。
图19是表示本发明的实施方式5所涉及的半导体装置的剖视图。
标号的说明
1 衬底、4 Al1－xGaxN阻挡层(氮化物半导体膜)、6 栅极电极、7 源极电极、8 漏极电极、11 第1绝缘膜、12 第2绝缘膜、14 第3绝缘膜、15 源极场板、16 第4绝缘膜、17 第5绝缘膜
具体实施方式
参照附图，对本发明的实施方式所涉及的半导体装置及其制造方法进行说明。对相同或者相对应的结构要素标注相同的标号，有时省略重复的说明。
实施方式1
图1是表示本发明的实施方式1所涉及的半导体装置的剖视图。该半导体装置是具有肖特基电极的氮化镓类HEMT(场效应晶体管)。
衬底1由Si、SiC、GaN中的任意者构成，为了得到良好的高频特性，期望它的电阻率大于或等于1×107Ωcm。在衬底1上依次形成有Al1－xGaxN缓冲层2(x≤1)、GaN沟道层3以及Al1－xGaxN阻挡层4。也可以对GaN沟道层3的一部分或者全部掺杂C或者Fe等杂质。Al1－xGaxN阻挡层4由单一的组成或者多个组成的层叠构造构成。GaN－HEMT所特有的2DEG层5产生于GaN沟道层3中。
在Al1－xGaxN阻挡层4上形成有：作为肖特基电极的栅极电极6、作为欧姆电极的源极电极7以及漏极电极8。栅极电极6与Al1－xGaxN阻挡层4肖特基接合。源极电极7及漏极电极8与Al1－xGaxN阻挡层4欧姆接合。栅极电极6是包含Pt、Ti、Ni、Ta、Au、Al中任意的大于或等于2种金属的电极。源极电极7及漏极电极8是Pt、Ni、Ta中的任意者。在源极电极7及漏极电极8上分别形成有源极配线9及漏极配线10。
由SiN(氮化硅)构成的第1绝缘膜11形成于Al1－xGaxN阻挡层4上，与栅极电极6的侧面的至少一部分接触，在该第1绝缘膜11与Al1－xGaxN阻挡层4之间形成界面。第1绝缘膜11是使用CVD法或者溅射法形成的。由AlO(氧化铝)构成的第2绝缘膜12是在栅极电极6的上表面及侧面、以及第1绝缘膜11的至少与半导体接触的部分上利用ALD法(Atomic LayerDeposition：原子层沉积法)形成的，覆盖栅极电极6及第1绝缘膜11。ALD法是将原料气体交替地供给至反应室，利用自停止机理使原子层逐层生长的方法。
下面，对上述半导体装置的制造方法进行说明。图2～5是表示本发明的实施方式1所涉及的半导体装置的制造方法的剖视图。
首先，如图2所示，在衬底1上依次形成Al1－xGaxN缓冲层2(x≤1)、GaN沟道层3以及Al1－xGaxN阻挡层4。在Al1－xGaxN阻挡层4上形成源极电极7及漏极电极8。此外，为了降低欧姆接触电阻，也可以在电极之下通过Si离子注入以及热退火等而选择性地形成高浓度杂质层。
然后，如图3所示，以将Al1－xGaxN缓冲层2、源极电极7以及漏极电极8全部覆盖的方式，通过CVD法或者溅射法而形成第1绝缘膜11。然后，如图4所示，通过干式蚀刻或者湿式蚀刻而对栅极部分的第1绝缘膜11进行开口，通过蒸镀或者溅射法等而形成栅极电极6。关于栅极电极6的形状，只要比第1绝缘膜11厚即可，与有无GFP(栅极场板)无关。
然后，如图5所示，以覆盖栅极电极6及第1绝缘膜11的方式，通过ALD法而形成第2绝缘膜12。最后，通过干式蚀刻或湿式蚀刻，对源极电极7及漏极电极8上的第1绝缘膜11及第2绝缘膜12进行开口，通过蒸镀或者溅射法而形成源极配线9及漏极配线10。通过以上的工序来制造本实施方式所涉及的半导体装置。
如以上说明所述，在本实施方式中，利用由原子层交替排列的AlO构成的第2绝缘膜12覆盖栅极电极6及第1绝缘膜11。由此，能够提高耐湿性，而不使绝缘膜变厚。另外，通过由ALD法来形成第2绝缘膜12，从而在栅极电极6的周边及半导体表面未被金属等构造物覆盖的部分能够均匀地成膜。另外，能够形成在原子层沉积的特征即各向同性和覆盖性方面优异的AlO膜。因此，与以往相比，即使是薄膜，通过原子层的交替排列，从而耐水性等也提高。
图6是表示与第2绝缘膜的材质相应的偏置试验的结果的图。Ra为130℃，RH为85％，栅极电压Vg为－5V，漏极电压Vd为30V。与第2绝缘膜12为SiN的现有构造相比，通过ALD法形成由AlO构成的第2绝缘膜12的本实施方式的晶体管动作的耐湿性提高。
图7是表示与第2绝缘膜的材质相应的Ig－Vg、Id－Vg特性的图。该数据是漏极电压Vd为5V时的夹断曲线。与现有构造相比，本实施方式的Ig－Vg、Id－Vg特性得以改善。
图8是表示与第2绝缘膜的材质相应的高温Vg扫描时的破坏温度的图。漏极电压Vd为55V。与现有构造相比，本实施方式的破坏温度变高，破坏时的栅极电流变小。
图9是表示本发明的实施方式1所涉及的半导体装置的变形例的剖视图。在Al1－ xGaxN阻挡层4上***有GaN盖层(cap layer)13(膜厚小于或等于10nm)。在该情况下，也能够得到上述实施方式1的效果。
实施方式2
图10是表示本发明的实施方式2所涉及的半导体装置的剖视图。本实施方式是向实施方式1的构造追加了第3绝缘膜14的半导体装置，该第3绝缘膜14覆盖第2绝缘膜12。第3绝缘膜14是从Si、Al、Ti、Ta、W、Mo、Zr中选出的元素的氧化物或者氮化物。
由于通过层叠第3绝缘膜14，从而覆盖性提高，因此耐湿性进一步提高。另外，由于能够使膜应力缓和，因此能够抑制高温动作时的膜剥离异常等。
实施方式3
图11是表示本发明的实施方式3所涉及的半导体装置的剖视图。本实施方式是向实施方式1的构造追加了源极场板15的半导体装置。源极场板15配置于栅极电极6和漏极电极8之间，与源极电极7电连接。
通过源极场板15，能够提高栅极电极6周边的电场缓和效果。并且，通过电场缓和效果的提高，从而栅极漏电流降低，高温动作性也提高。另外，通过由源极场板15将从栅极电极6至漏极电极8的电力线隔断，从而能够降低栅极－漏极间电容，能够实现增益的提高。
图12是表示与有无源极场板(SFP)相应的Ig－Vg、Id－Vg特性的图。该数据是漏极电压Vd为5V时的夹断曲线。通过设置源极场板，从而Ig－Vg、Id－Vg特性得以改善。
图13是表示本发明的实施方式3所涉及的半导体装置的变形例的剖视图。是向实施方式2的构造追加了源极场板15的半导体装置。在该情况下，也能够得到上述效果。
图14～16是表示本发明的实施方式3所涉及的半导体装置的俯视图。在图14中，源极配线9的整个面与源极场板15接合。在图15中，源极配线9的一部分与源极场板15接合。如上所述，与源极配线9的至少1个部位接合即可。另外，如图16所示，也可以从源极配线9引绕至外侧而与源极场板15接合。由于上述形态具有大致相同的效果，因此，作为源极场板15和源极电极7的接合，可以使用整面接合、局部接合、以及引绕接合中的任意者。
实施方式4
图17是表示本发明的实施方式4所涉及的半导体装置的剖视图。在本实施方式中，作为覆盖源极场板15的耐湿膜而形成第4绝缘膜16。第4绝缘膜16是从Si、Al、Ti、Ta、W、Mo、Zr中选出的元素的氧化物或者氮化物。其他结构与实施方式3的图11相同。由此，能够防止图11的结构中由于设置源极场板15而导致的耐湿性的下降。
图18是表示本发明的实施方式4所涉及的半导体装置的变形例的剖视图。向实施方式3的图13的结构追加了第4绝缘膜16，该第4绝缘膜16覆盖源极场板15。由此，能够防止图13的结构中由于设置源极场板15而导致的耐湿性的下降。
实施方式5
图19是表示本发明的实施方式5所涉及的半导体装置的剖视图。在本实施方式中，在第1绝缘膜11和第2绝缘膜12之间***有第5绝缘膜17。在第1及第5绝缘膜11、17上配置栅极电极6的一部分而形成有2级的栅极场板构造。第5绝缘膜17是从Si、Al、Ti、Ta、W、Mo、Zr中选出的元素的氧化物或者氮化物。其他结构与实施方式1相同。
通过***第5绝缘膜17，从而变得容易将GFP(栅极场板)设为2级。并且，通过使用2级的GFP构造，从而电场缓和效果提高。并且，通过电场缓和效果的提高，从而栅极漏电流降低，高温动作性也提高。
此外，如果第2绝缘膜12覆盖栅极电极6，则栅极电极6的GFP既可以是1级，也可以是2级，还可以是无GFP的梯形栅极那样的形状。另外，也可以将本实施方式的结构应用于实施方式2～4。

Claims (13)

1.一种半导体装置，其特征在于，具有：
衬底；
氮化物半导体膜，其形成于所述衬底上；
肖特基电极，其形成于所述氮化物半导体膜上；
第1绝缘膜，其由氮化硅构成，形成于所述氮化物半导体膜上，与所述肖特基电极的侧面的至少一部分接触，在所述第1绝缘膜与所述氮化物半导体膜之间形成界面；以及
第2绝缘膜，其由原子层交替排列的氧化铝构成，覆盖所述肖特基电极及所述第1绝缘膜。
2.根据权利要求1所述的半导体装置，其特征在于，
还具有与所述氮化物半导体膜欧姆接合的源极电极及漏极电极，
所述肖特基电极是与所述氮化物半导体膜肖特基接合的栅极电极，
所述半导体装置是场效应晶体管。
3.根据权利要求1或2所述的半导体装置，其特征在于，
还具有覆盖所述第2绝缘膜的第3绝缘膜。
4.根据权利要求3所述的半导体装置，其特征在于，
所述第3绝缘膜是从Si、Al、Ti、Ta、W、Mo、Zr中选出的元素的氧化物或者氮化物。
5.根据权利要求2所述的半导体装置，其特征在于，
还具有源极场板，该源极场板配置于所述栅极电极和所述漏极电极之间，与所述源极电极电连接。
6.根据权利要求5所述的半导体装置，其特征在于，
所述源极场板和所述源极电极的接合是整面接合、局部接合、以及引绕接合中的任意者。
7.根据权利要求5或6所述的半导体装置，其特征在于，
还具有覆盖所述源极场板的第4绝缘膜。
8.根据权利要求7所述的半导体装置，其特征在于，
所述第4绝缘膜是从Si、Al、Ti、Ta、W、Mo、Zr中选出的元素的氧化物或者氮化物。
9.根据权利要求1、2、5、6中任一项所述的半导体装置，其特征在于，
还具有第5绝缘膜，该第5绝缘膜***至所述第1绝缘膜和所述第2绝缘膜之间，
在所述第1及第5绝缘膜上配置所述肖特基电极的一部分而形成有2级的栅极场板构造。
10.根据权利要求9所述的半导体装置，其特征在于，
所述第5绝缘膜是从Si、Al、Ti、Ta、W、Mo、Zr中选出的元素的氧化物或者氮化物。
11.根据权利要求1、2、5、6中任一项所述的半导体装置，其特征在于，
所述肖特基电极是包含Pt、Ti、Ni、Ta、Au、Al中任意的大于或等于2种金属的电极。
12.根据权利要求1、2、5、6中任一项所述的半导体装置，其特征在于，
所述衬底是由Si、SiC、GaN中的任意者构成的。
13.一种半导体装置的制造方法，其特征在于，具有下述工序，即：
在衬底上形成氮化物半导体膜；
在所述氮化物半导体膜上形成肖特基电极；
在所述氮化物半导体膜上形成第1绝缘膜，其中，该第1绝缘膜由氮化硅构成，与所述肖特基电极的侧面的至少一部分接触，在该第1绝缘膜与所述氮化物半导体膜之间形成界面；以及
以覆盖所述肖特基电极及所述第1绝缘膜的方式，通过原子层沉积法而形成由氧化铝构成的第2绝缘膜。
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US9640647B2 (en) 2017-05-02
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US20170077275A1 (en) 2017-03-16
KR20170032853A (ko) 2017-03-23

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