CN106465546B - 用于生产嵌入了传感器晶片的印刷电路板的方法,以及印刷电路板 - Google Patents
用于生产嵌入了传感器晶片的印刷电路板的方法,以及印刷电路板 Download PDFInfo
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Abstract
用于生产印刷电路板(10)的方法,该印刷电路板具有至少一个嵌入的传感器晶片(3),其中至少一个传感面(5)和接线终端(4)设置在晶片的一面上,其包含以下步骤:a)提供粘性薄膜(1);b)将以导电浆料形成的导体结构(2)印刷至粘性薄膜的表面上;c)将该至少一块传感器晶片(3)的该包含至少一个传感面(5)和该些接线终端(4)的面以对齐的方式置于该由导电浆料形成的导体结构(2)上;d)将该导电浆料固化;e)将于其上设有导体层(7)的绝缘层(6)施加至于上述各步骤中创建的、包含晶片(3)的结构的表面上;f)将于前述各步骤中创建的结构层压;g)将该导体层(7)结构化,并形成从该导体层通至在粘性薄膜的表面上的导体结构的导电轨道(7b、7c)的通路(9);以及h)将该粘性薄膜(1)移除。
Description
技术领域
本发明涉及用于生产印刷电路板的方法,该印刷电路板具有至少一个嵌入的传感器晶片,其中传感面和接线终端设置在晶片的一面上。
本发明还涉及印刷电路板,其由至少一个绝缘层和至少一个结构化的导体层构成,其具有至少一个嵌入的传感器晶片,其中至少一个传感面和接线终端设置在晶片的一面上并且以实质上共面的形式背向该结构化导体层地处于印刷电路板的一面上。
背景技术
就本发明的范围而言,传感器晶片被了解为具传感器的半导体构件,传感器例如可对电磁幅射、化学影响、压力、作用力、温度等反应的,其中除了传感器本身之外,该晶片还常常包含半导体构件、集成电路,以及被动的电构件。其中,传感器具有感应要检测的变数(如入射光幅射)、或者是接受作用力、由薄膜组成、等等的范围,该范围为简化说明而在此被称作传感面。
从DE 10 2006 045 900 A1得知生产传感器模块的一方法,其中将多个传感器连同其传感区域(传感面)以及其电接点(接线终端)设置于载体上,其例如由已抛光的铜构成,而随后以模塑材料绕其铸型,模塑材料例如为以填料填充的环氧树脂。当该热的模塑材料冷却后,将载体移除,这例如可通过硝酸化学地执行,或机械地执行,然后在切割工序后得出个别的模块。为了将电接点连接至从该载体突出的、以镀金的镍构成的电接点结构,亦可采用导电性和粘性的密封材料。该文件说明了在生产模块期间保护晶片的传感面免受化学或机械影响的问题,但没有说明将传感元件嵌入印刷电路板或与导体结构必须有的电接触的问题。
本发明的一目的在于在传感器晶片的一面上设有传感面和接线终端的情况下将该传感器晶片嵌入印刷电路板,并将其与印刷电路板的导体结构电接触,其中这是要以尽可能最简单的方法执行,稳固地执行,并要对传感面提供特别保护。进一步的目的在于创建具嵌入的传感器晶片的印刷电路板,其中该印刷电路板要是能够简易生产的并且可以被制成非常薄。
发明内容
这些目的以属于引言提及该类的方法达成,这方法包含以下步骤:
a)提供粘性薄膜;
b)将以导电浆料形成的导体结构印刷至粘性薄膜的表面上;
c)将该至少一块传感器晶片的该包含至少一个传感面和该些接线终端的面以对齐的方式置于该由导电浆料形成的导体结构上;
d)将该导电浆料固化;
e)将于其上设有导体层的绝缘层施加至于上述各步骤中创建的、包含晶片的结构的表面上;
f)将于前述各步骤中创建的结构层压;
g)将该导体层结构化,并形成从该导体层通至在粘性薄膜的表面上的导体结构的通路;以及
h)将该粘性薄膜移除。
在一优选的方案中,该导电浆料是环氧树脂粘剂。
步骤e)中的固化通过施加UV光和/或热执行也是可取的。
绝缘层采用预浸渍物料层和/或导电层采用铜层皆被证实为有效的实施方案。
粘性薄膜为基于硅胶的粘性薄膜是有利的,尤其是在采用环氧树脂粘剂作导电浆料的情况下——这确保能简单、稳当地将粘性胶带脱除而不破坏该导体层。
在一优选的方案中,步骤b)的印刷可有利地以丝网印刷工艺协助执行。
还有就是推荐在步骤e)中施加的绝缘层在对应该至少一个传感器晶片的区域中设有凹处。
上述的目标也以属于上述那类的印刷电路板达成,其中根据本发明,传感器晶片的接线终端是连接至由导电性浆料构成的导体结构,并且有通路从这导体结构延伸至结构化的导体层。
附图说明
下文将基于附图所示的一示例性实施方案更详细地解释本发明及进一步的优点,在附图中
图1以截面视图形式示出于方法的初步步骤中产生的结构,其由粘性薄膜构成,并具有从导电性浆料形成的印刷导体结构;
图2示出图1的结构在传感器晶片被放置就位后的情况;
图3示出该结构在与具导体层的预浸渍物料层压后的情况;
图4示出在移除该粘性薄膜后的印刷电路板完成品;
图5以截面视图形式示出生产的一变体的个别部件;而
图6是根据图4的印刷电路板的示意式的部分仰视图。
具体实施方式
现将参照附图解释根据本发明的方法以及根据本发明的印刷电路板。在这里,应留意下文所用的词语“顶部”和“底部”只涉及附图中的描示,并且是用以促进说明的。
图1示出粘性薄膜1,其为本发明方法的开始点。这粘性薄膜1优选地是具有基于硅胶的粘性层的粘性薄膜,其中载体薄膜和粘性层的总厚度可处于50至300μm的范围中。这样的粘性薄膜例如可从Taconic公司以Tacsil F20之名商购获得。在下述的过程期间,该一边粘性的粘性薄膜被支承于平滑的表面上,例如真空抽吸桌。
现将由导电性浆料形成的导体结构2施加至这粘性薄膜1的表面(其于示图中位于表面),这优选地是通过印刷方法执行的,例如丝网印刷、柔板印刷、胶印或喷墨打印。该导电浆料优选为环氧树脂粘剂,其中“环氧树脂粘剂和基于硅胶的粘性薄膜”这组合是特别有利的,因为其促进该粘性薄膜随后被可靠并无破坏地脱除。属于这类的导电性浆料(其用于以丝网印刷施加)例如可从Epoxy Technology这公司以H20E之名商购,其中其通过例如添加银而获得其导电性(其处于高于2500Ω-1·m‐1的范围中)。导体结构2的层厚度优选地可处于5至30μm的范围中。
在下一步中,参见图2,传感器晶片3(其电子终端4和传感面5处于晶片的同一面上)被摆放于由导电性浆料形成的导体结构2上。这摆放是以对齐的方式执行的,即传感器晶片3的接线终端4是与导体结构2的相应接点对齐的。在这摆放期间该些接线终端4穿透仍然是柔软的导体结构2,这就创建了电连接。然后通过例如热力或UV固化将该导体结构2的导电性浆料固化。
现在进一步的步骤指定将根据图2的结构被整合进绝缘层6中,绝缘层6具有设于其上的导体层7;如图3所示。在当前的例子中产生了所谓的核心,其由作为绝缘层6的例如FR 4等可商购的预浸渍物料以及单层的导体层7组成,其中该绝缘层6权宜地在传感器晶片3的区域中具有凹处8,该凹处接收晶片3。这样地得出的结构则接受常规的层压过程,其亦导致绝缘层6被固化。
从图2和图3可见,薄膜1在导体结构2的区域中是弹性地被变形或向外弯曲的,但要注意这情况在示图中是被夸大了的,因为该示图为了改善个别部件的能见度而是不合比例的。实际上,导体结构2相比薄膜是非常薄的,具体地是例如10μm和例如200μm相比。
此后,可以常规方式将导体层7结构化以获得个别的导体线路7a、7b、7c。亦于上方的导体线路和导体结构2之间形成通路9。这是以已知方式实施的,首先形成穿过该结构的钻孔然后以导电性物料将其填充或向其施加衬层。作为例子,这可以通过将铜沉积或以导电性浆料填充该些钻孔达成。然后可将薄膜1移除,从而亦将传感面露出。结果给出图4所示的印刷电路板10。
应清楚了解,图1至4中的描示总体上只示出较大的印刷电路板结构中的细节,而实际上印刷电路板上会于不同地点嵌有或提供多个传感器和其它构件,其皆可被连接至导体结构。亦可根据图4般将额外的绝缘层和导电层施加至印刷电路板10。作为例子,可将绝缘层设置于导体结构7a、7b、7c上,而所述绝缘层随后可加上导体层,其中所有导体层之间还可设有其它层。在本发明的情况下,该导电浆料的作用包括将传感器晶片3与薄膜1电接触和在其上(临时)固定,而如前述般,该薄膜并不是永久性地连接至导体结构2的浆料的。因此在选择导电浆料和薄膜2的物料时,“薄膜2必须可被脱除而不破坏导体结构2”这要求必须被列入考虑。
就用于接收传感器晶片3的凹处8而言,亦请参照图5,其示出晶片3如何嵌入该绝缘层6中的一可能性。在这图中示出从前述的示图中已知的、用于该方法的个别部件,但其中该绝缘层6是由两个个别的层6o和6u组成的,其中在下的个别层6u具有接收该传感器晶片3的该凹处8。图5中所示的部件在层压后导致如图5中所示的印刷电路板。这里应提及,较早时以“核心”称呼的结构(其当时由绝缘层和导体层组成)亦可不偏离本发明地以不同的方法和形式生产。因此预浸渍物料层6o、6u各自可由多块预浸渍物料组成,但所谓的链合片、不对称预浸渍物料层、液体树脂混合物,或其它方法亦可用于生产该核心。
因为该传感器晶片如上所述般一般是非常薄的,所以在很多情况下亦可以免除在绝缘层6中形成凹处8。在以液体形式施加绝缘层以及采用没有玻璃纤维加固的物料的情况下因此亦可免除该凹处。
图6从图4底部的视角示出在这例子中采用的可能的导体结构2。可见的是具传感面5的矩形存感器晶片3(这里传感面大致上是方形的、在晶片的“底面”),以及四个接线终端4,它们电连接至由导电浆料形成的导体结构2并以虚线示出。这导体结构具有对应四个接线终端的四个终端焊盘11,而通路9延至该些终端焊盘(见图4)。该些终端焊盘11由导体线路12连接至晶片终端4的终端焊盘13。
参照标号列表
1 粘性薄膜
2 导体结构
3 传感器晶片
4 接线终端
5 传感面
6 绝缘层
7 导体层
8 凹处
9 通路
10 印刷电路板
11 终端焊盘
12 导体线路
13 接线终端面
Claims (10)
1.用于生产印刷电路板(10)的方法,该印刷电路板具有至少一个嵌入的传感器晶片(3),其中至少一个传感面(5)和接线终端(4)设置在传感器晶片(3)的一面上,
其特征在于依以下次序的以下步骤:
a)提供粘性薄膜(1);
b)将以导电浆料形成的导体结构(2)印刷至粘性薄膜(1)的表面上;
c)将该至少一块传感器晶片(3)的该包含至少一个传感面(5)和该些接线终端(4)的面以对齐的方式置于该由导电浆料形成的导体结构(2)上;
d)将该导电浆料固化;
e)将于其上设有导体层(7)的绝缘层(6)施加至于上述各步骤中创建的、包含传感器晶片(3)的结构的表面上;
f)将于前述各步骤中创建的结构层压;
g)将该导体层(7)结构化,并形成从该导体层通至在粘性薄膜(1)的表面上的导体结构的导电轨道(7b、7c)的通路(9);以及
h)将该粘性薄膜(1)移除。
2.如权利要求1所述的方法,其特征在于该导电浆料是环氧树脂粘剂。
3.如权利要求1或2所述的方法,其特征在于步骤e)中的固化是通过施加UV光和/或热执行的。
4.如权利要求1所述的方法,其特征在于该绝缘层(6)是预浸渍物料。
5.如权利要求1所述的方法,其特征在于该导电层(7)是铜层。
6.如权利要求1所述的方法,其特征在于该粘性薄膜(1)是基于硅胶的粘性薄膜。
7.如权利要求1所述的方法,其特征在于步骤b)中的印刷是以丝网印刷工艺协助执行。
8.如权利要求1所述的方法,其特征在于在步骤e)中施加的绝缘层(6)在该至少一个传感器晶片(3)的区域中设有凹处(8)。
9.一种印刷电路板(10),由权利要求1-8任一项权利要求所述的方法制造,该印刷电路板(10)由至少一个绝缘层(6)和至少一个结构化的导体层(7a、7b、7c)构成,其具有至少一个嵌入的传感器晶片(3),其中至少一个传感面(5)和接线终端(4)设置在传感器晶片(3)的一面上,并且以实质上共面的形式背向该结构化导体层(7a、7b、7c)地处于印刷电路板(10)的一面上,
其特征在于
传感器晶片(3)的接线终端(4)是连接至由导电性浆料构成的导体结构(2),并且
有通路(9)从这导体结构延伸至结构化导体层的导电轨道(7b、7c)。
10.如权利要求9所述的印刷电路板(10),其特征在于该传感器晶片(3)的设有该至少一个传感面(5)和接线终端(4)的该面是与该绝缘层(6)的表面实质上共面的,并在与其齐平处终止。
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101765911A (zh) * | 2007-06-28 | 2010-06-30 | 桑迪士克公司 | 具有重新分布层的半导体芯片 |
JP2011082583A (ja) * | 2011-01-25 | 2011-04-21 | Aoi Electronics Co Ltd | 半導体装置および半導体装置の製造方法 |
JP4778370B2 (ja) * | 2005-11-09 | 2011-09-21 | アオイ電子株式会社 | 電子部品の製造方法 |
WO2013029073A1 (de) * | 2011-08-31 | 2013-03-07 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Verfahren zur integration eines bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0840369A4 (en) * | 1995-06-30 | 2001-12-19 | Toshiba Kk | ELECTRONIC COMPONENT AND ITS MANUFACTURING METHOD |
US6538210B2 (en) * | 1999-12-20 | 2003-03-25 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module, radio device having the same, and method for producing the same |
JP2002231762A (ja) * | 2001-02-01 | 2002-08-16 | Toppan Forms Co Ltd | Icチップの実装方法とicチップ実装体 |
TW200302685A (en) * | 2002-01-23 | 2003-08-01 | Matsushita Electric Ind Co Ltd | Circuit component built-in module and method of manufacturing the same |
GB2441265B (en) * | 2005-06-16 | 2012-01-11 | Imbera Electronics Oy | Method for manufacturing a circuit board structure, and a circuit board structure |
US7445959B2 (en) * | 2006-08-25 | 2008-11-04 | Infineon Technologies Ag | Sensor module and method of manufacturing same |
US20080057233A1 (en) * | 2006-08-29 | 2008-03-06 | Harrison Daniel J | Conductive thermal transfer ribbon |
KR101015651B1 (ko) * | 2008-12-05 | 2011-02-22 | 삼성전기주식회사 | 칩 내장 인쇄회로기판 및 그 제조방법 |
US20110180891A1 (en) * | 2009-08-06 | 2011-07-28 | Advanced Chip Engineering Technology Inc. | Conductor package structure and method of the same |
JP5767802B2 (ja) * | 2010-11-22 | 2015-08-19 | 旭化成エレクトロニクス株式会社 | 光センサ装置の製造方法 |
AT13436U1 (de) * | 2011-08-31 | 2013-12-15 | Austria Tech & System Tech | Verfahren zur integration eines bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
-
2014
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4778370B2 (ja) * | 2005-11-09 | 2011-09-21 | アオイ電子株式会社 | 電子部品の製造方法 |
CN101765911A (zh) * | 2007-06-28 | 2010-06-30 | 桑迪士克公司 | 具有重新分布层的半导体芯片 |
JP2011082583A (ja) * | 2011-01-25 | 2011-04-21 | Aoi Electronics Co Ltd | 半導体装置および半導体装置の製造方法 |
WO2013029073A1 (de) * | 2011-08-31 | 2013-03-07 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Verfahren zur integration eines bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
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AT515443B1 (de) | 2019-10-15 |
US20170020001A1 (en) | 2017-01-19 |
WO2015127486A1 (de) | 2015-09-03 |
CN106465546A (zh) | 2017-02-22 |
EP3111474A1 (de) | 2017-01-04 |
AT515443A1 (de) | 2015-09-15 |
EP3111474B1 (de) | 2021-06-23 |
US10455703B2 (en) | 2019-10-22 |
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