CN104104331A - Transconductance enhancement circuit unit and crystal oscillator circuit - Google Patents
Transconductance enhancement circuit unit and crystal oscillator circuit Download PDFInfo
- Publication number
- CN104104331A CN104104331A CN201310130628.9A CN201310130628A CN104104331A CN 104104331 A CN104104331 A CN 104104331A CN 201310130628 A CN201310130628 A CN 201310130628A CN 104104331 A CN104104331 A CN 104104331A
- Authority
- CN
- China
- Prior art keywords
- pipe
- pmos pipe
- nmos pipe
- pmos
- nmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Oscillators With Electromechanical Resonators (AREA)
Abstract
A transconductance enhancement circuit unit comprises five NMOS tubes whose sources and substrates are grounded and PMOS tubes whose sources and substrates are connected with a power supply. The gate of a first NMOS tube and the gate of a first PMOS tube are connected to form an input end, and the drain is connected with the drain of a second NMOS tube. The gate and the drain of the second NMOS tube are connected and connected with the gate of a third NMOS tube and connected with the drain of a second PMOS tube via a resistor. The drain of the third NMOS tube and the drain of the fourth PMOS tube are connected. The gate of the fourth NMOS tube and the drain of the fourth NMOS tube are connected and are connected with the gate of a fifth NMOS tube and the drain of a third PMOS tube. The drain of the fifth NMOS tube and the drain of a fifth PMOS tube are connected to form an output end. The drain of the first PMOS tube is connected with the drain of the second PMOS tube. The gate of the second PMOS tube and the drain of the second PMOS tube are connected and connected with gate of the third PMOS tube. The gate and the drain of the fourth PMOS tube are connected and connected with the gate of the fifth PMOS tube. In addition, a crystal oscillator circuit is provided.
Description
Technical field
The present invention relates to field of analog integrated circuit, especially a kind of crystal-oscillator circuit that relates to mutual conductance intensifier circuit unit and there is this mutual conductance intensifier circuit unit.
Background technology
Because the application of the electronic system of battery power is more and more extensive, can battery effectively power for a long time becomes a demand, for extending as much as possible the service time of battery, need to design the circuit of low-power consumption.Crystal oscillating circuit is almost present in each system and chip (System on a Chip as a clock generating module, SoC), and the startup of crystal oscillator need to be longer time, for low frequency crystal oscillator, conventionally need hundreds of millisecond even second, so Low-voltage Low-power rapid boot-up time become designer trends.
For crystal oscillator, apply, traditional crystal swings device circuit structure as shown in Figure 1, comprise inverting amplifier INV, feedback resistance Rf, quartz oscillation crystal X1, load capacitance C1 and C2, wherein, feedback resistance Rm is for setting up the direct-current working volts of inverting amplifier INV, load capacitance C1 and C2 are used for adjusting crystal oscillator makes parallel resonance frequency approach series resonance frequency, the critical mutual conductance gm of the general employing of vibration core
crit, the minimum mutual conductance that is applicable to crystal oscillation designs, wherein gm
crit=ω
2c1*C2*Rm*[1+Cp (C1+C2)/C1*C2)], wherein C1, C2 are the load capacitance of crystal oscillator input/output terminal, Rm is the dynamic electric resistor (motional resistance) of quartz oscillation crystal X1, Cp is the direct capacitance (Static Capacitance) of quartz oscillation crystal X1, and ω is the resonance frequency of quartz oscillation crystal X1.Physical circuit generally adopts the best mutual conductance (gm of at least five times of conducts of this minimum mutual conductance
op>=5gm
crit), to guarantee having good toggle speed under various processing procedures.At present, in order to improve gm value as far as possible, the metal-oxide-semiconductor size that forms inverting amplifier INV is often larger, thus guarantee crystal oscillator steady operation.But, adopt large-sized metal-oxide-semiconductor design, tend to cause taking larger chip area, and after crystal enters steady operation, also can cause larger circuit power consumption waste.
Summary of the invention
For the problems referred to above, the object of this invention is to provide a kind of simple in structure, can reduce start-up time, for the mutual conductance intensifier circuit unit of the low frequency crystal oscillator of Low-voltage Low-power and there is the crystal-oscillator circuit of this mutual conductance intensifier circuit unit.
A mutual conductance intensifier circuit unit, it comprises a NMOS pipe, the 2nd NMOS pipe, the 3rd NMOS pipe, the 4th NMOS pipe, the 5th NMOS pipe, a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe, the 4th PMOS pipe, the 5th PMOS pipe and resistance; Source electrode and the equal ground connection of substrate of a described NMOS pipe, described the 2nd NMOS pipe, described the 3rd NMOS pipe, described the 4th NMOS pipe and described the 5th NMOS pipe; Source electrode and the substrate of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe all connect power supply; The grid of the grid of a described NMOS pipe and a described PMOS pipe is connected and forms the input of described mutual conductance intensifier circuit unit, and drain electrode is connected with the drain electrode of described the 2nd NMOS pipe; The grid of described the 2nd NMOS pipe and drain electrode are connected and are connected in the grid of described the 3rd NMOS pipe, and by described resistance, are connected in the drain electrode of described the 2nd PMOS pipe; The drain electrode of described the 3rd NMOS pipe is connected with the drain electrode of described the 4th PMOS pipe; The grid of described the 4th NMOS pipe and the drain electrode that drains and be connected and be connected in grid and described the 3rd PMOS pipe of described the 5th NMOS pipe; The drain electrode of the drain electrode of described the 5th NMOS pipe and described the 5th PMOS pipe is connected and forms the output of described mutual conductance intensifier circuit unit; The drain electrode of a described PMOS pipe is connected in the drain electrode of described the 2nd PMOS pipe; The grid of described the 2nd PMOS pipe is connected with drain electrode, and is connected in the grid of described the 3rd PMOS pipe; The grid of described the 4th PMOS pipe is connected with drain electrode, and is connected in the grid of described the 5th PMOS pipe.
The present invention provides a kind of crystal-oscillator circuit in addition, and it comprises above-mentioned mutual conductance intensifier circuit unit, bias current unit, inverting amplifier unit, electric current sensing unit, output amplifying unit and feedback detecting unit; Described bias current unit is connected with described inverting amplifier unit; Described mutual conductance intensifier circuit unit is connected respectively with described inverting amplifier unit, described electric current sensing unit, described output amplifying unit and described feedback detecting unit; Described output amplifying unit is connected with described feedback detecting unit.
In the present invention's one better embodiment, described bias current unit comprises the 6th PMOS pipe, and described inverting amplifier unit comprises the 6th NMOS pipe, and described electric current sensing unit comprises the 7th NMOS pipe and the 7th PMOS pipe; The source electrode of described the 6th PMOS pipe and substrate are connected in source electrode and the substrate of described the 7th PMOS pipe, and be connected in the substrate of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe, and all connect power supply; The source electrode of described the 6th NMOS pipe and substrate are connected in source electrode and the substrate of described the 7th NMOS pipe, and ground connection; The grid of described the 6th PMOS pipe is connected with the grid of described the 7th PMOS pipe, and drain electrode is connected in the drain electrode of described the 6th NMOS pipe; The drain electrode of described the 7th PMOS pipe is connected in the drain electrode of described input and described the 7th NMOS pipe; The grid of described the 6th NMOS pipe is connected with the grid of described the 7th NMOS pipe, and connects the input signal of described crystal-oscillator circuit.
In the present invention's one better embodiment, described crystal-oscillator circuit further comprises the 8th NMOS pipe and the 8th PMOS pipe; The equal ground connection of the source electrode of described the 8th NMOS pipe and substrate, drain electrode connects the source electrode of a described NMOS pipe, described the 2nd NMOS pipe, described the 3rd NMOS pipe, described the 4th NMOS pipe and described the 5th NMOS pipe, grid connects feedback control signal, the equal ground connection of substrate of a described NMOS pipe, described the 2nd NMOS pipe, described the 3rd NMOS pipe, described the 4th NMOS pipe and described the 5th NMOS pipe; The source electrode of described the 8th PMOS pipe and substrate are all connected in power supply, drain electrode connects the source electrode of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe, grid connects feedback control signal, and the substrate of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe is all connected in power supply.
In the present invention's one better embodiment, described output amplifying unit comprises CMOS inverter.
In the present invention's one better embodiment, described feedback detecting unit detects the amplitude of the output signal of described output amplifying unit, and exports described feedback control signal.
Compared to prior art, the crystal-oscillator circuit 100 with described mutual conductance intensifier circuit unit 10 provided by the invention can be at the initial period that powers on, utilize described mutual conductance intensifier circuit unit 10 to realize larger mutual conductance, reach larger gain, accelerate the startup of crystal; And can, by closing described mutual conductance intensifier circuit unit 10, realize reduction power consumption after powering on.In addition, described crystal-oscillator circuit 100, without adopting large-sized metal-oxide-semiconductor design, avoids taking larger chip area.
Above-mentioned explanation is only the general introduction of technical solution of the present invention, in order to better understand technological means of the present invention, and can be implemented according to the content of specification, and for above and other objects of the present invention, feature and advantage can be become apparent, below especially exemplified by embodiment, and coordinate accompanying drawing, be described in detail as follows.
Accompanying drawing explanation
Fig. 1 is the schematic diagram that existing crystal swings device circuit structure.
The structure diagram of the crystal-oscillator circuit that Fig. 2 provides for one embodiment of the invention.
Fig. 3 is the circuit diagram of mutual conductance intensifier circuit unit in crystal-oscillator circuit shown in Fig. 2.
Fig. 4 is the circuit diagram of crystal-oscillator circuit shown in Fig. 2.
Embodiment
Below in conjunction with drawings and the specific embodiments, the present invention is further detailed explanation.
Refer to Fig. 2, one embodiment of the invention provides a kind of crystal-oscillator circuit 100, and it comprises mutual conductance intensifier circuit unit 10, bias current unit 20, inverting amplifier unit 30, electric current sensing unit 40, output amplifying unit 50 and feedback detecting unit 60.Described mutual conductance intensifier circuit unit 10 is connected respectively with described inverting amplifier unit 30, described electric current sensing unit 40, described output amplifying unit 50 and described feedback detecting unit 60; Described bias current unit 20 is connected with described inverting amplifier unit 30; Described output amplifying unit 50 is connected with described feedback detecting unit 60.
See also Fig. 3, described mutual conductance intensifier circuit unit 10 comprises a NMOS pipe N1, the 2nd NMOS pipe N2, the 3rd NMOS pipe N3, the 4th NMOS pipe N4, the 5th NMOS pipe N5, a PMOS pipe P1, the 2nd PMOS pipe P2, the 3rd PMOS pipe P3, the 4th PMOS pipe P4, the 5th PMOS pipe P5 and resistance R m.Source electrode and the equal ground connection of substrate of a described NMOS pipe N1, described the 2nd NMOS pipe N2, described the 3rd NMOS pipe N3, described the 4th NMOS pipe N4 and described the 5th NMOS pipe N5, the source electrode of a described NMOS pipe N1, described the 2nd NMOS pipe N2, described the 3rd NMOS pipe N3, described the 4th NMOS pipe N4 and described the 5th NMOS pipe N5 is all relative to low potential with substrate.Source electrode and the substrate of a described PMOS pipe P1, described the 2nd PMOS pipe P2, described the 3rd PMOS pipe P3, described the 4th PMOS pipe P4 and described the 5th PMOS pipe P5 all meet power vd D, and the source electrode of a described PMOS pipe P1, described the 2nd PMOS pipe P2, described the 3rd PMOS pipe P3, described the 4th PMOS pipe P4 and described the 5th PMOS pipe P5 is all relative to high potential with substrate.The grid of the grid of a described NMOS pipe N1 and a described PMOS pipe P1 is connected and forms the input VIN of described mutual conductance intensifier circuit unit 10, and drain electrode is connected with the drain electrode of described the 2nd NMOS pipe N2.The grid of described the 2nd NMOS pipe N2 is connected with drain electrode and is connected in the grid that described the 3rd NMOS manages N3, and by described resistance R m, is connected in the drain electrode of described the 2nd PMOS pipe P2.The drain electrode of described the 3rd NMOS pipe N3 is connected with the drain electrode of described the 4th PMOS pipe P4.The grid of described the 4th NMOS pipe N4 is connected with drain electrode and is connected in the grid of described the 5th NMOS pipe N5 and the drain electrode that described the 3rd PMOS manages P3.The drain electrode of the drain electrode of described the 5th NMOS pipe N5 and described the 5th PMOS pipe P5 is connected and forms the output VO of described mutual conductance intensifier circuit unit 10.The drain electrode of a described PMOS pipe P1 is connected in the drain electrode of described the 2nd PMOS pipe P2.The grid of described the 2nd PMOS pipe P2 is connected with drain electrode, and is connected in the grid of described the 3rd PMOS pipe P3.The grid of described the 4th PMOS pipe P4 is connected with drain electrode, and is connected in the grid of described the 5th PMOS pipe P5.
Refer to Fig. 4, described bias current unit 20 comprises the 6th PMOS pipe P6; Described inverting amplifier unit 30 comprises the 6th NMOS pipe N6; Described electric current sensing unit 40 comprises the 7th NMOS pipe N7 and the 7th PMOS pipe P7.
The source electrode of described the 6th PMOS pipe P6 and substrate are connected in source electrode and the substrate of described the 7th PMOS pipe P7, and be connected in the substrate of a described PMOS pipe P1, described the 2nd PMOS pipe P2, described the 3rd PMOS pipe P3, described the 4th PMOS pipe P4 and described the 5th PMOS pipe P5, and all connect power supply, the source electrode that is described the 6th PMOS pipe P6 is all connected described power vd D with the source electrode of substrate and described the 7th PMOS pipe P7 with substrate, relatively in high potential.The source electrode of described the 6th NMOS pipe N6 and substrate are connected in source electrode and the substrate of described the 7th NMOS pipe N7, and ground connection, it is the substrate that the source electrode of described the 6th NMOS pipe N6 and the source electrode of substrate and described the 7th NMOS pipe N7 and substrate are all connected in a described NMOS pipe N1, described the 2nd NMOS pipe N2, described the 3rd NMOS pipe N3, described the 4th NMOS pipe N4 and described the 5th NMOS pipe N5, and ground connection, relatively in low potential.The grid of described the 6th PMOS pipe P6 is connected with the grid of described the 7th PMOS pipe P7, and drain electrode is connected in the drain electrode of described the 6th NMOS pipe N6.The drain electrode of described the 7th PMOS pipe P7 is connected in the drain electrode of input VIN and described the 7th NMOS pipe N7 of described mutual conductance intensifier circuit unit 10, i.e. the drain electrode of described the 7th NMOS pipe N7 is also connected in the input VIN of described mutual conductance intensifier circuit unit 10.The grid of described the 6th NMOS pipe N6 is connected with the grid of described the 7th NMOS pipe N7, and meets the input signal XI of described crystal-oscillator circuit 100, responds to crystal oscillator signal XI.
Further, described crystal-oscillator circuit 100 comprises the 8th NMOS pipe N8 and the 8th PMOS pipe P8.Source electrode and the equal ground connection of substrate of described the 8th NMOS pipe N8, in relative low potential, grid meets feedback control signal EN, and drain electrode connects the source electrode of a described NMOS pipe N1, described the 2nd NMOS pipe N2, described the 3rd NMOS pipe N3, described the 4th NMOS pipe N4 and described the 5th NMOS pipe N5; The equal ground connection of substrate of a described NMOS pipe N1, described the 2nd NMOS pipe N2, described the 3rd NMOS pipe N3, described the 4th NMOS pipe N4 and described the 5th NMOS pipe N5, all in relative low potential.Source electrode and the substrate of described the 8th PMOS pipe P8 are all connected in power vd D, relatively in high potential, grid meets feedback control signal ENB, and drain electrode connects the source electrode of a described PMOS pipe P1, described the 2nd PMOS pipe P2, described the 3rd PMOS pipe P3, described the 4th PMOS pipe P4 and described the 5th PMOS pipe P5; The substrate of a described PMOS pipe P1, described the 2nd PMOS pipe P2, described the 3rd PMOS pipe P3, described the 4th PMOS pipe P4 and described the 5th PMOS pipe P5 is all connected in power vd D, all in relative high potential.
In the present embodiment, described output amplifying unit 50 comprises CMOS inverter (not shown), and described feedback detecting unit 60 detects the amplitude of the output signal of described output amplifying unit 50, and exports described feedback control signal EN/ENB.
Be understandable that, in described crystal-oscillator circuit 100, the drain electrode connecting place of the drain electrode of described the 5th NMOS pipe N5 and described the 5th PMOS pipe P5, and the drain electrode connecting place of the drain electrode of described the 6th PMOS pipe P6 and described the 6th NMOS pipe N6, all form output node XO.
Utilization has the crystal-oscillator circuit 100 of described mutual conductance intensifier circuit unit 10, after power vd D powers on, start-up circuit provides electric current to described bias current unit 20, described anti-phase amplifying unit 30 accelerates toggle speed under the effect of described electric current sensing unit 40 and described mutual conductance intensifier circuit unit 10, after circuit is stable, by feedback control signal EN/ENB, close described mutual conductance intensifier circuit unit 10, thus, can make crystal power consumption after starting of crystal-oscillator circuit 100 greatly reduce.
Compared to prior art, the crystal-oscillator circuit 100 with described mutual conductance intensifier circuit unit 10 can utilize described mutual conductance intensifier circuit unit 10 to realize larger mutual conductance at the initial period that powers on, and reaches larger gain, accelerates the startup of crystal; And can, by closing described mutual conductance intensifier circuit unit 10, realize reduction power consumption after powering on.In addition, described crystal-oscillator circuit 100, without adopting large-sized metal-oxide-semiconductor design, avoids taking larger chip area.
The above, only embodiments of the invention, not the present invention is done to any pro forma restriction, although the present invention discloses as above with embodiment, yet not in order to limit the present invention, any those skilled in the art, do not departing within the scope of technical solution of the present invention, when can utilizing the technology contents of above-mentioned announcement to make a little change or being modified to the equivalent embodiment of equivalent variations, in every case be not depart from technical solution of the present invention content, any simple modification of above embodiment being done according to technical spirit of the present invention, equivalent variations and modification, all still belong in the scope of technical solution of the present invention.
Claims (6)
1. a mutual conductance intensifier circuit unit, it is characterized in that, described mutual conductance intensifier circuit unit comprises a NMOS pipe, the 2nd NMOS pipe, the 3rd NMOS pipe, the 4th NMOS pipe, the 5th NMOS pipe, a PMOS pipe, the 2nd PMOS pipe, the 3rd PMOS pipe, the 4th PMOS pipe, the 5th PMOS pipe and resistance; Source electrode and the equal ground connection of substrate of a described NMOS pipe, described the 2nd NMOS pipe, described the 3rd NMOS pipe, described the 4th NMOS pipe and described the 5th NMOS pipe; Source electrode and the substrate of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe all connect power supply; The grid of the grid of a described NMOS pipe and a described PMOS pipe is connected and forms the input of described mutual conductance intensifier circuit unit, and drain electrode is connected with the drain electrode of described the 2nd NMOS pipe; The grid of described the 2nd NMOS pipe and drain electrode are connected and are connected in the grid of described the 3rd NMOS pipe, and by described resistance, are connected in the drain electrode of described the 2nd PMOS pipe; The drain electrode of described the 3rd NMOS pipe is connected with the drain electrode of described the 4th PMOS pipe; The grid of described the 4th NMOS pipe and the drain electrode that drains and be connected and be connected in grid and described the 3rd PMOS pipe of described the 5th NMOS pipe; The drain electrode of the drain electrode of described the 5th NMOS pipe and described the 5th PMOS pipe is connected and forms the output of described mutual conductance intensifier circuit unit; The drain electrode of a described PMOS pipe is connected in the drain electrode of described the 2nd PMOS pipe; The grid of described the 2nd PMOS pipe is connected with drain electrode, and is connected in the grid of described the 3rd PMOS pipe; The grid of described the 4th PMOS pipe is connected with drain electrode, and is connected in the grid of described the 5th PMOS pipe.
2. a crystal-oscillator circuit, it is characterized in that, described crystal-oscillator circuit comprises mutual conductance intensifier circuit as claimed in claim 1 unit, bias current unit, inverting amplifier unit, electric current sensing unit, output amplifying unit and feedback detecting unit; Described bias current unit is connected with described inverting amplifier unit; Described mutual conductance intensifier circuit unit is connected respectively with described inverting amplifier unit, described electric current sensing unit, described output amplifying unit and described feedback detecting unit; Described output amplifying unit is connected with described feedback detecting unit.
3. crystal-oscillator circuit as claimed in claim 2, is characterized in that, described bias current unit comprises the 6th PMOS pipe, and described inverting amplifier unit comprises the 6th NMOS pipe, and described electric current sensing unit comprises the 7th NMOS pipe and the 7th PMOS pipe; The source electrode of described the 6th PMOS pipe and substrate are connected in source electrode and the substrate of described the 7th PMOS pipe, and be connected in the substrate of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe, and all connect power supply; The source electrode of described the 6th NMOS pipe and substrate are connected in source electrode and the substrate of described the 7th NMOS pipe, and ground connection; The grid of described the 6th PMOS pipe is connected with the grid of described the 7th PMOS pipe, and drain electrode is connected in the drain electrode of described the 6th NMOS pipe; The drain electrode of described the 7th PMOS pipe is connected in the drain electrode of described input and described the 7th NMOS pipe; The grid of described the 6th NMOS pipe is connected with the grid of described the 7th NMOS pipe, and connects the input signal of described crystal-oscillator circuit.
4. crystal-oscillator circuit as claimed in claim 2, is characterized in that, described crystal-oscillator circuit further comprises the 8th NMOS pipe and the 8th PMOS pipe; The equal ground connection of the source electrode of described the 8th NMOS pipe and substrate, drain electrode connects the source electrode of a described NMOS pipe, described the 2nd NMOS pipe, described the 3rd NMOS pipe, described the 4th NMOS pipe and described the 5th NMOS pipe, grid connects feedback control signal, the equal ground connection of substrate of a described NMOS pipe, described the 2nd NMOS pipe, described the 3rd NMOS pipe, described the 4th NMOS pipe and described the 5th NMOS pipe; The source electrode of described the 8th PMOS pipe and substrate are all connected in power supply, drain electrode connects the source electrode of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe, grid connects feedback control signal, and the substrate of a described PMOS pipe, described the 2nd PMOS pipe, described the 3rd PMOS pipe, described the 4th PMOS pipe and described the 5th PMOS pipe is all connected in power supply.
5. crystal-oscillator circuit as claimed in claim 2, is characterized in that, described output amplifying unit comprises CMOS inverter.
6. crystal-oscillator circuit as claimed in claim 4, is characterized in that, described feedback detecting unit detects the amplitude of the output signal of described output amplifying unit, and exports described feedback control signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310130628.9A CN104104331B (en) | 2013-04-15 | 2013-04-15 | Mutual conductance enhances circuit unit and crystal-oscillator circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201310130628.9A CN104104331B (en) | 2013-04-15 | 2013-04-15 | Mutual conductance enhances circuit unit and crystal-oscillator circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104104331A true CN104104331A (en) | 2014-10-15 |
CN104104331B CN104104331B (en) | 2018-12-14 |
Family
ID=51672187
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310130628.9A Active CN104104331B (en) | 2013-04-15 | 2013-04-15 | Mutual conductance enhances circuit unit and crystal-oscillator circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104104331B (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105720947A (en) * | 2016-01-21 | 2016-06-29 | 中山芯达电子科技有限公司 | Oscillator with ultralow power consumption |
CN109274336A (en) * | 2017-07-18 | 2019-01-25 | 杭州晶华微电子有限公司 | A kind of crystal-oscillator circuit of ultra low voltage super low-power consumption |
CN109639135A (en) * | 2019-01-22 | 2019-04-16 | 上海艾为电子技术股份有限公司 | A kind of charge pump circuit |
CN113572136A (en) * | 2021-08-13 | 2021-10-29 | 无锡市晶源微电子有限公司 | Reverse current suppression circuit for PMOS (P-channel metal oxide semiconductor) transistor |
CN115328252A (en) * | 2022-08-29 | 2022-11-11 | 复旦大学 | Operational amplifier circuit and LDO circuit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001086803A1 (en) * | 2000-05-12 | 2001-11-15 | Motorola Inc | Oscillator circuit |
CN102318184A (en) * | 2009-04-13 | 2012-01-11 | 密克罗奇普技术公司 | Resistorless feedback biasing for ultra low power crystal oscillator |
-
2013
- 2013-04-15 CN CN201310130628.9A patent/CN104104331B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001086803A1 (en) * | 2000-05-12 | 2001-11-15 | Motorola Inc | Oscillator circuit |
CN102318184A (en) * | 2009-04-13 | 2012-01-11 | 密克罗奇普技术公司 | Resistorless feedback biasing for ultra low power crystal oscillator |
Non-Patent Citations (1)
Title |
---|
孟新等: "一种工作于亚阈值区的低功耗CMOS晶体振荡器", 《微电子学》 * |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105720947A (en) * | 2016-01-21 | 2016-06-29 | 中山芯达电子科技有限公司 | Oscillator with ultralow power consumption |
CN105720947B (en) * | 2016-01-21 | 2018-11-23 | 中山芯达电子科技有限公司 | A kind of super low-power consumption oscillator |
CN109274336A (en) * | 2017-07-18 | 2019-01-25 | 杭州晶华微电子有限公司 | A kind of crystal-oscillator circuit of ultra low voltage super low-power consumption |
CN109274336B (en) * | 2017-07-18 | 2021-05-04 | 杭州晶华微电子股份有限公司 | Crystal oscillator circuit with ultralow voltage and ultralow power consumption |
CN109639135A (en) * | 2019-01-22 | 2019-04-16 | 上海艾为电子技术股份有限公司 | A kind of charge pump circuit |
CN109639135B (en) * | 2019-01-22 | 2024-03-01 | 上海艾为电子技术股份有限公司 | Charge pump circuit |
CN113572136A (en) * | 2021-08-13 | 2021-10-29 | 无锡市晶源微电子有限公司 | Reverse current suppression circuit for PMOS (P-channel metal oxide semiconductor) transistor |
US11563431B1 (en) | 2021-08-13 | 2023-01-24 | Wuxi Crystal Source Microelectronics Co., Ltd. | Reverse current suppression circuit for PMOS transistor |
CN115328252A (en) * | 2022-08-29 | 2022-11-11 | 复旦大学 | Operational amplifier circuit and LDO circuit |
CN115328252B (en) * | 2022-08-29 | 2023-11-03 | 复旦大学 | Operational amplifier circuit and LDO circuit |
Also Published As
Publication number | Publication date |
---|---|
CN104104331B (en) | 2018-12-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104104331A (en) | Transconductance enhancement circuit unit and crystal oscillator circuit | |
CN104124921B (en) | Current mode comparator based low voltage low power consumption CMOS (Complementary Metal Oxide Semiconductors) relaxation oscillator and method | |
KR101043418B1 (en) | Differential colpitts voltage controlled oscillstor for improving negative resistance | |
CN103546121B (en) | Rc oscillator | |
US6774735B2 (en) | Low power self-biasing oscillator circuit | |
CN105187030B (en) | Oscillator | |
CN103248321A (en) | Crystal oscillator circuit and chip | |
CN103163933A (en) | Current mirror image circuit | |
CN201898477U (en) | Crystal oscillator | |
CN104166420B (en) | Bandgap voltage reference circuit | |
US9154082B2 (en) | Input signal amplifier | |
CN109491447A (en) | A kind of start-up circuit applied to band-gap reference circuit | |
CN107885267B (en) | Operating method for bandgap voltage reference circuit | |
CN103368500A (en) | Oscillator circuit used for generating clock signal | |
US7768358B2 (en) | Oscillatory signal output circuit for capacitive coupling an oscillating signal with bias voltage applied | |
KR102001902B1 (en) | A type of ultra low voltage two stage ring voltage controlled oscillator for chip circuits | |
Lai et al. | A novel low delay high-voltage level shifter with transient performance insensitive to parasitic capacitance and transfer voltage level | |
TWI482434B (en) | Switched capacitor circuit and method of controlling switched capacitor circuit | |
Moghaddam et al. | A Low-Voltage Single-Supply Level Converter for Sub-VTH/Super-VTH Operation: 0. 3V to 1. 2V | |
CN209265310U (en) | A kind of voltage buffer circuit | |
CN108123683A (en) | A kind of crystal oscillating circuit | |
CN103095253B (en) | Low-power consumption crystal oscillator circuit | |
CN109101069A (en) | A kind of voltage buffer circuit | |
CN104467810B (en) | A kind of number shaping methods and the clock system using this method | |
CN112241190B (en) | Medium-high frequency crystal driving circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |