CN105870189A - 一种具有体电场调制效应的横向超结双扩散金属氧化物半导体场效应管 - Google Patents
一种具有体电场调制效应的横向超结双扩散金属氧化物半导体场效应管 Download PDFInfo
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Abstract
本发明提出了一种具有体电场调制效应的横向超结双扩散金属氧化物半导体场效应管,在横向超结功率器件的有源区下方的衬底外延材料中形成多层浮空埋层,可以通过合理地设置多层浮空埋层的位置、厚度、长度和掺杂浓度对横向超结功率器件的体电场有效地进行调制,使得器件的整体电场分布达到最优,在保证器件低导通电阻的条件下,可以大幅度提高器件的击穿电压。
Description
技术领域
本发明涉及功率器件领域,特别是涉及一种横向超结双扩散金属氧化物半导体场效应管。
背景技术
横向功率器件具有易集成,热稳定性好,较好的频率稳定性,低功耗,多子导电,功率驱动小,开关速度高等优点被广泛应用于PIC(Power IntegratedCircuit)中。早期普通横向功率器件与纵向纵向功率器件结构相比,两种器件在具有相同耐压(Breakdown Voltage,简称BV)和器件面积的情况下,前者的导通电阻(On-Resistance,简称Ron)要大好几倍。随着弱化表面电场(ReducedSurface Field,简称RESURF)技术、场板(Field Plate,简称FP)技术、横向变掺杂(Variation of Lateral Doping,简称VLD)等技术在横向功率器件中应用横向功率器件的表面电场已经优化到了一定程度程度,然而器件的纵向体电场并没有进行优化。横向超结功率器件的耐压是由横向和纵向电场综合决定的,当采用RESURF等技术将表面电场优化到一定程度,器件的纵向电场决定着器件整体耐压。由于横向超结功率器件的纵向电场并没有得到很好的优化,从而使得器件的击穿在体内过早发生,器件的整体性能降低。
发明内容
本发明提出了一种新的横向超结双扩散金属氧化物半导体场效应管结构,旨在优化器件的体电场分布使得器件的整体电场分布达到最优,有效地提高器件的击穿电压。
本发明的技术方案如下:
一种具有体电场调制效应的横向超结双扩散金属氧化物半导体场效应管,包括:
半导体材料的衬底;
在所述衬底上生长的外延层;
在所述外延层上形成基区;
在所述外延层上形成浓度分区的缓冲层;
在所述基区边缘到部分缓冲层上注入N柱和P柱,相间排列形成超结(Super Junction)漂移区;
在所述器件表面形成有源区;
在所述有源区上形成的栅绝缘层,并在栅绝缘层上方形成栅极;
在所述有源区上形成漏区同时在所述基区上形成的沟道;
在所述基区上形成沟道衬底接触并与靠近沟道一侧短接形成源区;
分别在源区、漏区上形成的源极和漏极;
有别于现有技术的是:
在所述外延层内部具有多层浮空埋层,自器件的漏端延伸到所述浓度分区的缓冲层的下方;浮空埋层的掺杂浓度和厚度根据衬底掺杂浓度设定,满足使浮空埋层全部耗尽。
基于上述基本方案,本发明还进一步做如下优化限定和改进:
浮空埋层之间距离根据器件耐压等级可以等间距或变间距,最佳的设计为:浮空埋层之间的间距随着深度的增加而减小间距呈现等差状。
浮空埋层个数根据横向功率器件耐压量级而具体确定,例如一般中等耐压(100V~500V)埋层数为1-2个左右为最佳;对于高耐(500V~1000V及1000V以上)器件,埋层数大于等于3个,一般3层为最佳。
各个浮空埋层的掺杂浓度均比衬底掺杂浓度高1个数量级。
衬底外延材料中多层浮空埋层在衬底中所占的区域根据器件在纵向耗尽区域范围设定和优化。对于常见的横向超结功率器件,多层浮空埋层的长度占漂移区整体长度的1/2~2/3为佳。
各个浮空埋层的长度根据耐压等级设定或长度相同,或长度渐变(长度从器件表面到衬底逐渐增加,或逐渐减少)。
本发明技术方案的有益效果如下:
在横向超结功率器件有源区的下方的衬底中通过外延形成多层浮空埋层,通过合理地设计浮空埋层的厚度、间距、埋层个数掺杂浓度和浮空埋层长度的厚度可以有效地改善器件的体电场分布,使得器件的体电场分布达到最优,从而可以有效地提高器件的击穿电压。
附图说明
图1为本发明实施例的结构示意图(正视图);
图2为本发明实施例的三维剖视示意图(为了便于标注,对超结、漂移区绝缘层以及阶梯场氧化层等作了部分立体断面);
图3为传统缓冲层分区的N沟道SJ-LDMOS与采用多段浮空场板的N沟道SJ-LDMOS器件的耐压比较。
附图标号说明:
1-源极;2-栅极;3-栅绝缘层;4-41-42-超结漂移区;41-N柱;42-P柱;
5-漏电极;6-漏区;7-分区缓冲层;8-外延层;9-多段浮空埋层;10-衬底;
11-基区;12-源区;13-沟道。
具体实施方式
如图1所示,本发明为具有体电场调制的横向超结双扩散金属氧化物半导体场效应管的结构包括:
半导体材料的衬底10;
位于衬底上的外延层8;
位于外延层中的浮空埋层9;
外延层上左端为基区11,中间部分为浓度分区的缓冲层7,右端为漏区6;
基区10上左端为源区11,源区上为源电极1;
基区10上右端为沟道12,沟道上为栅绝缘层3,栅绝缘层3上为栅电极2,漏区6上为漏电极5;
在横向超结功率器件采用RESURF等技术将横向功率器件的表面电场优化到一定程度之后,需要对器件的体电场进行优化,器件分区缓冲层方下方具有多层浮空埋,层从而使得器件的整体电场达到最优,器件的整体耐压提高,性能提高。
以N沟道的SJ-LDMOS为例,具体可以通过以下步骤进行制备:
1)半导体材料(包括Si、SiC和GaAs等)的衬底上外延高电阻率的P型层;
2)在外延P型层的过程中形成多个N型浮空埋层,N型埋层的间距为等间距;N型埋层的具有一定的厚度;N型埋层由漏端延伸到漂移区的下方,其长度占漂移区整体长度的(1/2~2/3),N型埋层的掺杂浓度比衬底掺杂浓度高约1个数量级;
3)在外延层上形成P型基区;
4)在外延层上形成N型分区缓冲层;
4)利用离子注入技术在缓冲层上从P型基区边缘到另一端形成N柱与P柱相间排列的超结漂移区;
5)在器件表面形成有源区;
6)在有源区上形成栅氧化层;
7)在栅氧化层上淀积多晶硅刻蚀形成栅电极;
8)进行高浓度N型离子注入,在基区形成沟道,同时在漂移区边缘形成漏区;
9)进行高浓度P型离子注入,形成沟道衬底接触;
10)在器件表面淀积钝化层,并刻蚀接触孔;
11)淀积金属并刻蚀形成漏极和源极。
图3为传统缓冲层分区的N沟道SJ-LDMOS与采用多段浮空场板的N沟道SJ-LDMOS器件的耐压比较,两种器件在漂移区长度相同都为40μm,衬底浓度与超结浓度都相同。采用多段浮空场板的N沟道SJ-LDMOS器件的耐压为619V比传统缓冲层分区的N沟道SJ-LDMOS器件耐压389V提高约59.13%。
当然,本发明中的超结LDMOS也可以为P型沟道的SJ-LDMOS,其结构与N沟道SJ-LDMOS等同,并且多层浮空埋层结构同样适用于LDMOS器件、LIGBT等一系列横向功率器件,在此不再赘述。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和替换,这些改进和替换也应视为本发明的保护范围。
Claims (6)
1.一种具有体电场调制效应的横向超结双扩散金属氧化物半导体场效应管,包括:
半导体材料的衬底;
在所述衬底上生长的外延层;
在所述外延层上形成基区;
在所述外延层上形成浓度分区的缓冲层;
在所述基区边缘到部分缓冲层上注入N柱和P柱,相间排列形成超结(Super Junction)漂移区;
在所述器件表面形成有源区;
在所述有源区上形成的栅绝缘层,并在栅绝缘层上方形成栅极;
在所述有源区上形成漏区同时在所述基区上形成的沟道;
在所述基区上形成沟道衬底接触并与靠近沟道一侧短接形成源区;
分别在源区、漏区上形成的源极和漏极;
其特征在于:
在所述外延层内部具有多层浮空埋层,自器件的漏端延伸到所述浓度分区的缓冲层的下方;浮空埋层的掺杂浓度和厚度根据衬底掺杂浓度设定,满足使浮空埋层全部耗尽。
2.根据权利要求1所述的横向超结双扩散金属氧化物半导体场效应管,其特征在于:各个浮空埋层之间呈等间距设置;或者随着深度的增加,相邻浮空埋层之间的间距逐级减小。
3.根据权利要求1所述的横向超结双扩散金属氧化物半导体场效应管,其特征在于:对于耐压指标100V~500V的器件,浮空埋层的层数为1-2个;对于耐压指标500V~1000V及1000V以上的器件,浮空埋层的层数大于或等于3个。
4.根据权利要求1所述的横向超结双扩散金属氧化物半导体场效应管,其特征在于:各个浮空埋层的掺杂浓度均比衬底掺杂浓度高1个数量级。
5.根据权利要求1所述的横向超结双扩散金属氧化物半导体场效应管,其特征在于:所述多层浮空埋层的长度占漂移区整体长度的1/2~2/3。
6.根据权利要求1所述的横向超结双扩散金属氧化物半导体场效应管,其特征在于:各个浮空埋层的长度相同,或依次呈单调性渐变。
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CN111969041A (zh) * | 2020-08-26 | 2020-11-20 | 电子科技大学 | 一种超结vdmos |
CN114937689A (zh) * | 2022-06-06 | 2022-08-23 | 电子科技大学 | 一种平面型SiC IGBT及其制作方法 |
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