CN105868114A - FPGA software system and all module testing system and method thereof - Google Patents
FPGA software system and all module testing system and method thereof Download PDFInfo
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Abstract
The invention belongs to the technical field of an integrated circuit, and particularly relates to an FPGA software system and an all module test system and method thereof. The FPGA software system and the all module test system comprise a software test platform, a whole script file, script files of all modules and test cases; the method comprises the steps that the test platform is constructed, and a test environment needed by running the script files is set up; all the modules of the FPGA software design flow are connected in series according to the sequence through the script files; a test circuit is run continually, and testing on the FPGA software system and all the modules is achieved. According to the FPGA software system and the all module test system and method thereof, testing on the FPGA software can be well completed, and the advantages of being low in test cost, good in portability, high in universality and the like are achieved.
Description
Technical field
The invention belongs to technical field of integrated circuits, be specifically related to a kind of FPGA software testing system and method.
Background technology
Field programmable gate array FPGA(Field Programmable Gate Array) it is the product developed further on the basis of the programming devices such as PAL, GAL, CPLD.It is to occur as a kind of semi-custom circuit in special IC (ASIC) field.Fpga chip is the main hardware platform of current Design of Digital System, and its main feature is exactly completely can be configured by software by user and program, thus completes certain specific function, and can be the most erasable.When amendment and upgrading, it is not required to change extraly hardware designs, the most on computers amendment and more new procedures, makes hardware designs work become software development work, shorten the cycle of system design, improve the motility of realization and reduce cost.
FPGA software design flow process uses top down design method, the module such as whole design cycle is followed successively by comprehensively, packing, layout, wiring, static timing analysis, bit stream generation by Module Division.Its input usually hardware configuration describes language (Hardware Description
Language, HDL) or circuit design drawing (Schematic).Integration module is responsible for user-in file comprehensively for the basic hardware unit of FPGA.Packetization module is responsible for being bundled in the programmable logic resource that granularity is thicker multiple basic logic units.Circuit meshwork list after layout modules is responsible for packing is placed on the rational position of chip, and makes it meet given constraint.Interconnection module utilizes programmable interconnection resource, determines the concrete connection mode between pin.Static timing analysis module is responsible for calculating the maximum operation frequency that on FPGA, configuration circuit can reach.Bit stream generation module is responsible for net meter file after wiring is converted to bit stream file.
At present FPGA scale is increasing, which is embedded various IP kernel, and such as DSP, BRAM, CPU etc., the complexity of cad tools is more and more higher, software overall operation time and final on the most increasing in the impact of circuit realiration performance.This is accomplished by test FPGA software system and modules easily, to improve software performance.Domestic and foreign literature is relatively fewer for the research of FPGA software test at present.The most at low cost, carrying out FPGA software test easily is a good problem to study.
Summary of the invention
It is an object of the invention to provide that a kind of portability is good, the system and method testing FPGA software system and each module thereof of low cost, highly versatile.
The present invention proposes FPGA software system and each module test system thereof, and its block diagram is as it is shown in figure 1, include: software test platform, overall script file, the script file of modules and test case；Wherein, software test platform is used for providing test run environment；Overall script file is according to the order of FPGA software flow, series connection modules, and provides the operational factor needed for modules, and the connected mode of module and order can be as shown in Figure 3；The script file of modules respectively specifies that respective execution program, command line parameter inspection, daily record generation etc.；Test case provides the information of all test circuit under test platform.
Described module script file, including: integration module script, packetization module script, layout modules script, interconnection module script, bit stream generation module, static timing analysis module, etc..
The present invention proposes FPGA software system and each module test method thereof, is to utilize software test platform, first, by the script file of modules, determines that respective execution program, command line parameter inspection, daily record generate；Then, it is determined that test case list, provide the information of all test circuit under test platform；Finally, by overall script file, all modules of FPGA software flow are connected in order, and provides the operational factor of modules successively, it is achieved the automatic test of batch testing circuit, complete the test to FPGA software system.
The present invention can complete the test to FPGA software system, the content of test includes: the function of modules, interface testing, the test of software system allomeric function, software system runs the performance tests such as time, memory consumption, resource utilization, maximum operation frequency.
Compared to traditional single FPGA software test, the present invention can be after configuration operation environment, carry out the automatic test of batch example, significantly decrease human cost and the time cost of test, and correlation report can be given for software analysis, there is the features such as portable good, low cost, highly versatile.
Accompanying drawing explanation
Fig. 1 is FPGA software testing system block diagram.
Fig. 2 is one of interface of test system.
One of connected mode of Fig. 3 module and order.
Detailed description of the invention
The system of the present invention realizes block diagram as shown in Figure 1 substantially.
Software test platform is by running Microsoft
The computer of Windows operating system, the structure of test platform can have various ways, such as, use the tcl script test platform that Cygwin builds, and Cygwin is a class UNIX simulated environment run on windows platform here, is cygnus
The free software of solutions company exploitation.The shell environment of a similar linux can be obtained after running Cygwin, tcl script can be run afterwards.And tcl(Tool
Command Language) it is a kind of general script, it is often used in the aspect such as Script Programming and test.The interface of system is tested as shown in Figure 2 in the case of so.
Overall script file is the core of whole test platform, and it is responsible for all modules of FPGA software flow to connect in order, and provides the operational factor of modules.The most all modules and order can have various ways, if Fig. 3 is one of them, are i.e. followed successively by: integration module script, packetization module script, layout modules script, interconnection module script, bit stream generation module and static timing analysis module.The output file of each module is the input file of next module, can generate the bit stream file that can be used for FPGA program downloads after software system end of run.The most each module can export the journal file of correspondence, correlation output information in logging software running.
The script file of modules specifies the execution program of separate modular in FPGA software flow, command line parameter inspection, daily record to generate successively, and called and execution in overall script file.
Test case list provides the absolute path of all test examples under test platform, different scales, difference in functionality and different resource service condition during wherein example covers FPGA.
Testing process: open test platform, enters under the catalogue of associated documents, uses above-mentioned test script and test case to carry out automatic test.Test platform can perform next test case after having performed a test case automatically, until all examples in the test list specified all have run.After end of run, test platform counts the example number being successfully tested with test crash, i.e. Total pass/fail, and provide the information such as operation time, memory consumption, resource utilization, maximum operation frequency, convenient function and performance to software carries out improving and promoting.
The present invention is the most convenient to the realization of FPGA software test, has the features such as testing cost good, highly versatile low, portable.
Claims (3)
1. a FPGA software system and each module test system thereof, it is characterised in that including: software test platform, overall script file, the script file of modules and test case；Wherein, software test platform is used for providing test run environment；Overall script file is according to the order of FPGA software flow, series connection modules, and provides the operational factor needed for modules, module and the connected mode of order；The script file of modules respectively specifies that respective execution program, command line parameter inspection, daily record generate；Test case provides the information of all test circuit under test platform with tabular form；
Described module script file, including: integration module script, packetization module script, layout modules script, interconnection module script, bit stream generation module, static timing analysis module.
FPGA software system the most according to claim 1 and each module test system thereof, it is characterized in that the content of test includes: the function of modules, interface testing, the test of software system allomeric function, software system runs time, memory consumption, resource utilization, the test of maximum operation frequency.
3. FPGA software system based on test system described in claim 1 or 2 and each module test method thereof, it is characterised in that concretely comprise the following steps:
It is to utilize software test platform, first, by the script file of modules, determines that respective execution program, command line parameter inspection, daily record generate；Then, it is determined that test case list, provide the information of all test circuit under test platform；Finally, by overall script file, all modules of FPGA software flow are connected in order, and provides the operational factor of modules successively, it is achieved the automatic test of batch testing circuit, complete the test to FPGA software system.
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| CN109614339A (en) * | 2018-12-27 | 2019-04-12 | 四川新网银行股份有限公司 | A kind of automatic extending method based on more set test environment |
| CN109885438A (en) * | 2019-02-27 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of FPGA method for testing reliability, system, terminal and storage medium |
| CN110750462A (en) * | 2019-10-29 | 2020-02-04 | 西安奇维科技有限公司 | FPGA white box test platform |
| CN111123084A (en) * | 2019-12-11 | 2020-05-08 | 中国电子科技集团公司第二十研究所 | TCL language-based digital circuit rapid test method |
| CN111338326A (en) * | 2020-04-07 | 2020-06-26 | 华北水利水电大学 | FPGA general IO interface test device and method |
| CN111428431A (en) * | 2020-02-28 | 2020-07-17 | 中科亿海微电子科技（苏州）有限公司 | Method and system for supporting automatic test and recording of EDA (electronic design automation) software |
| CN113435149A (en) * | 2021-06-25 | 2021-09-24 | 无锡中微亿芯有限公司 | Test case automatic generation method for optimizing FPGA comprehensive effect |
| CN114661615A (en) * | 2022-04-11 | 2022-06-24 | 成都迪真计算机科技有限公司 | FPGA software testing method and device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107977312B (en) * | 2017-11-21 | 2020-07-14 | 北京临近空间飞行器***工程研究所 | Software system test verification method based on complex interface time sequence |
| CN107977312A (en) * | 2017-11-21 | 2018-05-01 | 北京临近空间飞行器***工程研究所 | A kind of software system test verification method based on complex interface sequential |
| CN109614339A (en) * | 2018-12-27 | 2019-04-12 | 四川新网银行股份有限公司 | A kind of automatic extending method based on more set test environment |
| CN109885438A (en) * | 2019-02-27 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of FPGA method for testing reliability, system, terminal and storage medium |
| CN110750462A (en) * | 2019-10-29 | 2020-02-04 | 西安奇维科技有限公司 | FPGA white box test platform |
| CN111123084A (en) * | 2019-12-11 | 2020-05-08 | 中国电子科技集团公司第二十研究所 | TCL language-based digital circuit rapid test method |
| CN111428431A (en) * | 2020-02-28 | 2020-07-17 | 中科亿海微电子科技（苏州）有限公司 | Method and system for supporting automatic test and recording of EDA (electronic design automation) software |
| CN111428431B (en) * | 2020-02-28 | 2024-02-02 | 中科亿海微电子科技（苏州）有限公司 | Automatic test and recording method and system supporting EDA software |
| CN111338326A (en) * | 2020-04-07 | 2020-06-26 | 华北水利水电大学 | FPGA general IO interface test device and method |
| CN111338326B (en) * | 2020-04-07 | 2022-11-11 | 华北水利水电大学 | FPGA general IO interface test device and method |
| CN113435149A (en) * | 2021-06-25 | 2021-09-24 | 无锡中微亿芯有限公司 | Test case automatic generation method for optimizing FPGA comprehensive effect |
| CN113435149B (en) * | 2021-06-25 | 2023-08-18 | 无锡中微亿芯有限公司 | Test case automatic generation method for optimizing FPGA comprehensive effect |
| CN114661615A (en) * | 2022-04-11 | 2022-06-24 | 成都迪真计算机科技有限公司 | FPGA software testing method and device |
| CN114661615B (en) * | 2022-04-11 | 2024-01-30 | 成都迪真计算机科技有限公司 | FPGA software testing method and device |
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