CN105826389A - Ferroelectric field effect transistor based on neodymium-doped bismuth titanate film and preparation method - Google Patents

Ferroelectric field effect transistor based on neodymium-doped bismuth titanate film and preparation method Download PDF

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CN105826389A
CN105826389A CN201610292140.XA CN201610292140A CN105826389A CN 105826389 A CN105826389 A CN 105826389A CN 201610292140 A CN201610292140 A CN 201610292140A CN 105826389 A CN105826389 A CN 105826389A
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neodymium
effect transistor
field effect
bismuth titanate
bismuth
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唐振华
鲁圣国
唐明华
张万里
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Guangdong University of Technology
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/78391Field effect transistors with field effect produced by an insulated gate the gate comprising a layer which is used for its ferroelectric properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6684Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a ferroelectric gate insulator

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Abstract

The invention relates to a ferroelectric field effect transistor based on a neodymium-doped bismuth titanate film, and the structure is that Pt metal/neodymium-doped bismuth titanate/cerium dioxide/Si form a ferroelectric field effect transistor of a metal-ferroelectric layer/insulating layer/semiconductor structure. The preparation method includes the steps of: using a radio frequency magnetron sputtering method to deposit cerium dioxide of a thickness of about 10nm on a p-doped Si substrate after cleaning as an insulated gate layer; then using a sol-gel process to prepare a neodymium-doped bismuth titanate ferroelectric film; etching off BNT and CeO2 layers on a source region and a drain region, obtaining source and drain electrode windows, and utilizing a mask plate and adopting a direct current magnetron sputtering method to plate a Pt metal layer to obtain a source electrode, a drain electrode and a grid electrode. The ferroelectric field effect transistor provided by the invention effectively overcomes the defects that an ordinary ferroelectric storage field effect device is poor in interface characteristic and is easy to fatigue, information storage windows are enlarged, and storage time is prolonged; and the manufacturing technology is simple, can effectively improve the yield of devices, and is compatible with the standard IC technology.

Description

The ferro-electric field effect transistor of bismuth titanate film based on neodymium doping and preparation method
Technical field
The present invention relates to ferroelectric thin film field-effect transistor field, particularly to adulterate based on neodymium The ferro-electric field effect transistor of bismuth titanate film and preparation method.
Background technology
Ferro-electric field effect transistor (Ferroelectric field effect transistor, FeFET) conduct Non-volatile memory unit, has outstanding advantages and application prospect is extensive.Wu et al. 1974 Year just publishes an article at IEEE TED, based on Metal-oxide-semicondutor (MOS) field effect The structure of transistor, constructs brand-new metal-ferroelectricity-semiconductor field effect transistor (MFS-FET) structure.The design starting point of MFS-FET is the ferroelectric effect utilizing ferroelectric thin film, The positive and negative polarised direction i.e. utilizing ferroelectric material defines two logic states (" 1 " and " 0 "), real The storage of existing data.In MFS-FET structure, ferroelectric thin film is direct with semiconductor base Contact, interface performance between the two have impact on the performance of transistor, and makes making of device Commercialization can not be reached with the cycle.In order to solve this problem, researcher is at ferroelectric layer and half Between conductor substrate, one layer of insulating medium layer of insertion is in order to improve interfacial characteristics, improves device performance.
Present stage is primarily upon material (ferroelectric layer, insulating barrier) for the research of MFIS structure FeFET The aspect such as the optimization of preparation, performance characterization and device architecture, researcher is for for non-volatile The ferroelectric material of property random access memory.At present, Pb (Zr the most all used by ferroelectric memoryx,Ti1-x)O3 Thin film does ferroelectric layer, but Pb (Zrx,Ti1-x)O3Ferroelectric thin film contains a large amount of Pb element, to ring There is pollution in border, and this based on Pb (Zrx,Ti1-x)O3There is storage in thin-film ferroelectric field effect transistor The true points such as window is little, fatiguability, holding performance are bad.Additionally, imitate as MFIS ferroelectricity field Answer the insulating barrier of transistor, it is desirable to have high dielectric constant, good heat stability and and ferrum The preferable matching of electric material, substrate.Accordingly, it would be desirable to be badly in need of a kind of novel environmentally friendly, Ferroelectric material of good performance replaces the ferroelectric layer in ferro-electric field effect transistor Pb(Zrx,Ti1-x)O3Thin film.Additionally, be also required to optimize the device architecture that design is new further, Optimize the interface between ferroelectric layer and insulating barrier, improve device performance.
Summary of the invention
In order to solve above-mentioned technical problem, the present invention provide a kind of simple in construction, environmentally friendly, And the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping of good performance and system thereof Preparation Method.
Technical scheme is as follows:
The ferro-electric field effect transistor of bismuth titanate film based on neodymium doping, for including that MFIS ties Bismuth titanates (BNT)/ceria (CeO of the Pt metal of structure/neodymium doping2)/Si ferroelectric thin film field is imitated Answer transistor, including p-type silicon substrate, the upper left right side of described p-type silicon substrate be respectively equipped with source electrode, two Cerium oxide insulation gate layer and drain electrode, above described ceria insulation gate layer, bottom right is supreme successively Being sequentially provided with ferroelectric layer and grid, described ferroelectric layer is the bismuth titanate film of neodymium doping, BNT Thin film.
Further, the thickness of ceria insulation gate layer is 10nm, the bismuth titanates of neodymium doping The thickness of thin film is 200-300nm.
The preparation method of the ferro-electric field effect transistor of above-mentioned bismuth titanate film based on neodymium doping, Using p-type silicon substrate as quasiconductor (Semiconductor), ceria (CeO2) as absolutely Edge gate layer, the bismuth titanates of, anti-fatigue performance preferable neodymium doping bigger using residual polarization as Ferroelectric layer, Pt metal is as electrode, CeO2Insulation gate layer uses radio-frequency magnetron sputter method to prepare, Use Sol-Gel technique to prepare the bismuth titanate film of ferroelectric layer neodymium doping, utilize lithographic technique afterwards, Etch away BNT and CeO above source region and drain region2Layer, obtains source, drain electrode window, profit With mask plate and use DC magnetron sputtering method plating Pt metal level obtain source, leakage, grid.
The preparation method of the ferro-electric field effect transistor of above-mentioned bismuth titanate film based on neodymium doping, Comprise the steps:
S1, the preparation of insulation gate layer: insulation gate layer is CeO2Layer, uses rf magnetron sputtering Prepared by method, its thickness is 10nm, CeO2Preparation technology is: sputtering power is 65W;Oxygen Gas: argon is 3:1;Air pressure is 1Pa, and underlayer temperature is 200 DEG C, and sedimentation time is 2min;
S2, prepare insulation gate layer after, deposit in ferroelectric thin film field-effect transistor on this Ferroelectric layer, its ferroelectric layer be neodymium doping bismuth titanate ferro-electricity membrane, wherein neodymium with bismuth mole Ratio is 3.15:0.85, and its chemical formula is Bi3.15Nd0.85Ti3O12, the bismuth titanates ferroelectric thin of doping Film uses Sol-Gel method to prepare, and uses successively short annealing;
After S3, deposition ferroelectric layer BNT thin film, etch away source region and leakage with etching apparatus BNT and CeO above district2Layer, obtains source, drain electrode window, combines with mask plate afterwards Magnetically controlled DC sputtering Pt metal, as electrode, ultimately forms FeFET, i.e. based on neodymium doping titanium The ferro-electric field effect transistor of acid bismuth thin film.
Further, the preparation flow of the bismuth titanate ferro-electricity membrane of described doping is:
The configuration of the precursor solution of the bismuth titanates (BNT) of S21, neodymium doping:
(1) neodymium nitrate (Nd (NO of respective quality is the most accurately weighed3)3·6H2O)、 Bismuth nitrate (Bi (NO3)3·5H2In the beaker of the glacial acetic acid O) putting into 6ml, and use magnetic agitation Instrument makes it fully dissolve, mix homogeneously;
(2) butyl titanate (Ti (OC of respective quality is weighed4H9)4) put into the glacial acetic acid of 4ml In beaker, solution stablized by the acetylacetone,2,4-pentanedione adding 1ml, and is placed on magnetic agitation instrument stirring It is made fully to dissolve;
(3) again by after solution mixing in above-mentioned two beaker, appropriate glacial acetic acid and second two are added Alcohol methyl ether formation total capacity 20ml, concentration are about the faint yellow precursor solution of 0.1mol/L;
(4), after precursor solution prepares, with preservative film, beaker mouth is sealed, and put into constant temperature Case preserves 4~6 days, the bismuth titanates that stable, the uniform neodymium that ageing obtains after placing adulterates Precursor solution;
S22, spin coating, heat treatment
(1) with filter paper, the precursor solution of the bismuth titanates that neodymium adulterates is filtered;
(2) with disposable syringe, colloidal sol is dripped to the long silicon lining having ceria insulation gate layer Use sol evenning machine whirl coating at the end, first with getting rid of at the beginning of the low speed of 400 revs/min 8 seconds, then 4000 turns/ The high speed spin coating divided 20 seconds so that solution is coated uniformly on substrate surface, obtains gel wet film;
S23, short annealing:
Gel wet film is put in quick anneal oven, first dries 3min at 180 DEG C, then It is pyrolyzed 4min, 650 DEG C of preannealing 5min at 400 DEG C, obtains thin film, the most again Repeat 5-6 this process, obtained the film sample of desired thickness, placed into short annealing In stove, 700 DEG C of 3min that anneal eventually, finally obtain final BNT thin film, and its thickness Between 200-300nm.
Further, in S21, the volume ratio of described glacial acetic acid and ethylene glycol monomethyl ether is 1:2.
Further, in S21, described bismuth nitrate must excess 10mol%.
The invention have the advantage that
1, by this technology, the ferroelectric layer of the ferroelectric field effect pipe of prepared MIFS structure Use the bismuth titanate film that ferroelectric material neodymium unleaded, environment amenable adulterates, Ke Yiyou It is beneficial to recovery and the utilization of electronic product.
2, by this technology, the ferroelectric field effect pipe of prepared MIFS structure can be effective Ground overcomes general ferroelectricity to store fieldtron interfacial characteristics shortcoming poor, fatigable, makes information Memory window increases, storage time lengthening.
3, processing technology is simple, can be effectively improved the yield rate of device, and can and standard IC process compatible.
Accompanying drawing explanation
Fig. 1 is the ferro-electric field effect transistor of the bismuth titanate film that the present invention adulterates based on neodymium Structure chart.
Fig. 2 is the ferroelectricity field system of the bismuth titanate film based on neodymium doping of MFIS structure of the present invention Standby flow chart.
Fig. 3 is the flow chart that Sol-Gel technique prepares the bismuth titanate film of ferroelectric layer neodymium doping.
Fig. 4 is the ferroelectric field effect crystal of the bismuth titanate film based on neodymium doping prepared The output characteristic curve of pipe.
Fig. 5 is the ferroelectric field effect crystal of the bismuth titanate film based on neodymium doping prepared The transfer characteristic curve of pipe.
Fig. 6 is the ferroelectric field effect crystal of the bismuth titanate film based on neodymium doping prepared The holding performance curve of pipe.
Detailed description of the invention
Further this preparation method is described in detail below in conjunction with accompanying drawing.
Referring to the drawings 1, the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping, for Bismuth titanates (BNT)/ceria (CeO including the Pt metal/neodymium doping of MFIS structure2)/Si ferrum Conductive film field-effect transistor, including p-type silicon substrate 1, p-type silicon substrate 1 is upper left to be parted on the right side not It is provided with source electrode 2, ceria insulation gate layer 4 and drain electrode 3, ceria insulation gate layer 4 Bottom right is supreme successively is sequentially provided with ferroelectric layer 5 and grid 6 in top, and ferroelectric layer 5 is neodymium doping Bismuth titanate film, thus constitute metal-ferroelectricity-insulating barrier-quasiconductor (Metal-Ferroelectric-Insulator-Semiconductor, MFIS) structural iron field effect is brilliant Body pipe.
Referring to the drawings 2, the preparation side of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping Method, first, uses radio-frequency magnetron sputter method depositing cerium dioxide insulated gate on p-type silicon substrate Layer, its thickness is~10nm, and its preparation technology is: sputtering power is 65W;Oxygen: Argon is 3:1;Air pressure is 1Pa, and underlayer temperature is 200 DEG C, and sedimentation time is 2min;It After on the long silicon substrate having ceria insulation gate layer by sol-gel (Sol-Gel) technique system The bismuth titanate film of standby ferroelectric layer neodymium doping, wherein neodymium with the mol ratio of bismuth be 3.15:0.85, its Chemical formula is Bi3.15Nd0.85Ti3O12, the thickness of the bismuth titanate film of ferroelectric layer neodymium doping is 200-300nm.After having deposited ferroelectric layer, use etching apparatus and lithographic technique, etch away Bi above source region and drain region3.15Nd0.85Ti3O12Thin film and CeO2Layer, obtains source, drain electrode Window, utilize mask plate and use DC magnetron sputtering method plating Pt metal level obtain source, leakage, Grid,Finally give the ferro-electric field effect transistor of the bismuth titanate film of neodymium doping.
Fig. 3 is the flow chart that Sol-Gel technique prepares the bismuth titanate film of ferroelectric layer neodymium doping.First First, with disposable syringe, colloidal sol is dripped to use on the long silicon substrate having ceria insulation gate layer Sol evenning machine whirl coating, first gets rid of 8 seconds at the beginning of low speed (400 revs/min), then at a high speed (4000 revs/min) Spin coating 20 seconds so that solution is coated uniformly on substrate surface, obtains gel wet film.Afterwards, Wet film is put in quick anneal oven, first dries 3min at 180 DEG C, then at 400 DEG C Pyrolysis 4min, 650 DEG C of preannealing 5min, obtained thin film, then repeated 5-6 This process secondary (has i.e. got rid of 6 layer films), has obtained the film sample of desired thickness, has placed into In quick anneal oven, 700 DEG C of 3min that anneal eventually, finally obtain final BNT thin film, And its thickness is between 200-300nm.
Fig. 4 is that the output of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping is special Linearity curve (IDS-VDS), source-drain voltage VDSTest scope be 0~9V, stepping grid voltage VGS's Scope is 1~6V.The ferroelectric field effect of bismuth titanate film based on neodymium doping as shown in Figure 4 Transistor output characteristics there is typical n-channel transistor feature, source-drain current IDSFull Obvious with trend.IDSAffected, along with V with grid both sides' voltage by drain electrodeDSWith VGSLiter Height, IDSAlso it is gradually increased.At VDS=6V and VGSDuring=6V, obtain opening of transistor State electric current is 350 μ A.At VDSIn the low voltage range of 1.0V, IDS-VDSCurve is not Present linear trend completely, it appeared that there are a threshold voltage, cause source-drain current numerical value to connect Nearly null value.
Fig. 5 is the transfer of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping Characteristic curve (IDS-VGS).In the measurements, additional drain voltage VDSIt is maintained at 4V, grid Scanning voltage VGSFirst by-9V to 9V, return again to-9V.Test finds at VGSIt is negative During voltage, source-drain current IDSIt is maintained at 10-10A is constant, VGSScope be-2 to 9V. Transfer characteristic occurs that anticlockwise hysteresis loop is to be led by the polarization reversal of ferroelectric thin film Cause, as it can be seen, the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping Hysteresis loop there is effective memory window (MW) that width is about 3.2V, Er Qiekai, Drain current ratio (I under off statusON/IOFF) up to 106.The memory window of 3.2V is said Understand that the transistor that we prepare has good dielectric coupling performance.It is calculated crystalline substance simultaneously Subthreshold swing (the SS=dV of body pipeGS/dlogIDS) it is 500mV/decade, this may return Because there is bigger equivalent capacity in BNT ferroelectric thin film layer.In order to verify transfer characteristic Keep performance, make in the transfer characteristic (figure dotted line) after test in continuous 24 hours For contrast, finding that switching current is slightly changed, memory window width keeps constant, explanation The holding better performances of our transistor.
Fig. 6 is the electric leakage of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping Stream retention performance curve.Method of testing be first to transistor apply a 12V grid write Voltage, makes grid BNT ferroelectric thin film polarize, removes after writing grid voltage, fixing 8V's Grid read voltage, record drain current maintains essentially in 10-4A, corresponding is transistor Opening (on-state).Applying when writing voltage of-12V, the bismuth titanates of neodymium doping is thin The polarization of film is inverted, and causes the threshold voltage of transistor to increase, and drain current maintains 10-10A, corresponding closed mode (off-state).As shown in Figure 6, transistor have passed through even Continuous 24 hours (105S) after holding test, the drain current ratio of ON state and OFF state (on-/off-state current ratios) is still above 105If, only to drain electrode electricity in Fig. 6 Flow curve does and is simply extrapolated to 10 years (3 × 108S), switch state drain current ratio (~ 102) still there is data storage function, this bismuth titanate film based on neodymium doping is described The transistor of ferro-electric field effect transistor keeps performance to basically reach business-like mark Alignment request.
The above specific embodiment, it is intended to further describe the use of the present invention, Help is further appreciated by the present invention rather than in order to limit the scope of the present invention.This area It is to be understood by the skilled artisans that in the case of without departing from the spirit and principles in the present invention, Various amendments and replacement should be included within the scope of the present invention.

Claims (7)

1. the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping, it is characterised in that be the bismuth titanates/ceria/Si ferroelectric thin film field-effect transistor of the Pt metal/neodymium doping including MFIS structure, includingpType silicon substrate, describedpThe upper left right side of type silicon substrate is respectively equipped with source electrode, ceria insulation gate layer and drain electrode, and supreme ferroelectric layer and the grid of being sequentially provided with in bottom right successively above described ceria insulation gate layer, described ferroelectric layer is the bismuth titanate film of neodymium doping, i.e. BNT thin film.
The ferro-electric field effect transistor of bismuth titanate film based on neodymium doping the most according to claim 1, it is characterised in that the thickness of ceria insulation gate layer is 10 nm, and the thickness of the bismuth titanate film of neodymium doping is 200-300 nm.
3. the preparation method of the ferro-electric field effect transistor of the bismuth titanate film based on neodymium doping described in claim 1 ~ 2, it is characterised in that for inciting somebody to actionpType silicon substrate is as quasiconductor, and ceria is as insulation gate layer, and the bismuth titanates bigger using residual polarization, the preferable neodymium of anti-fatigue performance adulterates is as ferroelectric layer, and Pt metal is as electrode, CeO2Insulation gate layer uses radio-frequency magnetron sputter method to prepare, and uses Sol-Gel technique to prepare the bismuth titanate film of ferroelectric layer neodymium doping, utilizes lithographic technique afterwards, etches away bismuth titanates and CeO that the neodymium above source region and drain region adulterates2Layer, obtains source, drain electrode window, utilizes mask plate and uses DC magnetron sputtering method plating Pt metal level to obtain source, leakage, grid.
The preparation method of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping the most according to claim 3, it is characterised in that comprise the steps:
S1, the preparation of insulation gate layer: insulation gate layer is CeO2Layer, uses radio-frequency magnetron sputter method to prepare, and its thickness is 10 nm, CeO2Preparation technology is: sputtering power is 65 W;Oxygen: argon is 3:1;Air pressure is 1 Pa, and underlayer temperature is 200oC, sedimentation time is 2 min;
S2, prepare insulation gate layer after, on this, deposit the ferroelectric layer in ferroelectric thin film field-effect transistor, its ferroelectric layer is the bismuth titanate ferro-electricity membrane of neodymium doping, wherein neodymium with the mol ratio of bismuth be 3.15:0.85, its chemical formula is Bi3.15Nd0.85Ti3O12, the bismuth titanate ferro-electricity membrane of doping uses Sol-Gel method to prepare, uses successively short annealing;
After S3, deposition ferroelectric layer BNT thin film, etch away BNT and CeO above source region and drain region with etching apparatus2Layer, obtains source, drain electrode window, combines magnetically controlled DC sputtering Pt metal as electrode with mask plate afterwards, ultimately forms FeFET, the ferro-electric field effect transistor of i.e. based on neodymium doping bismuth titanate film.
The preparation method of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping the most according to claim 4, it is characterised in that the preparation flow of the bismuth titanate ferro-electricity membrane of described doping is:
The configuration of the precursor solution of the bismuth titanates (BNT) of S21, neodymium doping:
(1) the most accurately weigh the neodymium nitrate of respective quality, in the beaker of glacial acetic acid that bismuth nitrate puts into 6 ml, and with magnetic agitation instrument make it fully dissolve, mix homogeneously;
(2) in the beaker of the glacial acetic acid that the butyl titanate weighing respective quality puts into 4 ml, add the acetylacetone,2,4-pentanedione of 1 ml and stablize solution, and be placed on magnetic agitation instrument stirring and make it fully dissolve;
(3) again by after solution mixing in above-mentioned two beaker, add that appropriate glacial acetic acid and ethylene glycol monomethyl ether form total capacity 20 ml, concentration is about the faint yellow precursor solution of 0.1 mol/L;
(4) after precursor solution prepares, with preservative film, beaker mouth is sealed, and put into preservation 4 ~ 6 days in calorstat, the precursor solution of the bismuth titanates that stable, the uniform neodymium that ageing obtains after placing adulterates;
S22, spin coating, heat treatment
(1) with filter paper, the precursor solution of the bismuth titanates that neodymium adulterates is filtered;
(2) with disposable syringe, colloidal sol is dripped to use sol evenning machine whirl coating on the long silicon substrate having ceria insulation gate layer, first get rid of 8 seconds with at the beginning of the low speed of 400 revs/min, again the high speed spin coating 20 seconds of 4000 revs/min so that solution is coated uniformly on substrate surface, obtains gel wet film;
S23, short annealing:
Gel wet film is put in quick anneal oven, first 180oC dries 3 min, then 400oC is pyrolyzed 4 min, and 650oC preannealing 5 min, has obtained thin film, then repeats 5-6 this process, has obtained the film sample of desired thickness, places in quick anneal oven, and 700oC annealing 3 min eventually, have finally obtained final BNT thin film, and its thickness are between 200-300 nm.
The preparation method of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping the most according to claim 5, it is characterised in that in S21, the volume ratio of described glacial acetic acid and ethylene glycol monomethyl ether is 1:2.
The preparation method of the ferro-electric field effect transistor of bismuth titanate film based on neodymium doping the most according to claim 5, it is characterised in that in S21, described bismuth nitrate excess 10 mol%.
CN201610292140.XA 2016-05-05 2016-05-05 Ferroelectric field effect transistor based on neodymium-doped bismuth titanate film and preparation method Pending CN105826389A (en)

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CN107423463A (en) * 2017-02-23 2017-12-01 湘潭大学 A kind of method for building up and system of ferro-electric field effect transistor model
CN107910030A (en) * 2017-10-26 2018-04-13 湘潭大学 A kind of preparation method of flexibility BNT ferroelectric thin films
CN111312820A (en) * 2019-11-29 2020-06-19 中国科学院微电子研究所 Ferroelectric field effect transistor, three-dimensional memory and manufacturing method thereof

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侯芳: "溶胶-凝胶法制备掺钕钛酸铋铁电薄膜", 《苏州科技学院学报(自然科学版)》 *
唐明华: "MFIS结构铁电薄膜场效应晶体管的制备及性能表征", 《万方》 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107423463A (en) * 2017-02-23 2017-12-01 湘潭大学 A kind of method for building up and system of ferro-electric field effect transistor model
CN107423463B (en) * 2017-02-23 2020-10-27 湘潭大学 Method and system for establishing ferroelectric field effect transistor model
CN107910030A (en) * 2017-10-26 2018-04-13 湘潭大学 A kind of preparation method of flexibility BNT ferroelectric thin films
CN107910030B (en) * 2017-10-26 2020-11-06 湘潭大学 Preparation method of flexible BNT ferroelectric film
CN111312820A (en) * 2019-11-29 2020-06-19 中国科学院微电子研究所 Ferroelectric field effect transistor, three-dimensional memory and manufacturing method thereof
CN111312820B (en) * 2019-11-29 2023-05-16 中国科学院微电子研究所 Three-dimensional memory and manufacturing method thereof

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Application publication date: 20160803