CN105517370A - Circuit board pad machining method - Google Patents
Circuit board pad machining method Download PDFInfo
- Publication number
- CN105517370A CN105517370A CN201510854492.5A CN201510854492A CN105517370A CN 105517370 A CN105517370 A CN 105517370A CN 201510854492 A CN201510854492 A CN 201510854492A CN 105517370 A CN105517370 A CN 105517370A
- Authority
- CN
- China
- Prior art keywords
- perforate
- plating
- resin
- processing method
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
Abstract
The invention relates to a circuit board pad machining method. The method includes the following steps of: resin hole drilling: an open hole is drilled in a circuit board, the open hole is located in a pad region, and the periphery of the opening of the open hole is an outer layer pad; resin hole plugging: the open hole is filled with a filler; electroplating packing: electroplating is performed on the recesses of the filler, and an electroplated layer protrudes out relative to the outer layer pad; and partial polishing: the electroplated layer is polished, so that the electroplated layer can be flush to the outer layer pad. With the circuit board pad machining method adopted, the whole pad is flat and has no recesses. Electroplating is performed before partial polishing, and the electroplated layer is higher than the outer layer pad, and the protruding portion of the electroplated layer is polished, and therefore, the original state of the circuit board will not be damaged.
Description
Technical field
The invention belongs to circuit, electronic applications, be specifically related to a kind of board pads processing method.
Background technology
When needs carry out POFV (Platedoverfilledvia electroplates by the hole after consent) technique to pcb board, to the hole after consent is electroplated, pad (being called for short POFV pad) flatness requirement is high.But, often there is depression, make the evenness of plating pad reduce in traditional PCB plate production method, and depression easily causes the problem such as loose contact, poor signal after filling holes with resin.Particularly in the middle of the production of ATE (abbreviation of AUTOMATICTESTEQUIPMENT) plate, ATE plate is as the one of semiconductor test board, and manufacture difficulty is large, quality requirements is high.But, traditional jack process consent poor effect there will be consent depression (5-25um), particularly for aperture 0.15-0.25mm, radius-thickness ratio is more than the plate of 20:1, more easily there is depression, take high thickness to diameter ratio as row, general radius-thickness ratio is about 90%-95% more than plate consent qualification rate of 20:1, the depression plate of 5%-10% is had to need to return plug and nog plate process, and the plate that caves in be difficult to once do over again qualified, usually 3-5 time can not done over again not etc., the nog plate that so repeats to do over again easily causes the impaired dew base material of base copper to be scrapped, the thick lack of homogeneity of plate face copper, etching easily produced erosion or etching is not scrapped only, its scrappage is about 0.5%-2%.On the other hand, doing over again to scrap just means that needing again sawing sheet to mend throws making, and it is long that whole benefit throws technique Making programme, delays manufacturing schedule.
Summary of the invention
Based on this, the invention reside in the defect overcoming prior art, provide a kind of board pads processing method, plating pad does not cave in and evenness is high, improves circuit board qualification rate.
Its technical scheme is as follows:
A kind of board pads processing method, is characterized in that, comprise step: resin is holed, and drill through perforate on circuit boards, described perforate is positioned at welding disking area, and the periphery of the opening of described perforate is outer layer pad; Filling holes with resin, uses filler to fill described perforate; Fill plating, electroplate the recess of filler, electrodeposited coating is protruding relative to described outer layer pad; Detail sanding, polishes to electrodeposited coating, makes it concordant with outer layer pad.
Wherein in an embodiment, board pads processing method also comprises: after filling holes with resin, before filling plating, dry film is pasted to circuit board, and window on dry film with reference to the aperture position of described perforate, the opening of described perforate is positioned at windowed regions, when carrying out described filling plating, electroplate in described windowed regions, after filling plating, film is moved back to dry film.
Wherein in an embodiment, the radius of described windowed regions is greater than the radius 0.1524mm to 0.2032mm of described perforate.
Wherein in an embodiment, when resin is holed, make CAM file for drill hole of drilling machine, there is in described CAM file positional information, the radius information of perforate; When windowing to described dry film, the radius information of perforate in CAM file according to the size modification of windowed regions radius, uses amended CAM file to window.
Wherein in an embodiment, filter out the position of opening of depression, revise the positional information of perforate in described CAM file, only to there being the perforate of depression to window.
Wherein in an embodiment, when filling plating, electrodeposited coating protrudes 5 μm to 10 μm relative to described outer layer pad.
Wherein in an embodiment, fill in plating, the material of plating is copper or copper alloy.
Wherein in an embodiment, after described resin boring, before described filling holes with resin, also comprise step: de-smear, for the first time heavy copper, first time plate plating, plated hole dry film, plated hole for the first time.
Wherein in an embodiment, after described filling holes with resin, before described filling plating, also comprise step: resin nog plate, boring, plasma, for the second time de-smear, the heavy copper of second time, the plating of second time plate, making outer layer pad figure.
Wherein in an embodiment, after described detail sanding, also comprise step: make outer circuit figure, graphic plating.
Beneficial effect of the present invention is:
Perforate is drilled through in the welding disking area of circuit board, filler is used to fill described perforate, after filling, filler caves in relative to the neighboring area appearance of the opening of perforate on circuit board, the recess of filler is electroplated, make electrodeposited coating higher than outer layer pad, now depression is filled, detail sanding is carried out in region after plating, make it concordant with outer layer pad, so make that whole pad is smooth, not depression, like this, the pad of the circuit board of final molding does not just cave in, overall leveling, circuit board performance is good; Electroplated before detail sanding, and electrodeposited coating is higher than outer layer pad, the part protruded is polished, does not damage the original state of circuit board.
Accompanying drawing explanation
Fig. 1 is the profile at the rear pad place of resin boring on circuit board in the embodiment of the present invention;
Fig. 2 is the pad structure figure with depression that conventional method manufactures;
Fig. 3 is the structure chart one at pad place on circuit board in the embodiment of the present invention;
Fig. 4 is the structure chart two at pad place on circuit board in the embodiment of the present invention;
Fig. 5 is the structure chart three at pad place on circuit board in the embodiment of the present invention.
Description of reference numerals:
100, substrate, 110, perforate, 120, depression, 200, filler, 300, conductive layer, 400, pad, 410, outer layer pad, 500, electrodeposited coating.
Embodiment
Below the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
As shown in Figure 1, for carrying out the structure chart after resin boring on circuit boards, resin boring drills through perforate 110 on the substrate 100 of circuit board.Traditional circuit board fabrication mode, on the basis of structure shown in Fig. 1, carry out filling holes with resin, the heavy technique such as copper, plate plating, finally form the layers of copper required for pad on the surface of substrate and perforate 110 place, because depression easily appears in filling holes with resin technique, after making finished circuit board, depression can not be eliminated, form structure as shown in Figure 2, the outer surface of substrate 100 has pad 400, by resin filling in perforate 110, pad 400 comprises the open area of perforate 110, and the part that pad 400 is surrounded on the open circumferential of perforate 110 is outer layer pad 410.In the position of perforate 110 opening, there is depression 120, the evenness that depression 120 affect pad 400, and cave in and 120 cause bonding area to reduce, and then cause loose contact, poor signal, seriously restrict the performance of circuit board.
As shown in Fig. 3 to 5, for using the step exploded view in the present embodiment board pads processing method making circuit boards.After carrying out resin boring, for the first time de-smear, for the first time heavy copper, first time plate plating, plated hole dry film, plated hole successively, the surface of substrate 100 and the inwall of perforate 110 has conductive layer 300; Then carry out filling holes with resin, resin nog plate, boring, plasma, second time de-smear, the heavy copper of second time, the plating of second time plate, make the techniques such as outer layer pad figure, form structure as shown in Figure 3; Wherein, filling holes with resin is with filler 200 (adopt epoxy resin in the present embodiment, but be not limited thereto) filling perforate 110, and is solidificated in perforate 110 by filler 200, but often causes filler 200 to occur depression 120 at the opening part of perforate 110.
On the basis of structure shown in Fig. 3, dry film is pasted to circuit board, screening circuit plate there is the perforate 110 of depression 120, and window on dry film with reference to the position with the perforate 110 of depression 120, the opening of perforate 110 is positioned at windowed regions, in the region of windowing, carry out filling plating, other perforates 110 without depression 120 are not owing to windowing, unaffected.Due in aforementioned resin drill process, make CAM file for drill hole of drilling machine, there is in CAM file the positional information of perforate 110, radius information.So, in dry film windowing-process, existing CAM file can be utilized, namely according to the position at perforate 110 place, the size of windowed regions radius that occur depression 120, revise the radius information of these perforates 110 in CAM file with the perforate 110 of depression 120 in screening CAM file, use amended CAM file to window, like this, utilize existing CAM file, the workload of windowing can be reduced, raise the efficiency.Wherein, the radius in the region of windowing is greater than the radius 0.1524mm to 0.2032mm (i.e. 6mil to 8mil) of perforate 110, and namely α is as shown in Figure 4 0.1524mm to 0.2032mm (i.e. 6mil to 8mil).Preferably, the radius that the radius in the region of windowing is greater than perforate 110 can be 6mil, 6.5mil, 7mil, 7.5mil or 8mil.When filling plating, electrodeposited coating 500 protrudes 5 μm to 10 μm relative to outer layer pad 410, and namely β is as shown in Figure 45 μm to 10 μm.Preferably, electrodeposited coating 500 protrudes 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm relative to outer layer pad 410.Filling and electroplating the plated material used is copper or copper alloy, improves the performance of pad 400, moves back film after plating to dry film.
On the basis of structure shown in Fig. 4, detail sanding is carried out to electrodeposited coating 500, make it concordant with outer layer pad 410, obtain structure as shown in Figure 5, then circuit board is being carried out to the technique making outer circuit figure, graphic plating.Like this, the pad 400 of the circuit board of final molding does not just cave in 120, and pad is smooth, and circuit board performance is good; On the other hand, apply board pads manufacture method of the present invention, on circuit board, each pad is all smooth, circuit board can be avoided to do over again because pad caves in, also therefore avoiding circuit board to scrap because doing over again, making the scrappage of doing over again because of pad depression be 0, than the scrappage of traditional jack process 0.5%-2%, significantly improve conforming product rate, saved production cost, improve production efficiency.
In foregoing circuit plate pad processing method, to circuit board carry out resin boring, first time de-smear, first time heavy copper, first time plate plating, after plated hole dry film, plated hole, filling holes with resin, resin nog plate, boring, plasma, second time de-smear, the heavy copper of second time, the plating of second time plate, after the technique such as making outer layer pad figure, just to occurring that smooth process is carried out in the perforate of depression 120, do not affect other Making programme of circuit board.
Each technical characteristic of above embodiment can combine arbitrarily, for making description succinct, all possible combination of each technical characteristic in above-described embodiment is not all described, but, as long as the combination of these technical characteristics does not exist contradiction, be all considered to be the scope that this specification is recorded.
Above embodiment only have expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but can not therefore be construed as limiting the scope of the patent.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (10)
1. a board pads processing method, is characterized in that, comprises step:
Resin is holed, and drill through perforate on circuit boards, described perforate is positioned at welding disking area, and the periphery of the opening of described perforate is outer layer pad;
Filling holes with resin, uses filler to fill described perforate;
Fill plating, electroplate the recess of filler, electrodeposited coating is protruding relative to described outer layer pad;
Detail sanding, polishes to electrodeposited coating, makes it concordant with outer layer pad.
2. board pads processing method according to claim 1, it is characterized in that, also comprise: after filling holes with resin, before filling plating, dry film is pasted to circuit board, and window on dry film with reference to the aperture position of described perforate, the opening of described perforate is positioned at windowed regions, when carrying out described filling plating, electroplate in described windowed regions, after filling plating, film is moved back to dry film.
3. board pads processing method according to claim 2, is characterized in that, the radius of described windowed regions is greater than the radius 0.1524mm to 0.2032mm of described perforate.
4. board pads processing method according to claim 3, is characterized in that, when resin is holed, makes CAM file for drill hole of drilling machine, has positional information, the radius information of perforate in described CAM file; When windowing to described dry film, the radius information of perforate in CAM file according to the size modification of windowed regions radius, uses amended CAM file to window.
5. board pads processing method according to claim 4, is characterized in that, filters out the position of opening of depression, revises the positional information of perforate in described CAM file, only to there being the perforate of depression to window.
6. board pads processing method according to claim 1, is characterized in that, when filling plating, electrodeposited coating protrudes 5 μm to 10 μm relative to described outer layer pad.
7. board pads processing method according to claim 1, is characterized in that, fill in plating, the material of plating is copper or copper alloy.
8. the board pads processing method according to any one of claim 1 to 7, is characterized in that, after described resin boring, before described filling holes with resin, also comprises step: de-smear, for the first time heavy copper, first time plate plating, plated hole dry film, plated hole for the first time.
9. the board pads processing method according to any one of claim 1 to 7, it is characterized in that, after described filling holes with resin, before described filling plating, also comprise step: resin nog plate, boring, plasma, for the second time de-smear, the heavy copper of second time, the plating of second time plate, making outer layer pad figure.
10. the board pads processing method according to any one of claim 1 to 7, is characterized in that, after described detail sanding, also comprises step: make outer circuit figure, graphic plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510854492.5A CN105517370B (en) | 2015-11-27 | 2015-11-27 | Board pads processing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510854492.5A CN105517370B (en) | 2015-11-27 | 2015-11-27 | Board pads processing method |
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| CN105517370A true CN105517370A (en) | 2016-04-20 |
| CN105517370B CN105517370B (en) | 2018-06-22 |
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| CN201510854492.5A Active CN105517370B (en) | 2015-11-27 | 2015-11-27 | Board pads processing method |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106455363A (en) * | 2016-08-09 | 2017-02-22 | 华进半导体封装先导技术研发中心有限公司 | Printed circuit board manufacturing method and printed circuit board |
| CN107278036A (en) * | 2017-08-07 | 2017-10-20 | 四川九立微波有限公司 | A kind of processing method of the circuit board of numerical-control attenuator QFN packaging ground pads |
| CN107949174A (en) * | 2017-12-04 | 2018-04-20 | 广州兴森快捷电路科技有限公司 | The production method for burying copper billet circuit board |
| CN108235579A (en) * | 2018-01-08 | 2018-06-29 | 昆山首源电子科技有限公司 | 5G communication high frequency signal plate slide-changing resistor performance boost techniques |
| CN108882507A (en) * | 2018-08-03 | 2018-11-23 | 江苏普诺威电子股份有限公司 | Thick copper heat dissipation PCB processing technology |
| WO2019056651A1 (en) * | 2017-09-22 | 2019-03-28 | 广州兴森快捷电路科技有限公司 | Circuit board solder pad repair method |
| TWI665951B (en) * | 2017-10-13 | 2019-07-11 | Avary Holding (Shenzhen) Co., Limited. | Flexible printed circuit board and method for manufacturing the same |
| CN110785017A (en) * | 2019-11-08 | 2020-02-11 | 深南电路股份有限公司 | Method for preparing printed circuit board |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106455363A (en) * | 2016-08-09 | 2017-02-22 | 华进半导体封装先导技术研发中心有限公司 | Printed circuit board manufacturing method and printed circuit board |
| CN107278036A (en) * | 2017-08-07 | 2017-10-20 | 四川九立微波有限公司 | A kind of processing method of the circuit board of numerical-control attenuator QFN packaging ground pads |
| WO2019056651A1 (en) * | 2017-09-22 | 2019-03-28 | 广州兴森快捷电路科技有限公司 | Circuit board solder pad repair method |
| TWI665951B (en) * | 2017-10-13 | 2019-07-11 | Avary Holding (Shenzhen) Co., Limited. | Flexible printed circuit board and method for manufacturing the same |
| CN107949174A (en) * | 2017-12-04 | 2018-04-20 | 广州兴森快捷电路科技有限公司 | The production method for burying copper billet circuit board |
| CN108235579A (en) * | 2018-01-08 | 2018-06-29 | 昆山首源电子科技有限公司 | 5G communication high frequency signal plate slide-changing resistor performance boost techniques |
| WO2019134207A1 (en) * | 2018-01-08 | 2019-07-11 | 昆山首源电子科技有限公司 | Process for improving slip resistance performance of 5g communication high-frequency signal board |
| CN108235579B (en) * | 2018-01-08 | 2020-04-24 | 昆山首源电子科技有限公司 | 5G communication high-frequency signal board sliding resistance performance improving process |
| CN108882507A (en) * | 2018-08-03 | 2018-11-23 | 江苏普诺威电子股份有限公司 | Thick copper heat dissipation PCB processing technology |
| CN110785017A (en) * | 2019-11-08 | 2020-02-11 | 深南电路股份有限公司 | Method for preparing printed circuit board |
| CN110785017B (en) * | 2019-11-08 | 2021-06-25 | 深南电路股份有限公司 | Method for preparing printed circuit board |
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| CN105517370B (en) | 2018-06-22 |
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