CN105144379A - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN105144379A
CN105144379A CN201480023909.7A CN201480023909A CN105144379A CN 105144379 A CN105144379 A CN 105144379A CN 201480023909 A CN201480023909 A CN 201480023909A CN 105144379 A CN105144379 A CN 105144379A
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CN
China
Prior art keywords
semiconductor device
interarea
transistor
terminal
bonding pad
Prior art date
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Pending
Application number
CN201480023909.7A
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English (en)
Inventor
佐藤知稔
荻野荣治
池谷直泰
森下敏
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Sharp Corp
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Sharp Corp
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Publication of CN105144379A publication Critical patent/CN105144379A/zh
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Abstract

形成有源极电极(120)的常截止型场效应晶体管(102)的主面与芯片焊盘(105)的第一主面相接触，芯片焊盘(105)兼作半导体器件(100)的源极端子。由此，提供一种能够降低在共源共栅连接电路的工作中最重要的电感，提高电路的工作性能的半导体器件。

Description

半导体器件
技术领域
本发明涉及半导体器件，尤其是涉及将多个场效应晶体管共源共栅(cascode)连接的半导体器件。
背景技术
现有技术中已知具有多个场效应晶体管的半导体器件。作为一个例子，在图9和图10中表示现有的半导体器件900。图9是半导体器件900的侧面图，图10是半导体器件900的俯视图。
如图9和图10所示，半导体器件900包括共源共栅连接的常导通型MOSFET(metal-oxide-semiconductorfield-effecttransistor：金属氧化物半导体场效应晶体管)302和常截止型MOSFET303。常导通型MOSFET302为横型器件，常截止型MOSFET303为纵型器件。
如图9所示，常导通型MOSFET302以形成有源极端子305、漏极端子306和栅极端子307的面在上的方式，被芯片焊接(diebond)在衬底301上。另外，常截止型MOSFET303以形成有源极端子310和栅极端子311的面在上，以形成有漏极端子312的面在下的方式，被芯片焊接在衬底301上。常截止型MOSFET303的栅极端子311经由Al线320与外部取出端子(栅极输入端子)321焊接。另外，常导通型MOSFET302的栅极端子307经由Al线322与外部取出端子(GND端子)318焊接。
如图10所示，常导通型MOSFET302的源极端子305经由Al线315与衬底301的端子313焊接。此外，在端子313电连接有常截止型MOSFET303的漏极端子312。另外，常导通型MOSFET302的漏极端子306经由Al线316与衬底301上的外部取出端子(输出端子)焊接319。常截止型MOSFET303的源极端子310经由Al线317与外部取出端子(GND端子)318焊接。
在半导体器件900中，由于Al线315、316、317、320、322的原因，在共源共栅连接电路中产生比较高的寄生电感，因此，结果是存在电路整体的阻抗变高的问题。另外，在半导体器件900中，由于常导通型MOSFET302和常截止型MOSFET303在衬底301上并列地配置，所以衬底301的面积不得不变大。因此，存在半导体器件900难以组装到设备中，或者能够搭载到设备中的数量较少的问题。
另一方面，在专利文献1中公开了具有第一半导体芯片和第二半导体芯片的半导体器件。在上述半导体器件中，第一半导体芯片和第二半导体芯片层叠在衬底上，并且经由导电性凸起(bump)与衬底的电极倒装式(flip-chip)接合，由此降低电路的电感。
在专利文献1中记载的半导体器件的电路工作中，第一半导体芯片和第二半导体芯片与衬底和外部连接端子的连接部位的电感是重要的。但是，在上述电路中，第一半导体芯片和第二半导体芯片经由导电性凸起与衬底和外部连接端子连接。因为该导电性凸起的电感较大，所以上述半导体器件存在着不能够充分地降低在电路工作中重要的电感的问题。
现有技术文献
专利文献
专利文献1：特开2011-54652号公报(2011年3月17日公开)
发明内容
发明要解决的技术问题
本发明鉴于上述的问题点而完成，其目的在于提供一种能够降低在共源共栅连接电路的工作中最重要的电感，提高电路的工作性能的半导体器件。
用于解决问题的技术手段
为了解决上述问题，本发明的一个方式的半导体器件由多个场效应晶体管共源共栅连接而成，包括：常截止型场效应晶体管，其为上述多个场效应晶体管中的一个，具有形成有栅极电极和漏极电极的第一主面和形成有源极电极的第二主面；和芯片焊盘，其具有与上述常截止型场效应晶体管的第二主面接触的第一主面，且兼作该半导体器件的源极端子。
发明效果
根据本发明的一个方式，能够降低在共源共栅连接电路的工作中最重要的电感，提高电路的工作性能。
附图说明
图1是表示本发明的一个方式的半导体器件的结构的俯视图。
图2是图1所示的半导体器件的侧面图。
图3是图1所示的半导体器件的电路图。
图4是表示本发明的其它实施方式的半导体器件的结构的俯视图。
图5是表示本发明的其它实施方式的半导体器件的结构的俯视图。
图6是图5所示的半导体器件的侧面图。
图7是表示本发明的其它实施方式的半导体器件的结构的俯视图。
图8是具有图1所示的半导体器件的电子设备的截面图。
图9是表示现有的半导体器件的结构的侧面图。
图10是图9所示的现有的半导体器件的俯视图。
具体实施方式
[实施方式1]
以下，利用图1～图3对本发明的一个实施方式进行详细的说明。
(半导体器件100的结构)
首先，利用图1和图2说明本实施方式的半导体器件100的结构。图1和图2是半导体器件100的俯视图和侧面图。此外，在图2中，省略了导电部件133、导电部件134和第二端子104的图示。
如图1所示，半导体器件100包括常导通型场效应晶体管101(以下，简称为晶体管101)、常截止型场效应晶体管102(以下，简称为晶体管102)、第一端子103(漏极端子DT)、第二端子104(栅极端子GT)、芯片焊盘(diepad)105和密封部件106。晶体管101具有比晶体管102高的耐压。晶体管101例如可以是GaN-MOSFET。晶体管102例如可以是Si-MOSFET。芯片焊盘105可以由具有导电性的材料形成，其它的条件没有限定。另外，密封部件106例如由树脂形成。
如图2所示，在半导体器件100中，晶体管101和晶体管102被共源共栅连接。晶体管101和晶体管102配置在芯片焊盘105上，而且由密封部件106密封。芯片焊盘105的下表面的一部分兼用作半导体器件100的源极端子ST。以下，将晶体管101的上表面、下表面分别称为第一主面S1、第二主面S4。将晶体管102的上表面、下表面分别称为第一主面S2、第二主面S5。将芯片焊盘105的上表面、下表面分别称为第一主面S3、第二主面S6。
如图1所示，在晶体管101的第一主面S1上配置有源极电极110、栅极电极111和漏极电极112。在晶体管102的第一主面S2上配置有栅极电极121和漏极电极122。另外，在晶体管102的第二主面S5上配置有源极电极120。此外，在图1中，为了说明的方便，以在晶体管102的背面(第二主面S5)的一部分形成源极电极120的方式进行了图示，但晶体管102的背面整体成为源极电极120也不违反本发明的主旨。
配置在晶体管101的第一主面S1上的源极电极110与配置在晶体管102的第一主面S2上的漏极电极122由导电体131电连接。配置在晶体管101的第一主面上的漏极电极112与第一端子103由导电体132电连接。
配置在晶体管102的第一主面S2上的栅极电极121与第二端子104由导电部件133电连接。配置在晶体管101的第一主面S1上的栅极电极111与芯片焊盘105的第一主面S3由导电部件134电连接。另外，晶体管102的第二主面S5上的源极电极120与芯片焊盘105的第一主面S3电连接。
如图2所示，在半导体器件100中，芯片焊盘105的第一主面S3与晶体管102的第二主面S5相对地接触。另外，芯片焊盘105的第一主面S3与晶体管101的第二主面S4相对地接触。
晶体管101的第二主面S4利用焊料等被焊接在芯片焊盘105的第一主面S3上。焊料具有将晶体管101焊接在芯片焊盘105的功能，并且也具有将晶体管101与芯片焊盘105电连接的功能。此外，也可以代替焊料而使用焊接性能高的导电性膏。晶体管102的第二主面S5利用导热性的焊接材料被焊接在芯片焊盘105的第一主面S3上。焊接材料具有导热性，从而能够将由晶体管102产生的热向芯片焊盘105散热。此外，由于晶体管102与芯片焊盘105无需电连接，所以焊接材料也可以不具有导电性。
(关于半导体器件100的电路EC)
接着，使用图3对在半导体器件100中形成的电子电路EC的结构和动作进行说明。图3是电路EC的电路图。如图3所示，在电路EC中包括晶体管101、晶体管102、漏极端子DT(即第一端子103)、栅极端子GT(即第二端子104)和源极端子ST(即芯片焊盘105的第二主面S6)。
在电路EC中，寄生电感12、13、15、24、25、26是在为了形成电路EC将各元件相互电连接时，在电路EC中以寄生的方式产生的电感。即，寄生电感12、13、15、24、25、26是利用线圈的电路符号示意性地表示在图3中，并不是主动地加入在电路EC中的线圈。寄生电感12、13、15、24、25、26通常为大概1纳亨至十几纳亨的大小。以下，对各个寄生电感12、13、15、24、25、26进行详细说明。
寄生电感12是连接晶体管101的源极电极110与晶体管102的漏极电极122的导电体131所具有的电感。另外，寄生电感13是电连接晶体管101的漏极电极112与第一端子103(漏极端子DT)的导电体132所具有的电感。寄生电感15是电连接晶体管101的栅极电极111与分支点27的导电部件134所具有的电感。这里，分支点27是电路EC中，通过晶体管102的源极电极120、晶体管101的栅极电极111、或芯片焊盘105的第二主面S6(源极端子ST)的电流路径中分支的点。分支点27存在于芯片焊盘105的第一主面S3上。
寄生电感24是电连接晶体管102的栅极电极121与第二端子104(栅极端子GT)的导电部件133的电感。寄生电感25是晶体管102的第二主面S5与芯片焊盘105的第一主面S3的连接部分所具有的电感。寄生电感26是芯片焊盘105的第二主面S6(源极端子ST)与分支点27之间的电感。
在电路EC中，电流主要依次经由漏极端子DT、寄生电感13、晶体管101、寄生电感12、晶体管102、寄生电感25、分支点27和寄生电感26流至源极端子5。
(电路EC中的寄生电感的抑制)
由寄生电感12、13、15、25、26在电路EC中产生的反电动势通过将各寄生电感的值乘以电流的变化率而得到。因此，在电路EC中，随着上述的主电流的变化率变大，由寄生电感12、13、15、25、26在电路EC中产生的反电动势变大。例如，100A的电流作为1MHz程度的矩形波信号在电路EC中流通的情况下，电路EC中，每10纳秒产生100A的变化。即，电路EC中的电流的变化率为1010A/秒。在该情况下，即使寄生电感12、13、25、26仅1纳亨，在电路EC中也产生10V的反电动势。这样大的反电动势有可能对电路EC的工作造成影响。
晶体管102主要接受半导体器件100的控制。因此，施加在晶体管102的源极电极120的反电动势对于电路EC的工作的影响特别大。该反电动势是由寄生电感25、26产生的(参照图3)。由寄生电感25、26产生的反电动势实质上以使施加于晶体管102的栅极电极121的电压降低的方式作用。因此，在由寄生电感25、26产生的反电动势达到阈值的情况下，晶体管102的导通－截止反转。其结果是，电路EC发生错误工作。因此，必须抑制电路EC中的电流的变化率，以使由寄生电感25、26产生的反电动势不超过晶体管102的阈值。
但是，如上所述，在半导体器件100中，配置于晶体管102的第二主面S5的源极电极120与芯片焊盘105的第一主面S3相接触。另外，芯片焊盘105的第二主面S6(的一部分)成为半导体器件100的源极端子ST。因此，寄生电感25是晶体管102的第二主面S5与芯片焊盘105的第一主面S3的连接部分所产生的电感。另外，寄生电感26是在芯片焊盘105的第一主面S3与第二主面S6之间产生的电感。
因此，根据晶体管102的第二主面S5与芯片焊盘105的第一主面S3的连接部分的厚度以及芯片焊盘105的厚度来决定寄生电感25和寄生电感26。寄生电感25、26大致与电流流通的距离成比例。由于上述连接部分的厚度和芯片焊盘105的厚度相对于在与芯片焊盘105的第一主面S3平行的方向(以下称为基准方向)上的半导体器件100的长度均充分小，所以寄生电感25和寄生电感26也非常小。因此，由寄生电感25和寄生电感26产生的施加于晶体管102的源极电极120的反电动势较小，所以由于上述反电动势而晶体管102的导通－截止发生反转的可能性较低。因此，电路EC能够稳定地工作。
如上所述，由寄生电感25、26产生的反电动势被施加在晶体管102的源极电极120。另一方面，由寄生电感15、26产生的反电动势被施加在晶体管101的栅极电极111。如上所述，寄生电感15是晶体管101的栅极电极111与分支点27之间的电感。另一方面，寄生电感25是晶体管102的第二主面S5与芯片焊盘105的第一主面S3的连接部分具有的电感。根据图1和图2可知，从栅极电极111到分支点27的长度(即、导电部件134的长度)比从晶体管102的第二主面S5到芯片焊盘105的第一主面S3的长度长。因此，由寄生电感15产生的反电动势比由寄生电感25产生的反电动势大的可能性高。因此，施加于晶体管101的栅极电极111的反电动势比施加于晶体管102的源极电极120的反电动势大的可能性高。因此，优选晶体管101的耐压比晶体管102的耐压大，使得不因反电动势导致晶体管101的导通－截止发生发转。
[实施方式2]
关于本发明的其它实施方式，基于图4进行说明如下。此外，为了说明的方便，对于与在上述实施方式已说明的部件具有相同功能的部件，标注相同的符号，省略其说明。
(半导体器件200的结构)
以下，使用图4说明本实施方式的半导体器件200的结构。图4是半导体器件200的俯视图。此外，从侧面看半导体器件200的结构与图2所示的半导体器件100的结构相同。
如图4所示，半导体器件200在上述实施方式的半导体器件100的结构中具有常截止场效应晶体管202(以下称为晶体管202)来代替常截止场效应晶体管102。另外，在半导体器件200与半导体器件100之间，通过导电部件134布线的部件不同。半导体器件200的其它的结构与半导体器件100相同。另外，在半导体器件200中形成的电路与图3所示的半导体器件100的电路EC相同。
如图4所示，在晶体管202的第一主面S2上设置有表面源极电极120a。在晶体管202的第一主面S2上的表面源极电极120a与第二主面S5上的源极电极120电连接。在晶体管202的内部存在晶体管101的栅极电极111、晶体管202的源极电极120和芯片焊盘105的第二主面S6(源极端子ST)之间的分支点27(参照图3)。
(关于半导体器件200的电路EC)
根据半导体器件200的结构，寄生电感25依赖于从芯片焊盘105的第二主面S6至分支点27的芯片焊盘105的厚度和晶体管202的厚度。另外，寄生电感26不仅依赖于从分支点27至芯片焊盘105的第一主面S3的晶体管202的厚度，还依赖于晶体管202的第二主面S5与芯片焊盘105的连接部分的厚度。
与上述实施方式的半导体器件100同样地，上述连接部分的厚度和芯片焊盘105的厚度相对于在基准方向上的半导体器件200的长度均充分小。另外，晶体管202的厚度相对于在基准方向上的半导体器件200的长度也充分小。因此，寄生电感25和寄生电感26也小。
如上所述，在半导体器件200中，由于寄生电感25、26较小，所以电路EC中产生的反电动势较小。因此，半导体器件200的电路EC能够稳定地工作。
[实施方式3]
关于本发明的其它的实施方式，基于图5～图6进行说明如下。此外，为了说明的方便，对于与在上述实施方式已说明的部件具有相同功能的部件，标注相同的符号，省略其说明。
(半导体器件200的结构)
利用图5和图6说明本实施方式的半导体器件300的结构。图5和图6是半导体器件300的俯视图和侧面图。此外，在图6中，省略图示导电部件133、导电部件134和第二端子204。
如图5所示，半导体器件300的封装体的安装构造与上述事实方式的半导体器件100的封装体的安装构造不同。具体而言，半导体器件300是在半导体器件100的结构中具有第一端子203(漏极端子DT)和第二端子204(栅极端子GT)来代替第一端子103和第二端子104。半导体器件300的其它的结构与半导体器件100相同。另外，在半导体器件300中形成的电路与如图3所示的半导体器件100的电路EC相同。
如图5所示，第一端子203和第二端子204相对芯片焊盘105上的各元件的位置关系与第一端子103和第二端子104的相对芯片焊盘105上的各元件的位置关系不同。另外，如图5和图6所示，第一端子203的形状与半导体器件100的第一端子103的形状(参照图1和图2)不同。此外，第一端子203和第二端子204的位置可以根据芯片焊盘105上的晶体管101和晶体管202的位置以及在晶体管101和晶体管102上的各元件的位置决定。具体而言，第一端子203和第二端子204的位置，如下所述，以半导体器件300的电路EC的寄生电感变小的方式决定即可。
如图5所示，半导体器件300的第二端子204与栅极电极121之间的距离比半导体器件100的第二端子104与栅极电极121之间的距离短。因此，连接第二端子204与栅极电极121的导电部件133的长度比半导体器件100中的导电部件133的长度短。此外，如图6所示，连接第一端子203与漏极电极112的导电体132的长度也与半导体器件100的导电体132的长度不同。
(关于半导体器件300的电路EC)
根据半导体器件300的结构，与半导体器件100的结构相比，能够使导电部件133的长度较短。因此，依赖于导电部件133的长度的寄生电感24变得较小。
如上所述，半导体器件300的寄生电感24比半导体器件100的寄生电感24小。另外，半导体器件300中，与上述实施方式的半导体器件100同样地，寄生电感25和寄生电感26较小。因此，半导体器件300的电路EC中产生的反电动势较小，所以半导体器件300的电路EC能够稳定地工作。
另外，如图6所示，在半导体器件300中，第一端子203集中在半导体器件300的下表面侧。另外，虽然未图示，但第二端子204也集中在半导体器件300的下表面侧。因此，在半导体器件300的结构中，与半导体器件100、200的结构相比，能够缩小第一端子203与漏极电极112之间的距离以及第二端子204与栅极电极121之间的距离。由此，(i)由于能够缩小导电体132和导电部件133的长度，所以能够减少依赖于这些长度的寄生电感13、24。另外，(ii)能够使半导体器件300小型化。
另外，在半导体器件100中，第一端子103在与芯片焊盘105的侧面正交的方向(与芯片焊盘105远离的方向)上延伸，在半导体器件300中，第一端子203在相对于芯片焊盘105的侧面平行的方向延伸。因此，半导体器件300能够比半导体器件100小型化。
例如，在半导体器件100为7mm×9mm的大小的情况下，半导体器件300的大小成为7mm×6mm(在半导体器件100中，第一端子103和第二端子104突出到密封部件106的外部，但在半导体器件300中，第一端子203和第二端子204收容在密封部件106的内部)。
[实施方式4]
关于本发明的其它的实施方式，基于图7进行说明如下。此外，为了说明的方便，对于与在上述实施方式已说明的部件具有相同功能的部件，标注相同的符号，省略其说明。
(半导体器件400的结构)
这里，利用图7说明本实施方式的半导体器件400的结构。图7是半导体器件400的俯视图。此外，从侧面看半导体器件400的结构与图6所示的半导体器件300的结构相同。
如图7所示，半导体器件400是在上述实施方式的半导体器件300的结构中具有常截止型场效应晶体管202(以下，成为晶体管202)来代替常截止型场效应晶体管102。另外，在半导体器件400和半导体器件300之间，通过导电部件134布线的部件不同。半导体器件400的其它的结构与半导体器件300相同。另外，在半导体器件400中形成的电路与图3所示的半导体器件100的电路EC相同。
如图7所示，在晶体管202的上表面(第一主面S2)上设置有表面源极电极120a。另外，晶体管202中存在晶体管101的栅极电极111、晶体管102的源极电极120和芯片焊盘105的第二主面S6(源极端子ST)之间的分支点27(参照图3)。
(关于半导体器件400的电路EC)
根据半导体器件400的结构，与上述实施方式的半导体器件200的结构相同，寄生电感25依赖于从芯片焊盘105的第二主面S6到分支点27的芯片焊盘105的厚度和晶体管202的厚度。另外，寄生电感26在依赖从分支点27到芯片焊盘105的第一主面S3的芯片焊盘105的厚度的基础上，还依赖于晶体管202的第二主面S5与芯片焊盘105的连接部分的厚度。另外，根据半导体器件400的结构，与上述实施方式的半导体器件300的结构相同，导电部件133的长度较短。
因此，半导体器件400的寄生电感25和寄生电感26与半导体器件200的寄生电感25和寄生电感26同样地较小。另外，半导体器件400的寄生电感24与上述实施方式的半导体器件300的寄生电感24同样地较小。
如上所述，在半导体器件400中，由于寄生电感24、25、26较小，所以电路EC中产生的反电动势较小。因此，半导体器件400的电路EC能够稳定地工作。
[实施方式5]
关于本发明的其它的实施方式，基于图8进行说明如下。此外，为了说明的方便，对于与在上述实施方式已说明的部件具有相同功能的部件，标注相同的符号，省略其说明。
(电子设备500的结构)
以下，利用图8说明本实施方式的电子设备500的结构。图8是电子设备500的侧面图。电子设备500具备上述实施方式的半导体器件100和成品衬底501。电子设备500中，半导体器件100搭载在成品衬底501。此外，电子设备500具有半导体器件200、300或400代替半导体器件100。
如图8所示，在成品衬底501形成有半导体器件100的源极端子ST和同电位的配线层502。另外，在成品衬底501上，形成有与芯片焊盘105的第二主面S6(源极端子ST)连接的衬垫504，以及与第一端子103(漏极端子DT)连接的衬垫503。
成为对配置在晶体管102的第二主面S5上的源极电极120(参照图1、图2)施加的反电动势的原因的寄生电感25、26，依赖于从源极电极120到源极端子ST的距离、即芯片焊盘105的厚度。因为芯片焊盘105的厚度相对于在基准方向上的半导体器件100的长度充分小，所以依赖于这些厚度的寄生电感25、26较小。此外，电子设备500在具有半导体器件300代替半导体器件100的情况下，寄生电感25、26不仅依赖于芯片焊盘105的厚度，还依赖于常截止型场效应晶体管102的厚度。如上述实施方式中所说明的那样，即使是该结构的情况下，寄生电感25、26较小。
如上所述，由于半导体器件100的寄生电感25、26较小，所以半导体器件100的电路EC中产生的反电动势较小。因此，半导体电路100的电路EC能够稳定的工作。进而，能够提供故障较少的电子设备500。
[总结]
本发明的方式1的半导体器件(100、200、300、400)由多个场效应晶体管共源共栅连接而成，其包括：常截止型场效应晶体管(102)，其为上述多个场效应晶体管中的一个，具有形成有栅极电极(121)和漏极电极(122)的第一主面(S2)和形成有源极电极(120)的第二主面(S5)；和芯片焊盘(105)，其具有与上述常截止型场效应晶体管的第二主面接触的第一主面(S3)，且兼作该半导体器件的源极端子。
根据上述的结构，常截止型场效应晶体管的第二主面和芯片焊盘的第一主面接触。在常截止型场效应晶体管的第二主面形成有源极电极，芯片焊盘的第一主面兼作源极端子。因此，常截止型场效应晶体管的源极电极与源极端子经由具有导电性的芯片焊盘电连接。
通过该连接，上述常截止型场效应晶体管的源极电极中，只有仅被芯片焊盘的第一主面和第二主面夹着的部分的电感能够达到源极端子。因此，根据上述的结构，能够降低在共源共栅连接电路的工作中最重要的电感，提高电路的工作性能。更加详细地说明本发明的效果如下。
在晶体管的第二主面与芯片焊盘的连接部分产生的寄生电感，和在芯片焊盘的第一主面与第二主面之间产生的寄生电感，由上述连接部分的厚度和芯片焊盘的厚度决定。这里，寄生电感大致与电流流通的距离成比例。上述连接部分的厚度和芯片焊盘的厚度相对于基准方向上的半导体器件的长度均充分小，所以上述的寄生电感也变小。
这样，在晶体管的第二主面与芯片焊盘的连接部分产生的寄生电感，和在芯片焊盘的第一主面与第二主面之间产生的寄生电感小，因此由寄生电感导致的半导体器件的电路中产生的反电动势小。因此，半导体器件的电路能够稳定地工作。
此外，常截止型场效应晶体管的第二主面和芯片焊盘的第一主面可以经由芯片焊盘材料或者焊料等的粘接材料连接。
本发明的方式2的半导体器件(200、400)也可以构成为，在上述方式1中，还包括常导通型场效应晶体管(101)，其为上述多个场效应晶体管中的另一个，具有形成有源极电极(110)、栅极电极(111)和漏极电极(112)的第一主面(S1)，在上述常截止型场效应晶体管(102)中，不仅在上述第二主面(S5)形成有源极电极，在上述第一主面(S2)也形成有源极电极(表面源极电极120a)，在上述常截止型场效应晶体管的第一主面形成的源极电极与在上述常导通型场效应晶体管的第一主面形成的栅极电极由导电部件(134)连接。
根据上述的结构，能够缩短连接常截止型场效应晶体管的源极电极和常导通型场效应晶体管的栅极电极的导电部件的长度。其结果是，能够使依赖于导电部件的长度的寄生电感变小。原因是，寄生电感大致与电流流通的距离成比例。
本发明的方式3的半导体器件也可以构成为，在上述方式2中，上述常导通型场效应晶体管(101)具有比上述常截止型场效应晶体管(102、202)高的耐压。
根据上述的结构，即使在施加于常导通型场效应晶体管的栅极电极的反电动势比施加在常截止型场效应晶体管的源极电极的反电动势大的情况下，也能够提高常导通型场效应晶体管的导通－截止不反转的可能性。因此，半导体器件的电路能够更加稳定地工作。
本发明并不限定于上述的各实施方式，能够在技术方案所示的范围中进行各种变更，通过将不同的实施方式中分别公开的技术手段适当组合得到的实施方式也包括在本发明的技术范围内。并且，通过将各实施方式中分别公开的技术手段组合，能够形成新的技术特征。
产业上的利用可能性
本发明能够利用于半导体器件和具备半导体器件的电子设备。
符号说明
100、200、300、400半导体器件
100常导通型场效应晶体管
102、202常截止型场效应晶体管
103第一端子(漏极端子DT)
104第二端子(栅极端子GT)
S6第二主面(第三端子；源极端子ST)
134导电部件

Claims (3)

1.一种半导体器件，其由多个场效应晶体管共源共栅连接而成，其特征在于，包括：
常截止型场效应晶体管，其为所述多个场效应晶体管中的一个，具有形成有栅极电极和漏极电极的第一主面和形成有源极电极的第二主面；和
芯片焊盘，其具有与所述常截止型场效应晶体管的第二主面接触的第一主面，且兼作该半导体器件的源极端子。
2.如权利要求1所述的半导体器件，其特征在于：
还包括常导通型场效应晶体管，其为所述多个场效应晶体管中的另一个，具有形成有源极电极、栅极电极和漏极电极的第一主面，
在所述常截止型场效应晶体管中，不仅在所述第二主面形成有源极电极，在所述第一主面也形成有源极电极，
在所述常截止型场效应晶体管的第一主面形成的源极电极与在所述常导通型场效应晶体管的第一主面形成的栅极电极由导电部件连接。
3.如权利要求2所述的半导体器件，其特征在于：
所述常导通型场效应晶体管具有比所述常截止型场效应晶体管高的耐压。
CN201480023909.7A 2013-05-28 2014-02-28 半导体器件 Pending CN105144379A (zh)

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