CN104967430A - RS trigger of GaN-based low leakage current clamped beam switch NOR gate - Google Patents
RS trigger of GaN-based low leakage current clamped beam switch NOR gate Download PDFInfo
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- CN104967430A CN104967430A CN201510378790.1A CN201510378790A CN104967430A CN 104967430 A CN104967430 A CN 104967430A CN 201510378790 A CN201510378790 A CN 201510378790A CN 104967430 A CN104967430 A CN 104967430A
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 7
- 239000002184 metal Substances 0.000 claims abstract description 7
- CHPZKNULDCNCBW-UHFFFAOYSA-N gallium nitrate Chemical compound [Ga+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O CHPZKNULDCNCBW-UHFFFAOYSA-N 0.000 claims description 34
- 229940044658 gallium nitrate Drugs 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 16
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 13
- 229910052719 titanium Inorganic materials 0.000 claims description 13
- 239000010931 gold Substances 0.000 claims description 11
- 229910052737 gold Inorganic materials 0.000 claims description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 10
- 229910002601 GaN Inorganic materials 0.000 claims description 8
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 5
- 238000013461 design Methods 0.000 claims description 3
- 238000007667 floating Methods 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 230000005669 field effect Effects 0.000 abstract description 2
- 229910044991 metal oxide Inorganic materials 0.000 abstract 1
- 150000004706 metal oxides Chemical class 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 description 15
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 10
- 238000001259 photo etching Methods 0.000 description 7
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000010276 construction Methods 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- MBGCACIOPCILDG-UHFFFAOYSA-N [Ni].[Ge].[Au] Chemical compound [Ni].[Ge].[Au] MBGCACIOPCILDG-UHFFFAOYSA-N 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000013021 overheating Methods 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Abstract
The invention relates to an RS trigger of a GaN-based low leakage current clamped beam switch MESFET (metal semiconductor field effect transistor) NOR gate, which is composed of a first NOR gate (G1) and a second NOR gate (G2) formed by a first clamped beam gate NMOS (N-channel metal oxide semiconductor) transistor (1), a second clamped beam gate NMOS transistor (2), a third clamped beam gate NMOS transistor (3) and a fourth clamped beam gate NMOS transistor (4), wherein each clamped beam gate NMOS transistor is composed for a grid electrode (8), a source electrode and a drain electrode. When voltage loaded between a clamped beam switch and a pull-down electrode is greater than threshold voltage of an MESFET, the clamped beam switch is pulled down and attached to the grid electrode, the thickness of a depletion region of the N-type MESFET is reduced, the N-type MESFET is conducted, and NOR logic of input signals is realized on the basis; and when the voltage loaded between the clamped beam switch and the pull-down electrode is less than the threshold voltage of the MESFET, the clamped beam switch cannot be pulled down, and voltage does not exist on the grid electrode, so that the N-type MESFET cannot be conducted, leakage current of the grid electrode does not exist, and the power consumption of the RS trigger is reduced.
Description
Technical field
The present invention proposes the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET (metal-semiconductor field effect transistor) NOR gate, belong to the technical field of microelectromechanical systems.
Background technology
The development of wireless communication technology nearly ten years, especially the appearance of smart mobile phone, the whole world has attacked the tide that mobile terminal device upgrades fast, meanwhile as the indispensable important component part of this kind equipment, the chip of radio frequency integrated circuit also develops rapidly, integrated scale constantly expands, and operating frequency improves constantly, and traditional silica-base material can not meet the demands.MESFET based on gallium nitride substrate is suggested application under this background, because the characteristic that gallium nitride material is good makes the transistor manufactured by it have very high electron mobility, very strong capability of resistance to radiation, larger operating temperature range.Because the quantity of transistor in chip gets more and more, the thing followed is exactly the power problems of integrated circuit, and too high power consumption can make chip overheating, the operating characteristic of transistor can be subject to the impact of temperature and change, so overheated chip temperature not only can make chip service life reduction, and the stability of chip can be affected.
Rest-set flip-flop circuit is as the important component part of digital circuit, it is the various basic comprising parts with the flip-flop circuit of sophisticated functions, basic due to rest-set flip-flop circuit, huge application is had in the digital circuits such as central processing unit, so just seem very important to the power consumption of rest-set flip-flop circuit and the control of temperature, the rest-set flip-flop be made up of conventional MESFET, along with the lifting of integrated level, power consumption becomes more and more serious, the excessive chip overheating problem brought of power consumption can have a strong impact on the performance of integrated circuit, the development of MEMS technology makes to manufacture the MESFET with movable clamped beam construction of switch becomes possibility, the MESFET with movable clamped beam construction of switch effectively can reduce grid leakage current, and then reduce the power consumption of rest-set flip-flop circuit.
Summary of the invention
Technical problem: the rest-set flip-flop that the object of this invention is to provide a kind of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate, adopt in rest-set flip-flop two OR-NOT circuit be made up of traditional MESFET are changed to two OR-NOT circuit be made up of the MESFET by clamped beam construction of switch, when this rest-set flip-flop is in running order, effectively can reduce the grid leakage current of transistor, thus reduce the power consumption of rest-set flip-flop.
Technical scheme: the rest-set flip-flop of a kind of gallium nitrate based low-leakage current clamped beam switch NOR gate of the present invention is by the first clamped beam grid NMOS tube, second clamped beam grid NMOS tube, 3rd clamped beam grid NMOS tube, first NOR gate of the 4th clamped beam grid NMOS tube composition, second NOR gate, each clamped beam grid NMOS tube is respectively by grid, source electrode and drain electrode are formed, wherein source electrode and drain electrode form ohmic contact by metal and heavy doping N district and form, grid forms Schottky contacts by metal and channel region and forms, four clamped beam grid NMOS tube of this rest-set flip-flop are produced on gallium nitride substrate, clamped beam switch is left floating above grid, the two ends of clamped beam switch are separately fixed in Liang Gemao district, the digital signal of input is carried on clamped beam switch, this clamped beam switch is made up of titanium/gold/titanium, pull-down electrode is there is between clamped beam switch and substrate, pull-down electrode is covered by silicon nitride material, wherein the output of the first NOR gate is connected with an input of the second NOR gate by wire, and the output of same second NOR gate is also connected with an input of the first NOR gate by wire, forms the structure of full symmetric, this rest-set flip-flop has two inputs to be SD and RD respectively, and two output Q and Q', SD with RD are that input be not connected with output in two NOR gate respectively, Q and Q' then remains and be directly made up of the output of two NOR gate.
The source electrode forming two clamped beam grid NMOS tube of each NOR gate in this rest-set flip-flop links together common ground, the clamped beam switch 7 of two clamped beam grid NMOS tube is all the input of digital signal, the drain electrode of two clamped beam grid NMOS tube is linked together and to be connected with supply voltage by same resistance, digital signal inputs on the clamped beam switch of two clamped beam grid NMOS tube, exports between the drain electrode and its common load resistance 5 of two MESFET.
The resistance of described resistance is set to: when wherein any one clamped beam grid NMOS tube conducting, compared to the clamped beam grid NMOS tube of conducting, the resistance of this resistance can make enough greatly to export for low level, when two clamped beam grid NMOS tube all can not conducting time, compared to the clamped beam grid NMOS tube of cut-off, the enough I of resistance of this resistance make to export as high level.
Described clamped beam switch is suspended on its grid, Schottky contacts is defined between grid and substrate, depletion layer is formed in substrate square under the gate, this clamped beam switch actuation voltage design equal with the threshold voltage of clamped beam grid NMOS tube, when being carried in the voltage between clamped beam switch and pull-down electrode and being greater than the threshold voltage of clamped beam grid NMOS tube, clamped beam switch is drop-down to be close to grid, and the depletion region thickness of clamped beam grid NMOS tube reduces and conducting; When between clamped beam switch and pull-down electrode, institute's making alive is less than the threshold voltage of clamped beam grid NMOS tube, clamped beam switch just can not be drop-down, just there is not voltage in its grid, so this clamped beam grid NMOS tube just can not conducting, grid leakage current would not exist, and this reduces the power consumption of rest-set flip-flop.
Beneficial effect: the clamped beam switch of the clamped beam switch MESFET in the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate of the present invention is drop-down when contacting with N-type MESFET grid, grid just has voltage to exist, when clamped beam switch is in suspended state, can not effectively conducting, therefore clamped beam switch MESFET can effectively reduce grid leakage current, reduces the power consumption of circuit; And gallium nitrate based MESFET has high electron mobility, the normal requirements of one's work of circuit under high-frequency digital signal can be met.
Accompanying drawing explanation
Fig. 1 is the vertical view of the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate.
Fig. 2 is that the A-A' of the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate is to profile.
Fig. 3 be the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate B-B' to profile.
Fig. 4 is the schematic diagram of the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate.
Figure comprises: the first clamped beam grid NMOS tube 1, second clamped beam grid NMOS tube the 2, the 3rd clamped beam grid NMOS tube the 3, the 4th clamped beam grid NMOS tube 4, resistance 5, lead-in wire 6, clamped beam switch 7, grid 8, anchor district 9, N trap 10, N-type active area 11, pull-down electrode 12, gallium nitride substrate 13, first NOR gate G1, the second NOR gate G2.
Embodiment
The first NOR gate G1 that the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate of the present invention is made up of clamped beam switch N-type MESFET (clamped beam grid NMOS tube) by two, second NOR gate G2 (i.e. the first clamped beam grid NMOS tube 1, second clamped beam grid NMOS tube 2, 3rd clamped beam grid NMOS tube 3, 4th clamped beam grid NMOS tube 4), MESFET is by grid 8, source electrode and drain electrode are formed, wherein source electrode and drain electrode form ohmic contact by metal and heavy doping N district and form, grid 8 forms Schottky contacts by metal and channel region and forms, four N-type MESFET of this trigger are produced on gallium nitride substrate 13, clamped beam switch 7 is left floating above the grid 8 of MESFET, the digital signal of input is carried on clamped beam switch 7, this clamped beam switch 7 is made up of titanium/gold/titanium, pull-down electrode 12 is there is between clamped beam switch 7 and substrate 13, pull-down electrode 12 is covered by silicon nitride material.
The source electrode forming two MESFET of the NOR gate of this rest-set flip-flop links together common ground, the clamped beam switch 7 of two MESFET is all the input of digital signal, the drain electrode of two MESFET links together and then connects with same resistance 5, the resistance of resistance 5 is set to when wherein any one MESFET conducting, compared to the MESFET of conducting, the resistance of this resistance 5 can make enough greatly to export for low level, when two MESFET all can not conducting time, compared to the MESFET of cut-off, the enough I of resistance of this resistance 5 make to export as high level.Resistance 5 connects with supply voltage, and digital signal inputs on the clamped beam switch 7 of two MESFET, exports between the drain electrode and its common load resistance 5 of two MESFET.
This rest-set flip-flop is made up of two identical NOR gate, wherein the output of the first NOR gate G1 is connected with an input of the second NOR gate G2 by wire, the output of same second NOR gate G2 is also connected with an input of the first NOR gate G1 by wire, forms the structure of full symmetric.Rest-set flip-flop has two inputs to be SD and RD respectively, and two output Q and Q', SD with RD are the respective input that two NOR gate are not connected with output respectively, Q and Q' is directly formed by the output of two NOR gate.
When this rest-set flip-flop is in operating conditions, definition Q=1, Q'=0 are 1 state of trigger, and definition Q=0, Q'=1 are 0 state of trigger, and SD is called set end, and RD is called reset terminal.As SD=1, RD=0, Q=1, Q'=0, after SD=1 blackout, the high level held owing to there being Q takes back another input of G2, and thus 1 state of circuit is kept; As SD=0, RD=1, Q=0, Q'=1, after RD=1 blackout, 0 state of circuit remains unchanged; As SD=RD=0, it is constant that circuit maintains original state; As SD=RD=1, Q=Q'=0, this is neither 1 state of definition, 0 state that neither define, and still cannot judge which state trigger will get back to after SD and RD gets back to 0 simultaneously, therefore, when normal work, input signal should observe the constraints of SDRD=0, and so the signal of SD=RD=1 will not allow input.And the clamped beam switch N-type MESFET in this rest-set flip-flop along with input signal its state of change also conducting and turn off between change, when clamped beam switch MESFET is in OFF state, its clamped beam switch is just in suspended state, this just means that the MESFET in this rest-set flip-flop does not this moment exist grid leakage current, this reduces the quiescent dissipation of rest-set flip-flop.Because the new state Q* (also referred to as next state) of rest-set flip-flop is not only relevant with input state, and the state Q original with rest-set flip-flop (also referred to as initial state) is relevant, so Q can be listed in truth table as a variable, the truth table of the rest-set flip-flop so obtained is as follows:
| SD | RD | Q | Q* |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 |
The preparation method of the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate comprises following step:
1) semi-insulating type gallium nitride substrate 13 is prepared;
2) deposit one deck silicon nitride, photoetching etch silicon nitride, remove the silicon nitride of N-type MESFET channel region;
3) N-type MESFET Channeling implantation, injects phosphorus, anneals in a nitrogen environment; After having annealed, at high temperature carry out dopant redistribution, form the channel region of N-type MESFET;
4) silicon nitride layer is removed: adopt dry etching technology all to be removed by silicon nitride;
5) photoetched grid 8, removes the photoresist in grid region;
6) electron beam evaporation titanium/platinum/gold;
7) titanium/platinum/gold on remaining photoresist and photoresist is removed;
8) heat, make titanium/platinum/billon and N-type MESFET raceway groove form Schottky contacts;
9) photoresist is applied, photoetching the photoresist of etching N type MESFET source electrode and drain region;
10) N-type light dope is carried out to this region, in the N-type light dope active area 11 that N-type MESFET source electrode and drain region are formed, carry out short annealing process;
11) photoetching source electrode and drain electrode, removes the photoresist of source electrode and drain electrode;
12) vacuum evaporation gold germanium nickel/gold;
13) gold germanium nickel/gold on photoresist and photoresist is removed;
14) alloying forms ohmic contact, forms source electrode and drain electrode;
15) apply photoresist, remove the photoresist of the position, anchor district 9 of power line, ground wire, lead-in wire 6, pull-down electrode 12 and clamped beam switch;
16) evaporate ground floor gold, its thickness is about 0.3 μm;
17) remove the gold on photoresist and photoresist, form the anchor district 9 of power line, ground wire, lead-in wire 6, pull-down electrode 12 and clamped beam switch;
18) deposit one deck
thick silicon nitride;
19) photoetching etch nitride silicon dielectric layer, is retained in the silicon nitride in pull-down electrode 12;
20) deposit photoetching polyimide sacrificial layer: apply 1.6 μm of thick polyimide sacrificial layer on gallium nitride substrate 13, require to fill up pit; Photoetching polyimide sacrificial layer, only retains the sacrifice layer below clamped beam switch;
21) evaporate titanium/gold/titanium, its thickness is 500/1500/
22) photoetching: remove and will electroplate local photoresist;
23) electrogilding, its thickness is 2 μm;
24) photoresist is removed: remove and do not need to electroplate local photoresist;
25) anti-carve titanium/gold/titanium, corrosion down payment, forms clamped beam switch 7;
26) discharge polyimide sacrificial layer: developer solution soaks, remove the polyimide sacrificial layer under clamped beam switch 7, deionized water soaks slightly, and absolute ethyl alcohol dewaters, and volatilizees, dry under normal temperature.
Difference with the prior art of the present invention is
The clamped beam switch of the N-type clamped beam switch MESFET that the rest-set flip-flop in the present invention uses is suspended on its grid, Schottky contacts is defined between the grid of N-type MESFET and substrate, depletion layer is formed in substrate square under the gate, the actuation voltage of the clamped beam switch of this N-type MESFET designs equal with the threshold voltage of MESFET, when being carried in the voltage between clamped beam switch and pull-down electrode and being greater than the threshold voltage of MESFET, clamped beam switch is drop-down to be close to grid, the depletion region thickness of N-type MESFET reduces and conducting, realize the NOR-logic to input signal on this basis, when between clamped beam switch and pull-down electrode, institute's making alive is less than the threshold voltage of MESFET, clamped beam switch just can not be drop-down, and its grid does not just exist voltage, so this N-type MESFET just can not conducting, so grid leakage current would not exist, and this reduces the power consumption of rest-set flip-flop.
Namely the structure meeting above condition can be considered as the rest-set flip-flop of the gallium nitrate based low-leakage current clamped beam switch MESFET NOR gate in the present invention.
Claims (4)
1. the rest-set flip-flop of a gallium nitrate based low-leakage current clamped beam switch NOR gate, it is characterized in that this rest-set flip-flop is by the first clamped beam grid NMOS tube (1), second clamped beam grid NMOS tube (2), 3rd clamped beam grid NMOS tube (3), the first NOR gate (G1) that 4th clamped beam grid NMOS tube (4) forms, second NOR gate (G2), each clamped beam grid NMOS tube is respectively by grid (8), source electrode and drain electrode are formed, wherein source electrode and drain electrode form ohmic contact by metal and heavy doping N district and form, grid forms Schottky contacts by metal and channel region and forms, four clamped beam grid NMOS tube of this rest-set flip-flop are produced on gallium nitride substrate (13), clamped beam switch (7) is left floating in grid (8) top, the two ends of clamped beam switch (7) are separately fixed in Liang Gemao district (9), the digital signal of input is carried on clamped beam switch (7), this clamped beam switch (7) is made up of titanium/gold/titanium, pull-down electrode (12) is there is between clamped beam switch (7) and substrate (13), pull-down electrode (12) is covered by silicon nitride material, wherein the output of the first NOR gate (G1) is connected with an input of the second NOR gate (G2) by wire, the output of same second NOR gate (G2) is also connected with an input of the first NOR gate (G1) by wire, forms the structure of full symmetric, this rest-set flip-flop has two inputs to be SD and RD respectively, and two output Q and Q
', SD with RD is that input be not connected with output in two NOR gate respectively, Q and Q
'then remain and be directly made up of the output of two NOR gate.
2. the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch NOR gate according to claim 1, it is characterized in that the source electrode of two the clamped beam grid NMOS tube forming each NOR gate in this rest-set flip-flop links together common ground, the clamped beam switch (7) of two clamped beam grid NMOS tube is all the input of digital signal, the drain electrode of two clamped beam grid NMOS tube is linked together and to be connected with supply voltage by same resistance (5), digital signal is in the upper input of the clamped beam switch (7) of two clamped beam grid NMOS tube, export between the drain electrode and its common load resistance (5) of two MESFET.
3. the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch NOR gate according to claim 2, it is characterized in that the resistance of described resistance (5) is set to: when wherein any one clamped beam grid NMOS tube conducting, compared to the clamped beam grid NMOS tube of conducting, the resistance of this resistance (5) can make enough greatly to export for low level, when two clamped beam grid NMOS tube all can not conducting time, compared to the clamped beam grid NMOS tube of cut-off, the enough I of resistance of this resistance (5) make to export as high level.
4. the rest-set flip-flop of gallium nitrate based low-leakage current clamped beam switch NOR gate according to claim 1, it is characterized in that described clamped beam switch (7) is suspended on its grid (8), Schottky contacts is defined between grid (8) and substrate (13), depletion layer is formed in the substrate (13) of grid (8) below, this clamped beam switch (7) actuation voltage design equal with the threshold voltage of clamped beam grid NMOS tube, when being carried in the voltage between clamped beam switch (7) and pull-down electrode (12) and being greater than the threshold voltage of clamped beam grid NMOS tube, clamped beam switch (7) is drop-down to be close to grid (8), the depletion region thickness of clamped beam grid NMOS tube reduces and conducting, when between clamped beam switch (7) and pull-down electrode (12), institute's making alive is less than the threshold voltage of clamped beam grid NMOS tube, clamped beam switch (7) just can not be drop-down, its grid (8) is upper does not just exist voltage, so this clamped beam grid NMOS tube just can not conducting, grid leakage current would not exist, and this reduces the power consumption of rest-set flip-flop.
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|---|---|---|---|
| CN201510378790.1A CN104967430B (en) | 2015-07-01 | 2015-07-01 | Gallium nitride base low-leakage current clamped beam switchs the rest-set flip-flop of nor gate |
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| CN201510378790.1A CN104967430B (en) | 2015-07-01 | 2015-07-01 | Gallium nitride base low-leakage current clamped beam switchs the rest-set flip-flop of nor gate |
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| CN113497137A (en) * | 2020-04-07 | 2021-10-12 | 苏州捷芯威半导体有限公司 | Semiconductor device and preparation method thereof |
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| CN113497137A (en) * | 2020-04-07 | 2021-10-12 | 苏州捷芯威半导体有限公司 | Semiconductor device and preparation method thereof |
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