CN104656324A - 阵列基板及其制作方法以及显示装置 - Google Patents
阵列基板及其制作方法以及显示装置 Download PDFInfo
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Abstract
本发明涉及一种阵列基板及其制作方法以及显示装置,上述阵列基板包括:多条栅线和多条数据线,多条栅线和多条数据线限定多个像素区域,阵列基板还包括:设置于栅线区域的屏蔽电极、设置于像素区域的公共电极和像素电极,屏蔽电极与公共电极同层设置且相绝缘。通过本发明的技术方案,当栅线中的电信号对屏蔽电极造成影响时,由于屏蔽电极与公共电极绝缘,屏蔽电极中的电信号变化不会对公共电极造成影响,使得显示面板上不同位置的公共电极延迟相同,避免了显示面板MURA缺陷的发生。
Description
技术领域
本发明涉及显示技术领域,具体而言,涉及一种阵列基板、一种一种显示装置和一种阵列基板制作方法。
背景技术
现有的栅线屏蔽ADS(高级超维场转换技术)显示面板的结构,对栅线起3屏蔽作用的屏蔽电极1与像素区域的公共电极2相连,等效电路图如图1所示(屏蔽电极1和公共电极2等同于一条导线),而由于2屏蔽电极1位于栅线区域会受到栅线3信号的影响,进而屏蔽电极1会影响像素区域的公共电极2,受到影响的公共电极2会产生公共电极延迟,延迟在面板的不同位置会存在差异,例如图2所示。而在一个面板中,公共电极2延迟的差异会产生MURA(显示器工作时,像素矩阵表面可见的显示不完美)缺陷。
发明内容
本发明所要解决的技术问题是,当栅线区域对栅线起屏蔽作用的屏蔽电极在受到栅线传输信号影响时,不会对像素区域的公共电极造成影响。
为此目的,本发明提出了一种阵列基板,包括:
多条栅线和多条数据线,所述多条栅线和多条数据线限定多个像素区域,所述阵列基板还包括:
设置于栅线区域的屏蔽电极、设置于像素区域的公共电极和像素电极,所述屏蔽电极与所述公共电极同层设置且相绝缘。
优选地,若所述像素电极位于所述公共电极下方,所述像素电极为板状电极,所述公共电极为条状电极,
若所述公共电极位于所述像素电极下方,所述公共电极为板状电极,所述像素电极为条状电极。
优选地,还包括:
第一信号线,用于为所述屏蔽电极供电;
第二信号线,用于为所述公共电极供电,
其中,所述第一信号线和所述第二信号线电隔离。
优选地,还包括:
栅绝缘层,设置于所述栅线之上,
其中,所述屏蔽电极设置于所述栅绝缘层之上与所述栅线相对应的区域。
优选地,所述屏蔽电极的宽度大于或等于所述栅线的宽度。
优选地,所述屏蔽电极与所述公共电极的材料相同。
优选地,所述屏蔽电极与所述公共电极通过同一道工艺形成。
本发明还提出了一种显示装置,包括上述任一项所述的阵列基板。
本发明还提出了一种阵列基板制作方法,包括:
形成多条栅线和多条数据线,以使所述多条栅线和多条数据线限定多个像素区域;
形成像素区域的像素电极和公共电极;
在所述栅线所处区域与所述公共电极同层形成屏蔽电极,使所述屏蔽电极与所述公共电极相绝缘。
优选地,当形成的所述像素电极位于所述公共电极下方时,所述像素电极为板状电极,所述公共电极为条状电极,
当形成的所述公共电极位于所述像素电极下方时,所述公共电极为板状电极,所述像素电极为条状电极。
优选地,还包括:
形成电隔离第一信号线和第二信号线,使所述第一信号线为所述屏蔽电极供电,使所述第二信号线为所述公共电极供电。
优选地,还包括:
在所述栅线之上形成栅绝缘层,
则所述形成屏蔽电极包括:
在所述栅绝缘层之上与所述栅线相对应的区域形成所述屏蔽电极。
优选地,所述屏蔽电极的宽度大于或等于所述栅线的宽度。
优选地,所述屏蔽电极与所述公共电极的材料相同。
优选地,在形成所述公共电极的同时,形成所述屏蔽电极。
通过上述技术方案,当栅线中的电信号对屏蔽电极造成影响时,由于屏蔽电极与公共电极绝缘,屏蔽电极中的电信号变化不会对公共电极造成影响,使得显示面板上不同位置的公共电极延迟相同,避免了显示面板MURA缺陷的发生。
附图说明
通过参考附图会更加清楚的理解本发明的特征和优点,附图是示意性的而不应理解为对本发明进行任何限制,在附图中:
图1示出了现有技术中屏蔽栅线的电极与像素的公共电极相连的等效电路图;
图2示出了现有技术中面板上公共电极延迟差异分布示意图;
图3示出了根据本发明一个实施例的阵列基板的结构示意图;
图4示出了根据本发明一个实施例的屏蔽栅线的电极与像素的公共电极相绝缘的等效电路;
图5示出了根据本发明一个实施例的阵列基板制作方法的示意流程图。
附图标号说明:
1-屏蔽电极;2-公共电极;3-栅线;4-数据线。
具体实施方式
为了能够更清楚地理解本发明的上述目的、特征和优点,下面结合附图和具体实施方式对本发明进行进一步的详细描述。需要说明的是,在不冲突的情况下,本申请的实施例及实施例中的特征可以相互组合。
在下面的描述中阐述了很多具体细节以便于充分理解本发明,但是,本发明还可以采用其他不同于在此描述的其他方式来实施,因此,本发明的保护范围并不受下面公开的具体实施例的限制。
如图3和图4所示,根据本发明一个实施例的阵列基板,包括:
多条栅线3和多条数据线4,多条栅线3和多条数据线4限定多个像素区域,阵列基板还包括:
设置于栅线区域的屏蔽电极1、设置于像素区域的公共电极2和像素电极,屏蔽电极1与公共电极2同层设置且相绝缘。
设置在栅线区域的屏蔽电极1可以屏蔽栅线3中流过电流时产生的电场对其他布线的影响。
当栅线3中的电信号对屏蔽电极1造成影响时,由于屏蔽电极1与公共电极2绝缘,屏蔽电极1中的电信号变化不会对公共电极2造成影响,使得显示面板上不同位置的公共电极延迟相同,每个像素区域的公共电极均可以从0V的基准电压开始充电,避免了显示面板MURA缺陷的发生。
需要说明的是,在本发明提出的阵列基板中还存在数据线4以及源极、漏极和有源层等结构,只是在图3中并没有全部标明,在此不再赘述。
一般地,若像素电极位于公共电极2下方,像素电极为板状电极,公共电极2为条状电极,
若公共电极2位于像素电极下方,公共电极2为板状电极,像素电极为条状电极。
通过将位于下部的像素电极设置为板状,将位于上部的公共电极设置为条状,或将位于下部的公共电极设置为板状,将位于上部的公共电极设置条状,可以保证阵列基板为ADS基板,即基于高级超维场转换技术(Advanced Super Dimension Switch)的基板。
由于基板中位于下部的像素电极或公共电极2为板状电极,而位于上部的公共电极2或像素电极为条状,使得像素电极与公共电极之间夹持的液晶分子呈水平排布方式,当外界施加压力时,液晶分子结构向下稍微下陷,但整体仍呈水平状,而现有技术中的软屏液晶分子则呈垂直排列状,当受到外界压力时下陷严重,会呈现“八”字型,且回复时间慢。本申请的基板中的液晶回复速度是软屏的10倍,即基板在遇到外力时,其中液晶分子结构坚固性和稳定性远远优于软屏,基本保持不变,在实物上则表现为按压无水波纹,无屏闪,画质更清晰,更稳定。
并且本申请中的基板相比其他液晶面板(例如TN面板),上下/左右可视角度均达到178°;且色彩表现力更高,由于采用了摒弃导致亮度和色彩度降低的金属电极,采用最新高科技ITO透明电极技术,其能够增加开口率和亮度,从而较其他液晶屏(例如IPS面板),具备更高的光透过率和色彩度;另外本申请中的基板还可以采用多维场转换技术,以具备更高的液晶分子响应速度,避免拖尾和重影现象,可以更好的表现运动画面。
一般地,还包括:
第一信号线,用于为屏蔽电极1供电;
第二信号线,用于为公共电极2供电,
其中,第一信号线和第二信号线电隔离。
通过电隔离的第一信号线和第二信号线分别为屏蔽电极1和公共电极2供电,可以分别为屏蔽电极1和公共电极2提供不同或相同的电信号(具体情况可以根据需要进行设置),从而保证屏蔽电极1对栅线中的电信号起到更好的屏蔽作用,以及使得公共电极2能够更好地与像素电极驱动晶体管。
一般地,栅绝缘层,设置于栅线3之上,其中,屏蔽电极1设置于栅绝缘层之上与栅线3相对应的区域。
将屏蔽电极1设置于栅绝缘层之上与栅线3相对应的区域,可以使得屏蔽电极1更好地对栅线3的电信号进行隔离。
一般地,屏蔽电极1的宽度大于或等于栅线3的宽度。可以保证屏蔽电极1完全遮蔽栅线3,使得屏蔽电极3具有较小电阻的同时,对栅线3起到更好的遮蔽和抗干扰效果。
一般地,屏蔽电极1与公共电极2的材料相同。
公共电极2的材料透过率较高,因此采用该材料制作屏蔽电极1可以保证屏蔽电极1也具有较高的透过率,提高阵列基板整体的透过率。
一般地,屏蔽电极1与公共电极2通过同一道工艺形成。可以减少形成阵列基板的工艺次数,从而简化阵列基板的制作流程,并且无需改变阵列基板中原有的布线方式。
本发明还提出了一种显示装置,包括上述任一项的阵列基板。
需要说明的是,本实施例中的显示装置可以为:电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本发明还提出了一种阵列基板制作方法,包括:
S1,形成多条栅线3和多条数据线4,以使多条栅线3和多条数据线4限定多个像素区域;
S2,形成像素区域的像素电极和公共电极2;
S3,在栅线3所处区域与公共电极2同层形成屏蔽电极1,使屏蔽电极1与公共电极2相绝缘。
一般地,当形成的像素电极位于公共电极下方时,像素电极为板状电极,公共电极为条状电极,
当形成的公共电极位于像素电极下方时,公共电极为板状电极,像素电极为条状电极。
一般地,还包括:
形成电隔离第一信号线和第二信号线,使第一信号线为屏蔽电极1供电,使第二信号线为公共电极2供电。
第一信号线和第二信号线可以是在同一次工艺中形成的,也可以是在不同次工艺中形成的,并且形成第一信号线和第二信号线的操作可以在形成公共电极2之前或之后进行,依具体工艺需要而定。
一般地,还包括:
在栅线3之上形成栅绝缘层,
则形成屏蔽电极1的过程(S3)具体包括:
在栅绝缘层之上与栅线3相对应的区域形成屏蔽电极1。
一般地,屏蔽电极1的宽度大于或等于栅线3的宽度。
一般地,屏蔽电极1与公共电极2的材料相同。
一般地,在形成公共电极2的同时,形成屏蔽电极1。
其中,上述流程所采用的形成工艺例如可包括:沉积、溅射等成膜工艺和刻蚀等构图工艺。
以上结合附图详细说明了本发明的技术方案,考虑到现有技术中,对栅线起屏蔽作用的屏蔽电极与像素区域的公共电极相连,由于屏蔽电极位于栅线区域会受到栅线信号的影响,进而屏蔽电极会影响像素区域的公共电极。通过本申请的技术方案,当栅线中的电信号对屏蔽电极造成影响时,由于屏蔽电极与公共电极绝缘,屏蔽电极中的电信号变化不会对公共电极造成影响,使得显示面板上不同位置的公共电极延迟相同,避免了显示面板MURA缺陷的发生。
需要指出的是,在附图中,为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解,当元件或层被称为在另一元件或层“上”时,它可以直接在其他元件上,或者可以存在中间的层。另外,可以理解,当元件或层被称为在另一元件或层“下”时,它可以直接在其他元件下,或者可以存在一个以上的中间的层或元件。另外,还可以理解,当层或元件被称为在两层或两个元件“之间”时,它可以为两层或两个元件之间惟一的层,或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。
在本发明中,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上,除非另有明确的限定。
以上所述仅为本发明的优选实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (15)
1.一种阵列基板,其特征在于,包括:
多条栅线和多条数据线,所述多条栅线和多条数据线限定多个像素区域,所述阵列基板还包括:
设置于栅线区域的屏蔽电极、设置于像素区域的公共电极和像素电极,所述屏蔽电极与所述公共电极同层设置且相绝缘。
2.根据权利要求1所述的阵列基板,其特征在于,
若所述像素电极位于所述公共电极下方,则所述像素电极为板状电极,所述公共电极为条状电极,
若所述公共电极位于所述像素电极下方,则所述公共电极为板状电极,所述像素电极为条状电极。
3.根据权利要求1所述的阵列基板,其特征在于,还包括:
第一信号线,用于为所述屏蔽电极供电;
第二信号线,用于为所述公共电极供电,
其中,所述第一信号线和所述第二信号线电隔离。
4.根据权利要求1所述的阵列基板,其特征在于,还包括:
栅绝缘层,设置于所述栅线之上,
其中,所述屏蔽电极设置于所述栅绝缘层之上与所述栅线相对应的区域。
5.根据权利要求4所述的阵列基板,其特征在于,所述屏蔽电极的宽度大于或等于所述栅线的宽度。
6.根据权利要求1所述的阵列基板,其特征在于,所述屏蔽电极与所述公共电极的材料相同。
7.根据权利要求6所述的阵列基板,其特征在于,所述屏蔽电极与所述公共电极通过同一道工艺形成。
8.一种显示装置,其特征在于,包括权利要求1至7中任一项所述的阵列基板。
9.一种阵列基板制作方法,其特征在于,包括:
形成多条栅线和多条数据线,以使所述多条栅线和多条数据线限定多个像素区域;
形成像素区域的像素电极和公共电极;
在所述栅线所处区域与所述公共电极同层形成屏蔽电极,使所述屏蔽电极与所述公共电极相绝缘。
10.根据权利要求9所述的阵列基板制作方法,其特征在于,
当形成的所述像素电极位于所述公共电极下方时,所述像素电极为板状电极,所述公共电极为条状电极,
当形成的所述公共电极位于所述像素电极下方时,所述公共电极为板状电极,所述像素电极为条状电极。
11.根据权利要求9所述的阵列基板制作方法,其特征在于,还包括:
形成电隔离第一信号线和第二信号线,使所述第一信号线为所述屏蔽电极供电,使所述第二信号线为所述公共电极供电。
12.根据权利要求9所述的阵列基板制作方法,其特征在于,还包括:
在所述栅线之上形成栅绝缘层,
则所述形成屏蔽电极包括:
在所述栅绝缘层之上与所述栅线相对应的区域形成所述屏蔽电极。
13.根据权利要求12所述的阵列基板制作方法,其特征在于,所述屏蔽电极的宽度大于或等于所述栅线的宽度。
14.根据权利要求9所述的阵列基板制作方法,其特征在于,所述屏蔽电极与所述公共电极的材料相同。
15.根据权利要求14所述的阵列基板制作方法,其特征在于,在形成所述公共电极的同时,形成所述屏蔽电极。
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