CN104242875B - Single turn of double dutycycle conditioned circuit - Google Patents

Single turn of double dutycycle conditioned circuit Download PDF

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Publication number
CN104242875B
CN104242875B CN201310243739.0A CN201310243739A CN104242875B CN 104242875 B CN104242875 B CN 104242875B CN 201310243739 A CN201310243739 A CN 201310243739A CN 104242875 B CN104242875 B CN 104242875B
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differential pair
pair tube
resistance
drain electrode
dutycycle
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CN104242875A (en
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陶健
邵志刚
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CHENGDU CORPRO TECHNOLOGY Co Ltd
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CHENGDU CORPRO TECHNOLOGY Co Ltd
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Abstract

The present invention relates to single turn of double dutycycle conditioned circuit, it includes the first differential pair tube M1, the second differential pair tube M2 and an inverse ratio pipe M3, the grid connection input signal of the first differential pair tube M1, drain electrode connects the grid of the second differential pair tube M2 by capacitance C1, the drain electrode of the second differential pair tube M2 and the drain electrode of the first differential pair tube M1 are difference output end, and the source electrode of the source electrode of the first differential pair tube M1 and the second differential pair tube M2 is all connected with current source;The grid connection supply voltage of inverse ratio pipe M3, drain electrode is connected with the grid of the second differential pair tube M2, and the source electrode of inverse ratio pipe M3 is connected with the midpoint of the bleeder circuit being made up of R1, R2.The present invention only by singly turning double circuit, just can simultaneously realize the regulation of difference output and dutycycle, simple structure;By setting the value of R1 and R2, the dutycycle that can adjust output waveform is 50%.

Description

Single turn of double dutycycle conditioned circuit
Technical field
The present invention relates to a kind of difference channel, more particularly to single turn double dutycycle conditioned circuit.
Background technology
In a communications system, in order to improve noise resistivity, the RF front-end circuit of receiver can typically use difference Structure, single-ended signal switchs to differential signal by single-ended transfer difference device.It is single as described in number of patent application 2012100461973 End turns double end converter, and it includes the first transistor, transistor seconds and voltage transformation unit, and the voltage transformation unit includes the first inductance unit Part, the second inductance element and the 3rd inductance element, the first inductance element are carried out with the 3rd inductance element according to the first mutual coupling parameter First coupling, the second inductance element and the 3rd inductance element carry out the second coupling according to the second mutual coupling parameter.
However, in radio-frequency front-end application, using the pre-divider of TSPC structures, if such as frequency division by odd integers, pre-divider The signal dutyfactor of generation is not 50%, and is Single-end output.By after simple single-ended transfer difference device, it is impossible to correct duty Than.When the input signal dutycycle of frequency mixer is not 50%, local oscillator leakage can be produced, the problems such as noise increases.
The content of the invention
It is an object of the invention to overcome the deficiencies in the prior art, there is provided a kind of simple structure, exportable dutycycle are 50% The double dutycycle conditioned circuits of single turn of differential signal.
The purpose of the present invention is achieved through the following technical solutions:Single turn of double dutycycle conditioned circuit, it includes the One differential pair tube M1, the second differential pair tube M2 and a grid connection input signal of inverse ratio pipe M3, the first differential pair tube M1, The drain electrode of the first differential pair tube M1 connects the grid of the second differential pair tube M2, the leakage of the second differential pair tube M2 by capacitance C1 The drain electrode of pole and the first difference M1 is difference output end, and the source electrode of the source electrode of the first differential pair tube M1 and the second differential pair tube M2 is equal Connection current source;The grid connection supply voltage of inverse ratio pipe M3, the drain electrode of inverse ratio pipe M3 and the grid of the second differential pair tube M2 Extremely it is connected, the source electrode of inverse ratio pipe M3 is connected with the midpoint of the bleeder circuit being made up of R1, R2.
Further, between the drain electrode of the first differential pair tube M1 and the drain electrode of the second differential pair tube M2 and supply voltage Filter capacitor C2 is additionally provided with, filter capacitor C2 is connected by resistance R5 with the drain electrode of the first differential pair tube M1, and filter capacitor C2 is also It is connected with the drain electrode of the second differential pair tube M2 by resistance R4.
Further, the resistance R4 is identical with the resistance of resistance R5, and resistance R4 and resistance R5 is used to adjust output voltage The amplitude of oscillation.
Further, between the drain electrode of the first differential pair tube M1 and the drain electrode of the second differential pair tube M2 and supply voltage Resistance R3 is additionally provided with, resistance R3 is used to adjust the common-mode point of output voltage, and resistance R3 passes through resistance R5 and the first differential pair tube M1 Drain electrode be connected, resistance R3 is also connected by resistance R4 with the drain electrode of the second differential pair tube M2.
Further, described inverse ratio pipe M3 is NMOS inverse ratio pipes.
The beneficial effects of the invention are as follows:
(1)By singly turning double circuit, the regulation of dutycycle just can be simultaneously realized, duty cycle adjustment electricity is increased without extra Road, simple structure;
(2)Change the first differential pair tube and second poor by the fine value for setting divider resistance R1 and divider resistance R2 Divide the common mode electrical level to pipe, and then it is 50% to adjust the dutycycle of output waveform.
Brief description of the drawings
Fig. 1 is circuit theory diagrams of the invention;
Fig. 2 is the input waveform of the first differential pair tube of the invention and the second differential pair tube;
In figure, VX1And VX2It is the input of the second differential pair tube in varied situations, VinIt is the input signal of circuit.
Specific embodiment
Technical scheme is described in further detail below in conjunction with the accompanying drawings, but protection scope of the present invention is not limited to It is as described below.
As shown in figure 1, single turn of double dutycycle conditioned circuit, it include the first differential pair tube M1, the second differential pair tube M2 and One grid connection input signal V of inverse ratio pipe M3, the first differential pair tube M1in, the drain electrode of the first differential pair tube M1 by every Straight electric capacity C1 connects the grid of the second differential pair tube M2, and the drain electrode of the second differential pair tube M2 and the drain electrode of the first differential pair tube M1 are The source electrode of difference output end, the source electrode of the first differential pair tube M1 and the second differential pair tube M2 is all connected with current source.Inverse ratio pipe M3 Grid connection supply voltage VDD, the drain electrode of inverse ratio pipe M3 is connected with the grid of the second differential pair tube M2, inverse ratio pipe M3's Source electrode is connected with the midpoint of the bleeder circuit being made up of R1, R2.
Further, the drain electrode of the first differential pair tube M1 and the drain electrode of the second differential pair tube M2 and supply voltage VDD Between be additionally provided with filter capacitor C2, filter capacitor C2 is connected by resistance R5 with the drain electrode of the first differential pair tube M1, filter capacitor C2 is also connected by resistance R4 with the drain electrode of the second differential pair tube M2.
Further, the resistance R4 is identical with the resistance of resistance R5, and resistance R4 and resistance R5 is used to adjust output voltage The amplitude of oscillation.
Further, between the drain electrode of the first differential pair tube M1 and the drain electrode of the second differential pair tube M2 and supply voltage Resistance R3 is additionally provided with, resistance R3 is used to adjust the common-mode point of output voltage, and resistance R3 passes through resistance R5 and the first differential pair tube M1 Drain electrode be connected, resistance R3 is also connected by resistance R4 with the drain electrode of the second differential pair tube M2.
Further, described inverse ratio pipe M3 is NMOS inverse ratio pipes.
Operation principle of the invention is as follows:M1 single ended signals Vin, by capacitance C1, make M1 drain electrode output signals The grid of M2 is fed back to, complete circuit single turn is difunctional.The size of adjustment electric capacity C1 can control the amplitude of feedback voltage, with Make output difference signal swing identical.By setting the ratio of divider resistance R1 and divider resistance R2, change on divider resistance R2 Partial pressure size determine the common mode electrical levels of two differential pair tubes input.M3 is NMOS inverse ratio pipes, serves as the angle of big resistance Color, plays a part of to separate feedback signal.The highest of output voltage can be adjusted by setting resistance R3 and regulating resistor R2&R5 Level and the amplitude of oscillation, C2 are filter capacitor.
M1 and M2 input waveforms are as shown in Figure 2:Signal is completely put for the output of TSPC frequency dividers is the input signal V of circuitin。 Two amplitudes are compared with small-signal VX1And VX2It is the input of M2 under different situations.Due to there are various ghost effects in actual domain, lead Causing the output waveform of TSPC frequency dividers has certain rising and falling time, at different common mode electrical levels, the dutycycle of waveform Can make a big difference, using this point, finely can set R1 and R2 by post-simulation to change the common mode electrical level of M1 and M2, make Obtain output waveform dutycycle and be adjusted to 50%.For example, the dutycycle of differential signal is just 50% at common mode electrical level VCM1, and common mode The dutycycle of output difference signal cannot meet and apply needs at level VCM2.

Claims (5)

1. single turn of double dutycycle conditioned circuit, including the first differential pair tube M1, the second differential pair tube M2, it is characterised in that:It is described Circuit also includes a grid connection input signal of inverse ratio pipe M3, the first differential pair tube M1, the leakage of the first differential pair tube M1 Pole connects the grid of the second differential pair tube M2 by capacitance, and the drain electrode of the second differential pair tube M2 is with the first differential pair tube M1's It is difference output end to drain, and the source electrode of the source electrode of the first differential pair tube M1 and the second differential pair tube M2 is all connected with current source;Compare The grid connection supply voltage of example pipe M3, the drain electrode of inverse ratio pipe M3 is connected with the grid of the second differential pair tube M2, inverse ratio pipe The source electrode of M3 is connected with the midpoint of the bleeder circuit being made up of R1, R2;
First differential pair tube M1 single ended signals Vin, by capacitance C1, M1 drain electrodes output signal is fed back to the second difference Divide the grid to pipe M2, complete circuit single turn is difunctional;The size of adjustment electric capacity C1 controls the amplitude of feedback voltage, so that defeated Go out the differential signal amplitude of oscillation identical;By setting the ratio of divider resistance R1 and divider resistance R2, change dividing on divider resistance R2 Size is pressed to determine two common mode electrical levels of differential pair tubes input.
2. single turn according to claim 1 double dutycycle conditioned circuit, it is characterised in that:The first differential pair tube M1's Filter capacitor C2 is additionally provided between drain electrode and the drain electrode of the second differential pair tube M2 and supply voltage, filter capacitor C2 passes through resistance R5 Drain electrode with the first differential pair tube M1 is connected, and filter capacitor C2 is also connected by resistance R4 with the drain electrode of the second differential pair tube M2.
3. single turn according to claim 2 double dutycycle conditioned circuit, it is characterised in that:The resistance R4's and resistance R5 Resistance is identical, and resistance R4 and resistance R5 is used to adjust the amplitude of oscillation of output voltage.
4. single turn according to claim 1 double dutycycle conditioned circuit, it is characterised in that:The first differential pair tube M1's Resistance R3 is additionally provided between drain electrode and the drain electrode of the second differential pair tube M2 and supply voltage, resistance R3 is used to adjust output voltage Common-mode point, resistance R3 is connected by resistance R5 with the drain electrode of the first differential pair tube M1, and resistance R3 is also poor by resistance R4 and second Divide and the drain electrode of pipe M2 is connected.
5. single turn according to claim 1 double dutycycle conditioned circuit, it is characterised in that:Described inverse ratio pipe M3 is NMOS inverse ratio pipes.
CN201310243739.0A 2013-06-19 2013-06-19 Single turn of double dutycycle conditioned circuit Active CN104242875B (en)

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Application Number Priority Date Filing Date Title
CN201310243739.0A CN104242875B (en) 2013-06-19 2013-06-19 Single turn of double dutycycle conditioned circuit

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Application Number Priority Date Filing Date Title
CN201310243739.0A CN104242875B (en) 2013-06-19 2013-06-19 Single turn of double dutycycle conditioned circuit

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CN104242875B true CN104242875B (en) 2017-07-04

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110763922B (en) * 2019-11-01 2021-12-31 龙迅半导体(合肥)股份有限公司 Differential reference voltage generation circuit, peak signal detection circuit, and electronic device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0086334A1 (en) * 1982-01-28 1983-08-24 Kabushiki Kaisha Toshiba Pulse duty conversion circuit
US6566961B2 (en) * 2001-03-30 2003-05-20 Institute Of Microelectronics Wide-band single-ended to differential converter in CMOS technology
CN101826847A (en) * 2009-01-21 2010-09-08 立积电子股份有限公司 High-efficiency single to differential amplifier

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0086334A1 (en) * 1982-01-28 1983-08-24 Kabushiki Kaisha Toshiba Pulse duty conversion circuit
US6566961B2 (en) * 2001-03-30 2003-05-20 Institute Of Microelectronics Wide-band single-ended to differential converter in CMOS technology
CN101826847A (en) * 2009-01-21 2010-09-08 立积电子股份有限公司 High-efficiency single to differential amplifier

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