CN104113191A

CN104113191A - Intelligent power module

Info

Publication number: CN104113191A
Application number: CN201310222320.7A
Authority: CN
Inventors: 冯宇翔
Original assignee: Guangdong Midea Refrigeration Equipment Co Ltd
Current assignee: GD Midea Air Conditioning Equipment Co Ltd
Priority date: 2013-06-05
Filing date: 2013-06-05
Publication date: 2014-10-22
Anticipated expiration: 2033-06-05
Also published as: CN104113191B

Abstract

The invention belongs to the field of power drive control, and provides an intelligent power module. An input circuit, a U-phase upper bridge arm output circuit, a V-phase upper bridge arm output circuit, a W-phase upper bridge arm output circuit, a U-phase lower bridge arm output circuit, a V-phase lower bridge arm output circuit and a W-phase lower bridge arm output circuit are adopted in the intelligent power module so that each IGBT tube is driven by an independent circuit, a jumper wire between the circuit and the gate electrode of the IGBT tube is effectively reduced, gate electrode inductance is reduced, circuit noise is reduced, and thus switching speed of the IGBT tubes is enhanced. Besides, switching time of the IGBT tubes of upper and lower bridge arms are maintained to be consistent without conduction at the same time so that safety of the intelligent power module is enhanced. Furthermore, the U-phase lower bridge arm output circuit, the V-phase lower bridge arm output circuit and the W-phase lower bridge arm output circuit are low-voltage area circuits so that technical manufacturing cost is relatively low, and thus manufacturing cost of the overall intelligent power module can be substantially reduced.

Description

A kind of Intelligent Power Module

Technical field

The invention belongs to power drive control field, relate in particular to a kind of Intelligent Power Module.

Background technology

Intelligent Power Module (IPM, Intelligent Power Module) is the power drive series products of a kind of combination power electronic technology and integrated circuit technique.Intelligent Power Module integrates device for power switching and high-voltage driving circuit, and is built-in with overvoltage, overcurrent and the failure detector circuit such as overheated.Intelligent Power Module by receiving the control signal of MCU and driving subsequent conditioning circuit to work, feeds back to MCU by the state detection signal of system again on the one hand on the other hand.Compare with the discrete scheme of tradition, Intelligent Power Module wins increasing market with advantages such as its high integration, high reliability, being particularly suitable for frequency converter and the various inverter of drive motors, is the desirable power electronic device for frequency control, metallurgical machinery, electric traction, servo-drive and frequency-conversion domestic electric appliances.

As shown in Figure 1, it is for exporting U electricity, V electricity and W electricity mutually mutually mutually for the circuit structure of existing Intelligent Power Module.Wherein:

HVIC(High Voltage Integrated Circuit, high voltage integrated circuit) the power end VCC of chip 101 is as the low-pressure area power supply anode VDD of Intelligent Power Module, the voltage at VDD place is generally 15V, HVIC chip 101 first on brachium pontis signal end HIN1, second on brachium pontis signal end HIN2 and the 3rd brachium pontis signal end HIN3 as the U of Intelligent Power Module, go up mutually respectively that brachium pontis input UHIN, V go up brachium pontis input VHIN mutually and W goes up brachium pontis input WHIN mutually; First time brachium pontis signal end LIN1 of HVIC chip 101, second time brachium pontis signal end LIN2 and the 3rd time brachium pontis signal end LIN3 descend brachium pontis input ULIN, V to descend mutually brachium pontis input VLIN and W to descend mutually brachium pontis input WLIN as the U of Intelligent Power Module respectively mutually; At this, Intelligent Power Module first on brachium pontis signal end HIN1, second on brachium pontis signal end HIN2, the 3rd voltage range of the input signal of brachium pontis signal end HIN3, first time brachium pontis signal end LIN1, second time brachium pontis signal end LIN2 and the 3rd time brachium pontis signal end LIN3 be 0～5V; The earth terminal GND of HVIC chip 101 is as the low-pressure area power supply negative terminal COM of Intelligent Power Module; The first power supply anode VB1 of HVIC chip 101 is as the U phase higher-pressure region power supply anode UVB of Intelligent Power Module, the first higher-pressure region control end HO1 of HVIC chip 101 is connected with the grid of IGBT pipe Q1, the first power supply negative terminal VS1 end of HVIC chip 101 is connected with the described IGBT pipe source electrode of Q1, the anode of fast recovery diode D1, the IGBT pipe drain electrode of D4 and the negative electrode of fast recovery diode D4, and as the U phase higher-pressure region of the Intelligent Power Module negative terminal UVS that powers; The second power supply anode VB2 of HVIC chip 101 is as the U phase higher-pressure region power supply anode VVB of Intelligent Power Module, the second higher-pressure region control end HO2 of HVIC chip 101 is connected with the grid of IGBT pipe Q2, the second power supply negative terminal VS2 of HVIC chip 101 with the IGBT pipe source electrode of Q2, the anode of fast recovery diode D2, the IGBT pipe drain electrode of Q5 and the negative electrode of fast recovery diode D5 be connected, and as the W phase higher-pressure region of the Intelligent Power Module negative terminal VVS that powers; The 3rd power supply anode VB3 of HVIC chip 101 is as the W phase higher-pressure region power supply anode WVB of Intelligent Power Module, the third high nip control end HO3 of HVIC chip 101 is connected with the grid of IGBT pipe Q3, the 3rd power supply negative terminal VS3 of HVIC chip 101 with the IGBT pipe source electrode of Q3, the anode of fast recovery diode D3, the IGBT pipe drain electrode of Q6 and the negative electrode of fast recovery diode D6 be connected, and as the W phase higher-pressure region of the Intelligent Power Module negative terminal WVS that powers; The first power supply negative terminal LO1, the second power supply negative terminal LO2 of HVIC chip 101 and the 3rd power supply negative terminal LO3 are connected with the grid of the grid of described IGBT pipe Q4, the grid of IGBT pipe Q5 and IGBT pipe Q6 respectively; The source electrode of IGBT pipe Q4 is connected with the anode of fast recovery diode D4, and as the U phase low reference voltage end UN of Intelligent Power Module; The source electrode of IGBT pipe Q5 is connected with the anode of fast recovery diode D5, and as the V phase low reference voltage end VN of Intelligent Power Module; The source electrode of IGBT pipe Q6 is connected with the anode of fast recovery diode D6, and as the W phase low reference voltage end WN of Intelligent Power Module; The drain electrode of Q1 of IGBT pipe, the negative electrode of fast recovery diode D1, the IGBT pipe drain electrode of Q2, the negative electrode of fast recovery diode D2, the IGBT pipe collector electrode of Q3 are, the negative electrode of fast recovery diode D3 connects altogether and as the high voltage input P of Intelligent Power Module, P generally accesses 300V voltage.

The effect of HVIC chip 101 is that the logical signal of 0～5V that HIN1, HIN2, HIN3, LIN1, LIN2, LIN3 are received passes to respectively HO1, HO2, HO3, LO1, LO2, LO3, what wherein HO1, HO2 and HO3 exported is the logical signal of VS～VS+15V, and LO1, LO2, LO3 are the logical signals of 0～15V.

When practical application, as shown in Figure 2, capacitor C 1 is connected between UVB and UVS the mode of connection of Intelligent Power Module, and capacitor C 2 is connected between VVB and VVS, and capacitor C 3 is connected between WVB and WVS; The first end of VDD connecting resistance R1, the second end of resistance R 1 is connected with the anode of the anode of diode D11, diode D12 and the anode of diode D13; At this, the resistance of resistance R 1 is generally 10 Ω left and right.The negative electrode of diode D11 is connected with UVB, and the negative electrode of diode D12 is connected with VVB, and the negative electrode of diode D13 is connected with WVB; UN, VN, WN are connected to the first end of resistance R 2 altogether, and the second end of resistance R 2 and COM are connected to ground altogether; At this, the resistance of resistance R 2 is generally 50m Ω left and right.

Below that to take U be the operation principle of example explanation Intelligent Power Module mutually:

When ULIN is high level, when UHIN3 is low level, LO1 is high level, and HO1 is low level, IGBT pipe Q4 conducting, and IGBT pipe Q1 cut-off, and the voltage of UVS approaches the voltage of UN and is close to zero, and VDD charges to 15V by diode D11 to capacitor C 1.

When ULIN is low level, when UHIN3 is high level, LO1 is low level, and HO1 is high level, IGBT pipe Q4 cut-off, and IGBT pipe Q1 conducting, the voltage of UVS approaches the voltage of P, and at this moment the electric weight of capacitor C 1, for the higher-pressure region of HVIC chip 101 provides energy, makes HO1 approach 15V to the pressure drop of UVS.

As mentioned above, the U of Intelligent Power Module, in real work, manages the alternately open-minded of Q4 and IGBT pipe Q1 by IGBT, and the voltage of UVS is in 300V and 0 alternately variation, and the operation principle of V phase and W phase is mutually identical with U.

Because HO1 and LO1 are on same HVIC chip, when practical wiring, must cause wire jumper or the wire jumper between LO1 and the grid of IGBT pipe Q4 between HO1 and the grid of IGBT pipe Q1 longer, as shown in Figure 3, and the length of wire jumper is longer, can make the grid inductance of IGBT pipe become large, and then reduce the switch efficiency of IGBT pipe and increase circuit noise, and can make switching time of IGBT pipe of upper and lower bridge arm inconsistent, if and the IGBT pipe of upper and lower bridge arm some time there is the situation of conducting simultaneously, can cause Intelligent Power Module to be burnt because of overcurrent.

In addition, from the foregoing, the partial circuit of HVIC chip 101 inside need to bear high pressure more than 300V, and as long as partial circuit bears the voltage of 5V or 15V, the manufacturing cost of high-pressure process integrated circuit is far above the manufacturing cost of low pressure process integrated circuit, so, the different circuit of voltage endurance capability is integrated in to the manufacturing cost that can increase HVIC chip in same HVIC chip.

In sum, existing Intelligent Power Module exists and because the wire jumper between HVIC chip and the grid of IGBT pipe is long, occurs that the switch efficiency of IGBT pipe is low large with circuit noise, and the problem that when the conducting simultaneously of the IGBT of upper and lower bridge arm pipe, Intelligent Power Module is burnt because of overcurrent, simultaneously, because the manufacturing cost of HVIC chip is high, so the manufacturing cost of Intelligent Power Module also can increase thereupon.

Summary of the invention

The object of the present invention is to provide a kind of Intelligent Power Module, be intended to solve the existing switch efficiency because of the long IGBT of the appearance pipe of wire jumper between HVIC chip and the grid of IGBT pipe of existing Intelligent Power Module low large with circuit noise, and the problem that when the IGBT pipe conducting simultaneously of upper and lower bridge arm, Intelligent Power Module is burnt because of overcurrent, and reduce the manufacturing cost of Intelligent Power Module simultaneously.

The present invention realizes like this, an Intelligent Power Module, comprises IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2, fast recovery diode D2, IGBT pipe Q3, fast recovery diode D3, IGBT pipe Q4, fast recovery diode D4, IGBT pipe Q5, fast recovery diode D5, IGBT pipe Q6 and fast recovery diode D6, the described IGBT pipe drain electrode of Q1 and the negative electrode of described fast recovery diode D1, the drain electrode of described IGBT pipe Q2, the drain electrode of described fast recovery diode D2, the described IGBT pipe drain electrode of Q3 and the negative electrode of described fast recovery diode D3 connect formed contact altogether altogether as the high voltage input of described Intelligent Power Module, the described IGBT pipe source electrode of Q4 and the anode of described fast recovery diode D4 connect formed contact altogether altogether as the U phase low reference voltage end of described Intelligent Power Module, the described IGBT pipe source electrode of Q5 and the anode of described fast recovery diode D5 connect formed contact altogether altogether as the V phase low reference voltage end of described Intelligent Power Module, the described IGBT pipe source electrode of Q6 and the anode of described fast recovery diode D6 connect formed contact altogether altogether as the W phase low reference voltage end of described Intelligent Power Module,

Described Intelligent Power Module also comprises:

Input circuit, U go up mutually brachium pontis output circuit, V and go up mutually brachium pontis output circuit, W and go up mutually brachium pontis output circuit, U and descend mutually brachium pontis output circuit, V to descend mutually brachium pontis output circuit and W to descend mutually brachium pontis output circuit;

The power end of described input circuit and described U descend the power end of brachium pontis output circuit mutually, V descends the power end of brachium pontis output circuit and power end that W descends brachium pontis output circuit mutually to connect altogether formed contact altogether as the power supply anode of described Intelligent Power Module mutually, described input circuit first on brachium pontis signal end, brachium pontis signal end on second, brachium pontis signal end on the 3rd, first time brachium pontis signal end, second time brachium pontis signal end and the 3rd time brachium pontis signal end are gone up brachium pontis input mutually as the U of described Intelligent Power Module respectively, V goes up brachium pontis input mutually, W goes up brachium pontis input mutually, U descends brachium pontis input mutually, V descends brachium pontis input and W to descend mutually brachium pontis input mutually, the earth terminal of described input circuit and described U go up the earth terminal of brachium pontis output circuit mutually, V goes up the earth terminal of brachium pontis output circuit mutually, W goes up the earth terminal of brachium pontis output circuit mutually, U descends the earth terminal of brachium pontis output circuit mutually, V descends the earth terminal of brachium pontis output circuit and earth terminal that W descends brachium pontis output circuit mutually to connect altogether formed contact altogether as the power supply negative terminal of described Intelligent Power Module mutually, the U of described input circuit goes up mutually brachium pontis rising edge pulse output end and goes up mutually brachium pontis trailing edge pulse output end with U and be connected respectively rising edge input and the trailing edge input that described U goes up brachium pontis output circuit mutually, the V of described input circuit goes up mutually brachium pontis rising edge pulse output end and goes up mutually brachium pontis trailing edge pulse output end with V and be connected respectively rising edge input and the trailing edge input that described V goes up brachium pontis output circuit mutually, the W of described input circuit goes up mutually brachium pontis rising edge pulse output end and goes up mutually brachium pontis trailing edge pulse output end with W and be connected respectively rising edge input and the trailing edge input that described W goes up brachium pontis output circuit mutually, described U goes up the power supply anode of brachium pontis output circuit mutually, described V goes up the power supply anode of brachium pontis output circuit and power supply anode that described W goes up brachium pontis output circuit mutually mutually respectively as the U phase higher-pressure region power supply anode of described Intelligent Power Module, V phase higher-pressure region power supply anode and W phase higher-pressure region power supply anode, described U goes up the output of brachium pontis output circuit mutually, described V goes up the grid that the output of brachium pontis output circuit and output that described W goes up brachium pontis output circuit mutually connect respectively described IGBT pipe Q1 mutually, the grid of the grid of described IGBT pipe Q2 and described IGBT pipe Q3, described U goes up the power supply negative terminal of brachium pontis output circuit and the source electrode of described IGBT pipe Q1 mutually, the anode of described fast recovery diode D1, the described IGBT pipe drain electrode of Q4 and the negative electrode of described fast recovery diode D4 connect formed contact altogether altogether as the U phase higher-pressure region power supply negative terminal of described Intelligent Power Module, described V goes up the power supply negative terminal of brachium pontis output circuit and the source electrode of described IGBT pipe Q2 mutually, the anode of described fast recovery diode D2, the described IGBT pipe drain electrode of Q5 and the negative electrode of described fast recovery diode D5 connect formed contact altogether altogether as the V phase higher-pressure region power supply negative terminal of described Intelligent Power Module, described W goes up the power supply negative terminal of brachium pontis output circuit and the source electrode of described IGBT pipe Q3 mutually, the anode of described fast recovery diode D3, the described IGBT pipe drain electrode of Q6 and the negative electrode of described fast recovery diode D6 connect formed contact altogether altogether as the W phase higher-pressure region power supply negative terminal of described Intelligent Power Module, described U descends mutually the input of brachium pontis output circuit and the U of described input circuit to descend mutually brachium pontis output to connect altogether formed altogether contact and descends mutually brachium pontis time delay adjustment end as the U of described Intelligent Power Module, described V descends mutually the input of brachium pontis output circuit and the V of described input circuit to descend mutually brachium pontis output to connect altogether formed altogether contact and descends mutually brachium pontis time delay adjustment end as the V of described Intelligent Power Module, described W descends mutually the input of brachium pontis output circuit and the W of described input circuit to descend mutually brachium pontis output to connect altogether formed altogether contact and descends mutually brachium pontis time delay adjustment end as the W of described Intelligent Power Module, described U descends the output of brachium pontis output circuit mutually, described V descends the output of brachium pontis output circuit and output that described W descends brachium pontis output circuit mutually to connect respectively the grid of described IGBT pipe Q4 mutually, the grid of the grid of described IGBT pipe Q5 and described IGBT pipe Q6,

Described input circuit receives U and goes up mutually brachium pontis input signal, V goes up brachium pontis input signal mutually, W goes up brachium pontis input signal mutually, U descends brachium pontis input signal mutually, V descends brachium pontis input signal and W to descend mutually brachium pontis input signal mutually, and the rising edge of going up mutually brachium pontis input signal at described U brachium pontis rising edge pulse output end output U phase narrow pulse signal mutually from described U, the trailing edge of going up mutually brachium pontis input signal at described U mutually brachium pontis trailing edge pulse output end from described U and is exported described U and go up mutually brachium pontis narrow pulse signal, the rising edge of going up mutually brachium pontis input signal at described V mutually brachium pontis rising edge pulse output end output V from described V and is gone up mutually brachium pontis narrow pulse signal, the trailing edge of going up mutually brachium pontis input signal at described V mutually brachium pontis trailing edge pulse output end from described V and is exported described V and go up mutually brachium pontis narrow pulse signal, the rising edge of going up mutually brachium pontis input signal at described W mutually brachium pontis rising edge pulse output end output W from described W and is gone up mutually brachium pontis narrow pulse signal, the trailing edge of going up mutually brachium pontis input signal at described W mutually brachium pontis trailing edge pulse output end from described W and is exported described W and go up mutually brachium pontis narrow pulse signal, at described U, descend mutually brachium pontis output output phase and described U to descend mutually the U that brachium pontis input signal is identical to descend mutually brachium pontis pulse signal simultaneously, at described V, descend mutually brachium pontis output output phase and described V to descend mutually the V that brachium pontis input signal is identical to descend mutually brachium pontis pulse signal, at described W, descend mutually brachium pontis output output phase and described W to descend mutually the W that brachium pontis input signal is identical to descend mutually brachium pontis pulse signal,

Described U goes up mutually brachium pontis output circuit and from described input circuit, receives described U and mutually brachium pontis narrow pulse signal, and described U is gone up to brachium pontis narrow pulse signal mutually from low-pressure area, be sent to higher-pressure region, and go up mutually brachium pontis control signal to control the break-make of described IGBT pipe Q1 at the output output U that described U goes up brachium pontis output circuit mutually;

Described V goes up mutually brachium pontis output circuit and from described input circuit, receives described V and mutually brachium pontis narrow pulse signal, and described V is gone up to brachium pontis narrow pulse signal mutually from low-pressure area, be sent to higher-pressure region, and go up mutually brachium pontis control signal to control the break-make of described IGBT pipe Q2 at the output output V that described V goes up brachium pontis output circuit mutually;

Described W goes up mutually brachium pontis output circuit and from described input circuit, receives described W and mutually brachium pontis narrow pulse signal, and described W is gone up to brachium pontis narrow pulse signal mutually from low-pressure area, be sent to higher-pressure region, and go up mutually brachium pontis control signal to control the break-make of described IGBT pipe Q3 at the output output W that described W goes up brachium pontis output circuit mutually;

Described U descends mutually brachium pontis output circuit to receive described U from described input circuit and mutually brachium pontis pulse signal, and from described U, mutually the output of brachium pontis output circuit to generate U and descend mutually brachium pontis control signal to control the break-make of described IGBT pipe Q4;

Described V descends mutually brachium pontis output circuit to receive described V from described input circuit and mutually brachium pontis pulse signal, and from described V, mutually the output of brachium pontis output circuit to generate V and descend mutually brachium pontis control signal to control the break-make of described IGBT pipe Q5;

Described W descends mutually brachium pontis output circuit to receive described W from described input circuit and mutually brachium pontis pulse signal, and from described W, mutually the output of brachium pontis output circuit to generate W and descend mutually brachium pontis control signal to control the break-make of described IGBT pipe Q6;

Described IGBT pipe Q1 and described IGBT pipe Q4 go up mutually brachium pontis control signal and described U at described U respectively and descend mutually alternate conduction under the control of brachium pontis control signal to remain on predeterminated voltage difference with the voltage difference of controlling described U and going up mutually the power supply anode of brachium pontis output circuit and power between negative terminal, and the power supply anode that described U goes up brachium pontis output circuit mutually outwards provides U electric mutually;

Described IGBT pipe Q2 and described IGBT pipe Q5 go up mutually brachium pontis control signal and described V at described V respectively and descend mutually alternate conduction under the control of brachium pontis control signal to remain on described predeterminated voltage difference with the voltage difference of controlling described V and going up mutually the power supply anode of brachium pontis output circuit and power between negative terminal, and the power supply anode that described V goes up brachium pontis output circuit mutually outwards provides V electric mutually;

Described IGBT pipe Q3 and described IGBT pipe Q6 go up mutually brachium pontis control signal and described W at described W respectively and descend mutually alternate conduction under the control of brachium pontis control signal to remain on described predeterminated voltage difference with the voltage difference of controlling described W and going up mutually the power supply anode of brachium pontis output circuit and power between negative terminal, and the power supply anode that described W goes up brachium pontis output circuit mutually outwards provides W electric mutually.

Described U goes up mutually brachium pontis input signal, described V and goes up mutually brachium pontis input signal, described W and go up mutually brachium pontis input signal, described U to descend mutually brachium pontis input signal, described V to descend mutually brachium pontis input signal and described W to descend mutually the voltage range of brachium pontis input signal be [0,5V].

The pulse duration that described U goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that described U goes up brachium pontis input signal mutually, and voltage range is [0,15V];

The pulse duration that described V goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that described V goes up brachium pontis input signal mutually, and voltage range is [0,15V];

The pulse duration that described W goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that described W goes up brachium pontis input signal mutually, and voltage range is [0,15V];

It is [0,15V] that described U descends the voltage range of brachium pontis pulse signal mutually, and it is [0,15V] that described V descends the voltage range of brachium pontis pulse signal mutually, and it is [0,15V] that described W descends the voltage range of brachium pontis pulse signal mutually.

The pulse duration that described U goes up brachium pontis control signal is mutually identical with the pulse duration that described U goes up brachium pontis input signal mutually, the voltage range that described U goes up brachium pontis control signal is mutually [Vs1, Vs1+15V], Vs1 is the voltage that described U goes up the power supply negative terminal of brachium pontis output circuit mutually, and described U goes up mutually brachium pontis control signal and with respect to described U, goes up mutually brachium pontis input signal and postpone the first Preset Time interval;

The pulse duration that described V goes up brachium pontis control signal is mutually identical with the pulse duration that described V goes up brachium pontis input signal mutually, the voltage range that described V goes up brachium pontis control signal is mutually [Vs2, Vs2+15V], Vs2 is the voltage that described V goes up the power supply negative terminal of brachium pontis output circuit mutually, and described V goes up mutually brachium pontis control signal and with respect to described V, goes up mutually brachium pontis input signal and postpone the second Preset Time interval;

The pulse duration that described W goes up brachium pontis control signal is mutually identical with the pulse duration that described W goes up brachium pontis input signal mutually, the voltage range that described W goes up brachium pontis control signal is mutually [Vs3, Vs3+15V], Vs3 is the voltage that described W goes up the power supply negative terminal of brachium pontis output circuit mutually, and described W goes up mutually brachium pontis control signal and goes up mutually brachium pontis input signal delay control three Preset Time intervals with respect to described W;

Described U descends the pulse duration of brachium pontis control signal to descend mutually the pulse duration of brachium pontis input signal identical with described U mutually, it is [0 that described U descends the voltage range of brachium pontis control signal mutually, 15V], described U descends brachium pontis control signal to descend mutually brachium pontis input signal delay control four Preset Time intervals with respect to described U mutually;

Described V descends the pulse duration of brachium pontis control signal to descend mutually the pulse duration of brachium pontis input signal identical with described V mutually, it is [0 that described V descends the voltage range of brachium pontis control signal mutually, 15V], described V descends brachium pontis control signal to descend mutually brachium pontis input signal delay control five Preset Time intervals with respect to described V mutually;

Described W descends the pulse duration of brachium pontis control signal to descend mutually the pulse duration of brachium pontis input signal identical with described W mutually, it is [0 that described W descends the voltage range of brachium pontis control signal mutually, 15V], described W descends brachium pontis control signal to descend mutually brachium pontis input signal delay control six Preset Time intervals with respect to described W mutually.

In the present invention, by adopt input circuit in Intelligent Power Module, U goes up brachium pontis output circuit mutually, V goes up brachium pontis output circuit mutually, W goes up brachium pontis output circuit mutually, U descends brachium pontis output circuit mutually, V descends brachium pontis output circuit and W to descend mutually brachium pontis output circuit mutually, each IGBT pipe is driven by circuit independently, effectively shortened the wire jumper between circuit and the grid of IGBT pipe, reduced grid inductance, reduced circuit noise, and then the switching speed of raising IGBT pipe, and be consistent and not conducting simultaneously the switching time that makes the IGBT pipe of upper and lower bridge arm, thereby promoted the fail safe of Intelligent Power Module.And because U descends brachium pontis output circuit, V to descend mutually brachium pontis output circuit and W to descend mutually brachium pontis output circuit mutually, be low-pressure area circuit, its technique cost of manufacture is lower, can significantly reduce the manufacturing cost of whole Intelligent Power Module.

Accompanying drawing explanation

Fig. 1 is the structure chart of existing Intelligent Power Module;

Fig. 2 be existing Intelligent Power Module in actual applications with the johning knot composition of its peripheral circuit;

Fig. 3 is HVIC chip in existing Intelligent Power Module and the wire jumper connection diagram of IGBT pipe;

Fig. 4 is the structure chart of the Intelligent Power Module that provides of the embodiment of the present invention;

Fig. 5 is the wire jumper connection diagram between IGBT pipe and circuit in the Intelligent Power Module that provides of the embodiment of the present invention;

Fig. 6 is the exemplary circuit structure chart of the input circuit in the Intelligent Power Module that provides of the embodiment of the present invention;

Fig. 7 is the exemplary circuit structure chart that the U in the Intelligent Power Module that provides of the embodiment of the present invention goes up brachium pontis output circuit mutually;

Fig. 8 is the exemplary circuit structure chart that the U in the Intelligent Power Module that provides of the embodiment of the present invention descends brachium pontis output circuit mutually.

Embodiment

In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.

The embodiment of the present invention by adopting input circuit in Intelligent Power Module, U goes up brachium pontis output circuit mutually, V goes up brachium pontis output circuit mutually, W goes up brachium pontis output circuit mutually, U descends brachium pontis output circuit mutually, V descends brachium pontis output circuit and W to descend mutually brachium pontis output circuit mutually, each IGBT pipe is driven by circuit independently, effectively shortened the wire jumper between circuit and the grid of IGBT pipe, reduced grid inductance, reduced circuit noise, and then the switching speed of raising IGBT pipe, and be consistent and not conducting simultaneously the switching time that makes the IGBT pipe of upper and lower bridge arm, thereby promoted the fail safe of Intelligent Power Module.And because U descends brachium pontis output circuit, V to descend mutually brachium pontis output circuit and W to descend mutually brachium pontis output circuit mutually, be low-pressure area circuit, its technique cost of manufacture is lower, can significantly reduce the manufacturing cost of whole Intelligent Power Module.

Fig. 4 shows the structure of the Intelligent Power Module that the embodiment of the present invention provides, and for convenience of explanation, only shows part related to the present invention, and details are as follows:

Intelligent Power Module comprises IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2, fast recovery diode D2, IGBT pipe Q3, fast recovery diode D3, IGBT pipe Q4, fast recovery diode D4, IGBT pipe Q5, fast recovery diode D5, IGBT pipe Q6 and fast recovery diode D6.

The IGBT pipe drain electrode of Q1 and the negative electrode of fast recovery diode D1, the drain electrode of IGBT pipe Q2, the drain electrode of fast recovery diode D2, the IGBT pipe drain electrode of Q3 and the negative electrode of fast recovery diode D3 connect formed contact altogether altogether as the high voltage input P of Intelligent Power Module, the IGBT pipe source electrode of Q4 and the anode of fast recovery diode D4 connect formed contact altogether altogether as the U phase low reference voltage end UN of Intelligent Power Module, the IGBT pipe source electrode of Q5 and the anode of fast recovery diode D5 connect formed contact altogether altogether as the V phase low reference voltage end VN of Intelligent Power Module, the IGBT pipe source electrode of Q6 and the anode of fast recovery diode D6 connect formed contact altogether altogether as the W phase low reference voltage end WN of Intelligent Power Module.

Intelligent Power Module also comprises:

Input circuit 100, U go up mutually brachium pontis output circuit 200, V and go up mutually brachium pontis output circuit 300, W and go up mutually brachium pontis output circuit 400, U and descend mutually brachium pontis output circuit 500, V to descend mutually brachium pontis output circuit 600 and W to descend mutually brachium pontis output circuit 700.

The power end VCC of input circuit 100 and U descend the power end VCC of brachium pontis output circuit 500 mutually, V descends mutually the power end VCC of brachium pontis output circuit 600 and power end VCC that W descends brachium pontis output circuit 700 mutually to connect altogether formed contact altogether and is generally 15V as its input voltage of power supply anode VDD(of Intelligent Power Module), input circuit 100 first on brachium pontis signal end HIN1, brachium pontis signal end HIN2 on second, brachium pontis signal end HIN3 on the 3rd, first time brachium pontis signal end LIN1, second time brachium pontis signal end LIN2 and the 3rd time brachium pontis signal end LIN3 go up brachium pontis input UHIN mutually as the U of Intelligent Power Module respectively, V goes up brachium pontis input VHIN mutually, W goes up brachium pontis input WHIN mutually, U descends brachium pontis input ULIN mutually, V descends brachium pontis input VLIN and W to descend mutually brachium pontis input WLIN mutually, the earth terminal GND of input circuit 100 and U go up the earth terminal GND of brachium pontis output circuit 200 mutually, V goes up the earth terminal GND of brachium pontis output circuit 300 mutually, W goes up the earth terminal GND of brachium pontis output circuit 400 mutually, U descends the earth terminal GND of brachium pontis output circuit 500 mutually, V descends the earth terminal GND of brachium pontis output circuit 600 and earth terminal GND that W descends brachium pontis output circuit 700 mutually to connect altogether formed contact altogether as the power supply negative terminal COM of Intelligent Power Module mutually, the U of input circuit 100 goes up mutually brachium pontis rising edge pulse output end UHD and goes up mutually brachium pontis trailing edge pulse output end ULD with U and be connected respectively rising edge input HDIN and the trailing edge input LDIN that U goes up brachium pontis output circuit 200 mutually, the V of input circuit 100 goes up mutually brachium pontis rising edge pulse output end VHD and goes up mutually brachium pontis trailing edge pulse output end VLD with V and be connected respectively rising edge input HDIN and the trailing edge input LDIN that V goes up brachium pontis output circuit 300 mutually, the W of input circuit 100 goes up mutually brachium pontis rising edge pulse output end WHD and goes up mutually brachium pontis trailing edge pulse output end WLD with W and be connected respectively rising edge input HDIN and the trailing edge input LDIN that W goes up brachium pontis output circuit 400 mutually, U goes up the power supply anode VB of brachium pontis output circuit 200 mutually, V goes up the power supply anode VB of brachium pontis output circuit 300 and power supply anode VB that W goes up brachium pontis output circuit 400 mutually mutually respectively as the U phase higher-pressure region power supply anode UVB of Intelligent Power Module, V phase higher-pressure region power supply anode VVB and W phase higher-pressure region power supply anode WVB, U goes up the output HO of brachium pontis output circuit 200 mutually, V goes up the grid that the output HO of brachium pontis output circuit 300 and output HO that W goes up brachium pontis output circuit 400 mutually connect respectively IGBT pipe Q1 mutually, the grid of the grid of IGBT pipe Q2 and IGBT pipe Q3, U goes up the power supply negative terminal VB of brachium pontis output circuit 200 and the source electrode of IGBT pipe Q1 mutually, the anode of fast recovery diode D1, the IGBT pipe drain electrode of Q4 and the negative electrode of fast recovery diode D4 connect formed contact altogether altogether as the U phase higher-pressure region power supply negative terminal UVS of Intelligent Power Module, V goes up the power supply negative terminal VS of brachium pontis output circuit 300 and the source electrode of IGBT pipe Q2 mutually, the anode of fast recovery diode D2, the IGBT pipe drain electrode of Q5 and the negative electrode of fast recovery diode D5 connect formed contact altogether altogether as the V phase higher-pressure region power supply negative terminal VVS of Intelligent Power Module, W goes up the power supply negative terminal VS of brachium pontis output circuit 400 and the source electrode of IGBT pipe Q3 mutually, the anode of fast recovery diode D3, the IGBT pipe drain electrode of Q6 and the negative electrode of fast recovery diode D6 connect formed contact altogether altogether as the W phase higher-pressure region power supply negative terminal WVS of Intelligent Power Module, U descends mutually the input LTIN of brachium pontis output circuit 500 and the U of input circuit 100 to descend mutually brachium pontis output ULT to connect altogether formed altogether contact and descends mutually brachium pontis time delay adjustment end UR as the U of Intelligent Power Module, V descends mutually the input LTIN of brachium pontis output circuit 600 and the V of input circuit 100 to descend mutually brachium pontis output VLT to connect altogether formed altogether contact and descends mutually brachium pontis time delay adjustment end VR as the V of Intelligent Power Module, W descends mutually the input LTIN of brachium pontis output circuit 700 and the W of input circuit 100 to descend mutually brachium pontis output WLT to connect altogether formed altogether contact and descends mutually brachium pontis time delay adjustment end WR as the W of Intelligent Power Module, U descends the output LO of brachium pontis output circuit 500 mutually, V descends the output LO of brachium pontis output circuit 600 and output LO that W descends brachium pontis output circuit 700 mutually to connect respectively the grid of IGBT pipe Q4 mutually, the grid of the grid of IGBT pipe Q5 and IGBT pipe Q6.

Input circuit 100 receives U and goes up mutually brachium pontis input signal, V goes up brachium pontis input signal mutually, W goes up brachium pontis input signal mutually, U descends brachium pontis input signal mutually, V descends brachium pontis input signal and W to descend mutually brachium pontis input signal mutually, and the rising edge of going up mutually brachium pontis input signal at U brachium pontis rising edge pulse output end UHD output U phase narrow pulse signal mutually from U, the trailing edge of going up mutually brachium pontis input signal at U mutually brachium pontis trailing edge pulse output end ULD output U from U and is gone up mutually brachium pontis narrow pulse signal, the rising edge of going up mutually brachium pontis input signal at V mutually brachium pontis rising edge pulse output end VHD output V from V and is gone up mutually brachium pontis narrow pulse signal, the trailing edge of going up mutually brachium pontis input signal at V mutually brachium pontis trailing edge pulse output end VLD output V from V and is gone up mutually brachium pontis narrow pulse signal, the rising edge of going up mutually brachium pontis input signal at W mutually brachium pontis rising edge pulse output end WHD output W from W and is gone up mutually brachium pontis narrow pulse signal, the trailing edge of going up mutually brachium pontis input signal at W mutually brachium pontis trailing edge pulse output end WLD output W from W and is gone up mutually brachium pontis narrow pulse signal, at U, descend mutually brachium pontis output ULT output phase and U to descend mutually the U that brachium pontis input signal is identical to descend mutually brachium pontis pulse signal simultaneously, at V, descend mutually brachium pontis output VLT output phase and V to descend mutually the V that brachium pontis input signal is identical to descend mutually brachium pontis pulse signal, at W, descend mutually brachium pontis output WLT output phase and W to descend mutually the W that brachium pontis input signal is identical to descend mutually brachium pontis pulse signal.

U goes up mutually brachium pontis output circuit 200 and mutually brachium pontis narrow pulse signal from input circuit 100 reception U, and U is gone up to brachium pontis narrow pulse signal mutually from low-pressure area, be sent to higher-pressure region, and go up mutually brachium pontis control signal to control the break-make of IGBT pipe Q1 at the output HO output U that U goes up brachium pontis output circuit 200 mutually.

V goes up mutually brachium pontis output circuit 300 and mutually brachium pontis narrow pulse signal from input circuit 100 reception V, and V is gone up to brachium pontis narrow pulse signal mutually from low-pressure area, be sent to higher-pressure region, and go up mutually brachium pontis control signal to control the break-make of IGBT pipe Q2 at the output HO output V that V goes up brachium pontis output circuit 300 mutually.

W goes up mutually brachium pontis output circuit 400 and mutually brachium pontis narrow pulse signal from input circuit 100 reception W, and W is gone up to brachium pontis narrow pulse signal mutually from low-pressure area, be sent to higher-pressure region, and go up mutually brachium pontis control signal to control the break-make of IGBT pipe Q3 at the output HO output W that W goes up brachium pontis output circuit mutually.

U descends mutually brachium pontis output circuit 500 to receive U from input circuit 100 and mutually brachium pontis pulse signal, and from U, mutually the output LO of brachium pontis output circuit 500 to generate U and descend mutually brachium pontis control signal to control the break-make of IGBT pipe Q4.

V descends mutually brachium pontis output circuit 600 to receive V from input circuit 100 and mutually brachium pontis pulse signal, and from V, mutually the output LO of brachium pontis output circuit 600 to generate V and descend mutually brachium pontis control signal to control the break-make of IGBT pipe Q5.

W descends mutually brachium pontis output circuit 700 to receive W from input circuit 100 and mutually brachium pontis pulse signal, and from W, mutually the output LO of brachium pontis output circuit 700 to generate W and descend mutually brachium pontis control signal to control the break-make of IGBT pipe Q6.

IGBT pipe Q1 and IGBT pipe Q4 go up mutually brachium pontis control signal and U at U respectively and descend mutually alternate conduction under the control of brachium pontis control signal to remain on predeterminated voltage difference with the voltage difference of controlling U and going up mutually the power supply anode VB of brachium pontis output circuit 200 and power between negative terminal VS, and the power supply anode VB that U goes up brachium pontis output circuit 200 mutually outwards provides U electric mutually.

IGBT pipe Q2 and IGBT pipe Q5 go up mutually brachium pontis control signal and V at V respectively and descend mutually alternate conduction under the control of brachium pontis control signal to remain on above-mentioned predeterminated voltage difference with the voltage difference of controlling V and going up mutually the power supply anode VB of brachium pontis output circuit 300 and power between negative terminal VS, and the power supply anode VB that V goes up brachium pontis output circuit 300 mutually outwards provides V electric mutually.

IGBT pipe Q3 and IGBT pipe Q6 go up mutually brachium pontis control signal and W at W respectively and descend mutually alternate conduction under the control of brachium pontis control signal to remain on above-mentioned predeterminated voltage difference with the voltage difference of controlling W and going up mutually the power supply anode VB of brachium pontis output circuit 400 and power between negative terminal VS, and the power supply anode VB that W goes up brachium pontis output circuit 400 mutually outwards provides W electric mutually.

Wherein, above-mentioned predeterminated voltage difference can value be 15V, the highest 20V that is no more than, and the U power supply negative terminal VS that goes up mutually brachium pontis output circuit 200 can be raised to 300V, the highest 600V that is no more than with respect to the pressure drop of its earth terminal GND.

U goes up mutually brachium pontis input signal, V and goes up mutually brachium pontis input signal, W and go up mutually brachium pontis input signal, U to descend mutually brachium pontis input signal, V to descend mutually brachium pontis input signal and W to descend mutually the voltage range of brachium pontis input signal can be [0,5V], and the highest 10V that is no more than.

The pulse duration that U goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that U goes up brachium pontis input signal mutually, and voltage range is [0,15V]; The pulse duration that V goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that V goes up brachium pontis input signal mutually, and voltage range is [0,15V]; The pulse duration that W goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that W goes up brachium pontis input signal mutually, and voltage range is [0,15V].The U that input circuit 100 output pulse widths diminish goes up that brachium pontis narrow pulse signal, V go up brachium pontis narrow pulse signal mutually and W goes up brachium pontis narrow pulse signal mutually mutually, is mainly to go up in order to reduce U mutually that brachium pontis output circuit 200, V go up brachium pontis output circuit 300 mutually and W goes up the switching loss of brachium pontis output circuit 400 the process that signal is sent to higher-pressure region from low-pressure area mutually.

It is [0,15V] that U descends the voltage range of brachium pontis pulse signal mutually, and it is [0,15V] that V descends the voltage range of brachium pontis pulse signal mutually, and it is [0,15V] that W descends the voltage range of brachium pontis pulse signal mutually.

The pulse duration that U goes up brachium pontis control signal is mutually identical with the pulse duration that U goes up brachium pontis input signal mutually, the voltage range that U goes up brachium pontis control signal is mutually [Vs1, Vs1+15V], Vs1 is the voltage that U goes up the power supply negative terminal VS of brachium pontis output circuit 200 mutually, and U goes up mutually brachium pontis control signal and with respect to U, goes up mutually brachium pontis input signal and postpone the first Preset Time interval T _uH.

The pulse duration that V goes up brachium pontis control signal is mutually identical with the pulse duration that V goes up brachium pontis input signal mutually, the voltage range that V goes up brachium pontis control signal is mutually [Vs2, Vs2+15V], Vs2 is the voltage that V goes up the power supply negative terminal VS of brachium pontis output circuit 300 mutually, and V goes up mutually brachium pontis control signal and with respect to V, goes up mutually brachium pontis input signal and postpone the second Preset Time interval T _vH.

The pulse duration that W goes up brachium pontis control signal is mutually identical with the pulse duration that W goes up brachium pontis input signal mutually, the voltage range that W goes up brachium pontis control signal is mutually [Vs3, Vs3+15V], Vs3 is the voltage that W goes up the power supply negative terminal VS of brachium pontis output circuit 400 mutually, and W goes up mutually brachium pontis control signal and goes up mutually brachium pontis input signal delay control three Preset Time interval T with respect to W _wH.

U descends the pulse duration of brachium pontis control signal to descend mutually the pulse duration of brachium pontis input signal identical with U mutually, and it is [0,15V] that U descends the voltage range of brachium pontis control signal mutually, and U descends brachium pontis control signal to descend mutually brachium pontis input signal delay control four Preset Time interval T with respect to U mutually _uL.

V descends the pulse duration of brachium pontis control signal to descend mutually the pulse duration of brachium pontis input signal identical with V mutually, and it is [0,15V] that V descends the voltage range of brachium pontis control signal mutually, and V descends brachium pontis control signal to descend mutually brachium pontis input signal delay control five Preset Time interval T with respect to V mutually _vL.

W descends the pulse duration of brachium pontis control signal to descend mutually the pulse duration of brachium pontis input signal identical with W mutually, and it is [0,15V] that W descends the voltage range of brachium pontis control signal mutually, and W descends brachium pontis control signal to descend mutually brachium pontis input signal delay control six Preset Time interval T with respect to W mutually _wL.

In embodiments of the present invention, because U goes up brachium pontis output circuit 200, V mutually, going up mutually brachium pontis output circuit 300 and W to go up mutually brachium pontis output circuit 400 be higher-pressure region circuit, is low-pressure area circuit and U descends brachium pontis output circuit 500, V to descend mutually brachium pontis output circuit 600 and W to descend mutually brachium pontis output circuit 700 mutually.Higher-pressure region circuit generally adopts the high-pressure process that the costs such as BCD or SIO are higher to realize, low-pressure area circuit can adopt the lower-cost low pressure process such as BIPOLAR or COMS to realize reducing the manufacturing cost of whole Intelligent Power Module, yet, the IGBT of take pipe Q1 and IGBT pipe Q4 are example, because U goes up brachium pontis output circuit 200 mutually, are higher-pressure region circuit, it is low-pressure area circuit that U descends brachium pontis output circuit 500 mutually, and both manufacture craft differences likely can cause T _uHwith T _uLunequal, will make like this conducting (or shutoff) of IGBT pipe Q1 asynchronous with the shutoff (or conducting) of IGBT pipe Q4, so, in order can effectively to solve, cause the nonsynchronous problem of upper and lower bridge arm because of different manufacture crafts, U for Intelligent Power Module descends brachium pontis time delay adjustment end UR, V to descend mutually brachium pontis time delay adjustment end VR, W to descend mutually brachium pontis time delay adjustment end WR mutually, and user can access simple RC network or single electric capacity to regulate T at UR, VR and WR according to practical service environment _uL, T _vLand T _wLsize.

In embodiments of the present invention, due to IGBT pipe Q1, IGBT manages Q2, IGBT manages Q3, IGBT manages Q4, IGBT pipe Q5 and IGBT pipe Q6 go up brachium pontis output circuit 200 mutually by U respectively, V goes up brachium pontis output circuit 300 mutually, W goes up brachium pontis output circuit 400 mutually, U descends brachium pontis output circuit 500 mutually, V descends mutually brachium pontis output circuit 600 and W to descend mutually brachium pontis output circuit 700 to drive and controls, so just can effectively reduce the wire jumper length between IGBT pipe and circuit in making Intelligent Power Module, as shown in Figure 5, and then the grid inductance of reduction IGBT pipe, reduce circuit noise, and improve the switching speed of IGBT pipe, to reducing power consumption and the working temperature of Intelligent Power Module, there is remarkable result, and the reduction of working temperature can improve the useful life of components and parts, reduce Intelligent Power Module the probability losing efficacy occurs, thereby the quality of Intelligent Power Module is significantly improved.

Further, as shown in Figure 6, input circuit 100 comprises:

Resistance R 1, Schmidt trigger U1, the first level shifting circuit 101, the first pulse generating circuit 107, resistance R 2, Schmidt trigger U2, second electrical level change-over circuit 102, the second pulse generating circuit 108, resistance R 3, Schmidt trigger U3, the 3rd level shifting circuit 103, the 3rd pulse generating circuit 109, resistance R 4, Schmidt trigger U4, the 4th level shifting circuit 104, not gate U7, not gate U8, resistance R 5, Schmidt trigger U5, the 5th level shifting circuit 105, not gate U9, not gate U10, resistance R 6, Schmidt trigger U6, the 6th level shifting circuit 106, not gate U11 and not gate U12,

The input of Schmidt trigger U1, the input of Schmidt trigger U2, the input of Schmidt trigger U3, the input of Schmidt trigger U4, the input of the input of Schmidt trigger U5 and Schmidt trigger U6 be respectively input circuit 100 first on brachium pontis signal end HIN1, brachium pontis signal end HIN2 on second, brachium pontis signal end HIN3 on the 3rd, first time brachium pontis signal end LIN1, second time brachium pontis signal end LIN2 and the 3rd time brachium pontis signal end LIN3, resistance R 1 is connected between the input and ground of Schmidt trigger U1, resistance R 2 is connected between the input and ground of Schmidt trigger U2, resistance R 3 is connected between the input and ground of Schmidt trigger U3, resistance R 4 is connected between the input and ground of Schmidt trigger U4, resistance R 5 is connected between the input and ground of Schmidt trigger U5, resistance R 6 is connected between the input and ground of Schmidt trigger U6, the output of Schmidt trigger U1 connects the input of the first level shifting circuit 101, the output of the first level shifting circuit 101 connects the input of the first pulse generating circuit 107, the U that the first output of the first pulse generating circuit 107 and the second output are respectively input circuit 100 goes up mutually brachium pontis rising edge pulse output end UHD and goes up mutually brachium pontis trailing edge pulse output end ULD with U, the output of Schmidt trigger U2 connects the input of second electrical level change-over circuit 102, the output of second electrical level change-over circuit 102 connects the input of the second pulse generating circuit 108, the V that the first output of the second pulse generating circuit 108 and the second output are respectively input circuit 100 goes up mutually brachium pontis rising edge pulse output end VHD and goes up mutually brachium pontis trailing edge pulse output end VLD with V, the output of Schmidt trigger U3 connects the input of the 3rd level shifting circuit 103, the output of the 3rd level shifting circuit 103 connects the input of the 3rd pulse generating circuit 109, the W that the first output of the 3rd pulse generating circuit 109 and the second output are respectively input circuit 100 goes up mutually brachium pontis rising edge pulse output end WHD and goes up mutually brachium pontis trailing edge pulse output end WLD with W, the output of Schmidt trigger U4 connects the input of the 4th level shifting circuit 104, the output of the 4th level shifting circuit 104 connects the input of not gate U7, the output of not gate U7 connects the input of not gate U8, the output of not gate U8 is that the U of input circuit 100 descends brachium pontis output ULT mutually, the output of Schmidt trigger U5 connects the input of the 5th level shifting circuit 105, the output of the 5th level shifting circuit 105 connects the input of not gate U9, the output of not gate U9 connects the input of not gate U10, the output of not gate U10 is that the V of input circuit 100 descends brachium pontis output VLT mutually, the output of Schmidt trigger U6 connects the input of the 6th level shifting circuit 106, the output of the 6th level shifting circuit 106 connects the input of not gate U11, the output of not gate U11 connects the input of not gate U12, the output of not gate U11 is that the W of input circuit 100 descends brachium pontis output WLT mutually, the positive power source terminal of Schmidt trigger U1, the power end of the first level shifting circuit 101, the power end of the first pulse generating circuit 107, the positive power source terminal of Schmidt trigger U2, the power end of second electrical level change-over circuit 102, the power end of the second pulse generating circuit 108, the positive power source terminal of Schmidt trigger U3, the power end of the 3rd level shifting circuit 103, the power end of the second pulse generating circuit 109, the positive power source terminal of Schmidt trigger U4, the power end of the 4th level shifting circuit 104, the positive power source terminal of not gate U7, the positive power source terminal of not gate U8, the positive power source terminal of Schmidt trigger U5, the power end of the 5th level shifting circuit 105, the positive power source terminal of not gate U9, the positive power source terminal of not gate U10, the positive power source terminal of Schmidt trigger U6, the power end of the 6th level shifting circuit 106, the positive power source terminal of the positive power source terminal of not gate U11 and not gate U12 connects formed contact altogether altogether as the power end VCC of input circuit 100, the negative power end of Schmidt trigger U1, the earth terminal of the first level shifting circuit 101, the earth terminal of the first pulse generating circuit 107, the negative power end of Schmidt trigger U2, the earth terminal of second electrical level change-over circuit 102, the earth terminal of the second pulse generating circuit 108, the negative power end of Schmidt trigger U3, the earth terminal of the 3rd level shifting circuit 103, the earth terminal of the second pulse generating circuit 109, the negative power end of Schmidt trigger U4, the earth terminal of the 4th level shifting circuit 104, the negative power end of not gate U7, the negative power end of not gate U8, the negative power end of Schmidt trigger U5, the earth terminal of the 5th level shifting circuit 105, the negative power end of not gate U9, the negative power end of not gate U10, the negative power end of Schmidt trigger U6, the earth terminal of the 6th level shifting circuit 106, the negative power end of the negative power end of not gate U11 and not gate U12 connects formed altogether contact ground connection and altogether as the earth terminal GND of input circuit 100.

Wherein, the voltage of the power end VCC of input circuit 100 can be 15V, the highest 20V that is no more than.Input circuit 100 first on when on brachium pontis signal end HIN2, the 3rd, brachium pontis signal end HIN3, first time brachium pontis signal end LIN1, second time brachium pontis signal end LIN2 and the 3rd time brachium pontis signal end LIN3 are unsettled on brachium pontis signal end HIN1, second, resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5 and resistance R 6 are for guaranteeing ground connection reliably, avoid the generation of misoperation, and resistance can specifically be elected 167 ohm as.

The internal structure of Schmidt trigger U1, Schmidt trigger U2, Schmidt trigger U3, Schmidt trigger U4, Schmidt trigger U5 and Schmidt trigger U6 is identical, all to vibrate avoiding for making input signal produce certain sluggishness, particularly, high-level threshold voltage representative value can be set to 2.1V, and low level threshold voltage representative value can be set to 1.2V.

The internal structure of the first level shifting circuit 101, second electrical level change-over circuit 102, the 3rd level shifting circuit 103, the 4th level shifting circuit 104, the 5th level shifting circuit 105 and the 6th level shifting circuit 106 is identical and be low-pressure area level shifting circuit, being respectively used to voltage range is [0,5V] U go up mutually brachium pontis input signal, V and go up mutually brachium pontis input signal, W and go up mutually brachium pontis input signal, U and descend mutually brachium pontis input signal, V to descend mutually brachium pontis input signal and W to descend mutually brachium pontis input signal to convert voltage range to for the logical signal of [0,15V].

The internal structure of the first pulse generating circuit 107, the second pulse generating circuit 108 and the 3rd pulse generating circuit 109 is identical, the rising edge that is respectively used to the logical signal exported at the first level shifting circuit 101, second electrical level change-over circuit 102 and the 3rd level shifting circuit 103 respectively produces a narrow pulse signal, and by this narrow pulse signal (be U go up mutually brachium pontis narrow pulse signal, V go up brachium pontis narrow pulse signal mutually and W goes up brachium pontis narrow pulse signal mutually) respectively in UHD, VHD and WHD output.The width range of narrow pulse signal can be [200ns, 300ns], and ns is nanosecond.

For not gate U7, not gate U8, not gate U9, not gate U10, not gate U11 and not gate U12, take not gate U7 and not gate U8 as example describes, after not gate U7 and a not gate U8 output buffer of composition the logical signal that the 4th level shifting circuit 104 is exported cushion delay process, export.In not gate U7, the breadth length ratio of PMOS pipe can be set to 10 μ m/3.5 μ m, and the breadth length ratio of the NMOS pipe in not gate U7 can be set to 5 μ m/3.5 μ m, and the size of not gate U8 can be set to 3 times of size of not gate U7.In like manner, not gate U9 is identical with the type selecting of not gate U11 NAND gate U7, and not gate U10 is identical with the type selecting of not gate U12 NAND gate U8.

Because the power end VCC voltage of input circuit 100 is up to 20V, so input circuit 100 can use the BIPOLAR of low pressure or COMS flow technique to make completely, thereby reduce manufacturing cost.

In addition; in other embodiments of the invention; in order to guarantee input circuit 100, in normal power supply voltage range, work; input circuit 100 inside also comprise a under-voltage protecting circuit; when the voltage of the power end VCC of input circuit 100 is during lower than a certain specific voltage value; under-voltage protecting circuit can quit work by control inputs circuit 100, thereby input circuit 100 is realized to under-voltage protection.

Further, U goes up mutually brachium pontis output circuit 200 and V and goes up mutually brachium pontis output circuit 300 and W to go up mutually the internal circuit configuration of brachium pontis output circuit 400 identical, the U of take below goes up mutually brachium pontis output circuit 200 and its internal structure is described as example, and as shown in Figure 7, U goes up mutually brachium pontis output circuit 200 and comprises:

High pressure DMOS pipe Q11, high pressure DMOS pipe Q12, resistance R 7, resistance R 8, diode D7, diode D8, not gate U13, not gate U14, rest-set flip-flop U15, not gate U16, PMOS pipe Q13 and NMOS pipe Q14;

The grid of high pressure DMOS pipe Q11 is respectively with the grid of high pressure DMOS pipe Q12 rising edge input HDIN and the trailing edge input LDIN that U goes up brachium pontis output circuit 200 mutually, it is the earth terminal GND that U goes up brachium pontis output circuit 200 mutually that the source electrode of the source electrode of high pressure DMOS pipe Q11 and substrate and high pressure DMOS pipe Q12 and substrate connect formed common contact altogether, it is the power supply anode VB that U goes up brachium pontis output circuit 200 mutually that the first end of resistance R 7 connects formed contact altogether altogether with the first end of resistance R 8 and the source electrode of PMOS pipe Q13, the second end of resistance R 7 and the high pressure DMOS pipe drain electrode of Q11 and the negative electrode of diode D8 are connected to the input of not gate U14 altogether, the second end of resistance R 8 and the high pressure DMOS pipe drain electrode of Q12 and the negative electrode of diode D7 are connected to the input of not gate U13 altogether, the output of the output of not gate U13 and not gate U14 is connected respectively first input end R and the second input S of rest-set flip-flop U15, the in-phase output end Q of rest-set flip-flop U15 connects the input of not gate U16, the output of not gate U16 is connected with the grid of NMOS pipe Q14 with the grid of PMOS pipe Q13 simultaneously, the substrate of PMOS pipe Q13 is connected with source electrode, it is the output HO that U goes up brachium pontis output circuit 200 mutually that the drain electrode of the drain electrode of PMOS pipe Q13 and NMOS pipe Q14 connects formed common contact altogether, the substrate of NMOS pipe Q14 is connected with source electrode, it is the power supply negative terminal VS that U goes up brachium pontis output circuit 200 mutually that the anode of diode D7 connects formed contact altogether altogether with the anode of diode D8 and the source electrode of NMOS pipe Q14.

When U goes up mutually the rising edge input HDIN of brachium pontis output circuit 200 and trailing edge input LDIN and is low level, high pressure DMOS pipe Q11 and high pressure DMOS pipe Q12 are in cut-off state, the drain voltage of high pressure DMOS pipe Q11 and high pressure DMOS pipe Q12 reaches as high as 620V, and the highest voltage that need to bear 620V between drain electrode and source electrode.

When HDIN is high level, when LDIN is low level, high pressure DMOS pipe Q11 conducting, high pressure DMOS pipe Q12 cut-off, clamping action due to diode D8, the drain voltage of high pressure DMOS pipe Q11 is (Vs1-0.7V), at this moment, the input of not gate U14 is low level with respect to VS, not gate U14 output high level is to the second input S of rest-set flip-flop U15, simultaneously, due to high pressure DMOS pipe Q12 cut-off, the input of not gate U13 is high level to VS, so not gate U13 output low level is to the second input R of rest-set flip-flop U15, so, the in-phase output end Q output high level of rest-set flip-flop U15, this high level is low level after not gate U16, PMOS pipe Q13 conducting, and NMOS pipe Q14 cut-off, so HO exports high level.HO because possessing signal, rest-set flip-flop keeps function, so even if after this HDIN and LDIN are low level simultaneously, can keep high level constant.

When HDIN is low level, and LDIN is while being high level, high pressure DMOS pipe Q11 cut-off, high pressure DMOS pipe Q12 conducting, clamping action due to diode D7, the drain voltage of high pressure DMOS pipe Q12 is (Vs1-0.7V), at this moment, the input of not gate U13 is low level with respect to VS, not gate U13 output high level is to the first input end R of rest-set flip-flop, simultaneously, due to high pressure DMOS pipe Q11 cut-off, the input of not gate U14 is high level with respect to VS, therefore, not gate U14 output low level is to the second input S of rest-set flip-flop, so, the in-phase output end Q output low level of rest-set flip-flop, this low level is high level after not gate U16, PMOS pipe Q13 cut-off, and NMOS pipe Q14 conducting, so HO output low level.HO because possessing signal, rest-set flip-flop keeps function, so even if after this HDIN and LDIN are low level simultaneously, can keep low level constant.

In actual applications, the breadth length ratio of the PMOS pipe in not gate U16 can be set to 60 μ m/5 μ m, the breadth length ratio of the NMOS pipe in not gate U16 can be set to 30 μ m/5 μ m, if subsequent drive is the IGBT pipe of 15A, the breadth length ratio of PMOS pipe Q13 can consider to be set to 600 μ m/10 μ m, and the breadth length ratio of NMOS pipe Q14 can consider to be set to 300 μ m/10 μ m.

In like manner, V goes up internal structure that brachium pontis output circuit 300 and W go up brachium pontis output circuit 400 mutually also as U goes up brachium pontis output circuit 200 mutually mutually, therefore repeats no more.

Because U goes up mutually, brachium pontis output circuit 200, V go up brachium pontis output circuit 300 mutually and W goes up the 400 the highest meetings of brachium pontis output circuit mutually to voltage more than earth terminal GND generation 600V separately, therefore need to carry out flow making by High voltage BCD process or high pressure SOI technique.

In addition; in other embodiments of the invention; U goes up mutually brachium pontis output circuit 200 and also comprises a under-voltage protecting circuit; the power supply anode VB that goes up mutually brachium pontis output circuit 200 as U is with respect to the voltage of power supply negative terminal VS during lower than a certain specific voltage value, and under-voltage protecting circuit can be controlled U and go up mutually brachium pontis output circuit 200 and quit work to realize the under-voltage protection of U being gone up mutually to brachium pontis output circuit 200.

Further, U descends brachium pontis output circuit 500, V to descend mutually brachium pontis output circuit 600 and W to descend mutually the internal circuit configuration of brachium pontis output circuit 700 identical mutually, the U of take below descends brachium pontis output circuit 500 its internal structure to be described as example mutually, and as shown in Figure 8, U descends brachium pontis output circuit 500 to comprise mutually:

Not gate U17, PMOS pipe Q15 and NMOS pipe Q16;

The input of not gate U17 is the input LTIN that U descends brachium pontis output circuit 500 mutually, the output of not gate U17 is connected with the grid of NMOS pipe Q16 with the grid of PMOS pipe Q15 simultaneously, the source electrode of PMOS pipe Q15 is respectively with NMOS pipe Q16 source electrode power end VCC and the earth terminal GND that U descends brachium pontis output circuit 500 mutually, the substrate of PMOS pipe Q15 is connected with source electrode, it is the output LO that U descends brachium pontis output circuit 500 mutually that the drain electrode of the drain electrode of PMOS pipe Q15 and NMOS pipe Q16 connects formed common contact altogether, and the substrate of NMOS pipe Q16 is connected with source electrode.

Wherein, the consistent size of the size of not gate U17 and aforesaid not gate U16, the size of PMOS pipe Q15 and aforesaid PMOS pipe Q13's is measure-alike, and the size of NMOS pipe Q16 is also identical with the size of aforesaid NMOS pipe Q14.

In embodiments of the present invention, because U goes up brachium pontis output circuit 200 and V mutually, go up mutually the structure that brachium pontis output circuit 300 and W go up brachium pontis output circuit 400 mutually and descend mutually brachium pontis output circuit 500, V to descend mutually brachium pontis output circuit 600 and W to descend mutually the complex structure of brachium pontis output circuit 700 than U, the U of take goes up mutually brachium pontis output circuit 200 and descends mutually brachium pontis output circuit 500 as example with U, and it (is T that U goes up the delay time that brachium pontis control signal goes up brachium pontis input signal mutually with respect to U mutually _uH) can being greater than U, to descend mutually brachium pontis control signal to descend mutually brachium pontis input signal with respect to U (be T _uL), in order to make the signal delay of upper and lower bridge arm keep synchronous so that the IGBT pipe of upper and lower bridge arm maintains the accuracy of alternate conduction, user can descend at the U of Intelligent Power Module brachium pontis time delay adjustment end UR in actual applications mutually, V descends brachium pontis time delay adjustment end VR mutually, W descends brachium pontis time delay adjustment end WR to connect the first end of an electric capacity mutually, the second end ground connection of electric capacity, and then can regulate the delay time of lower brachium pontis control signal, and for the size of electric capacity, need to be determined according to the periphery wiring of Intelligent Power Module, the span of the capacitance of electric capacity can be [10pF, 20pF].

In sum, the embodiment of the present invention by adopting input circuit in Intelligent Power Module, U goes up brachium pontis output circuit mutually, V goes up brachium pontis output circuit mutually, W goes up brachium pontis output circuit mutually, U descends brachium pontis output circuit mutually, V descends brachium pontis output circuit and W to descend mutually brachium pontis output circuit mutually, each IGBT pipe is driven by circuit independently, effectively shortened the wire jumper between circuit and the grid of IGBT pipe, reduced grid inductance, reduced circuit noise, and then the switching speed of raising IGBT pipe, and be consistent and not conducting simultaneously the switching time that makes the IGBT pipe of upper and lower bridge arm, thereby promoted the fail safe of Intelligent Power Module.And because U descends brachium pontis output circuit, V to descend mutually brachium pontis output circuit and W to descend mutually brachium pontis output circuit mutually, be low-pressure area circuit, its technique cost of manufacture is lower, can significantly reduce the manufacturing cost of whole Intelligent Power Module.

The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims

1. an Intelligent Power Module, comprises IGBT pipe Q1, fast recovery diode D1, IGBT pipe Q2, fast recovery diode D2, IGBT pipe Q3, fast recovery diode D3, IGBT pipe Q4, fast recovery diode D4, IGBT pipe Q5, fast recovery diode D5, IGBT pipe Q6 and fast recovery diode D6, the described IGBT pipe drain electrode of Q1 and the negative electrode of described fast recovery diode D1, the drain electrode of described IGBT pipe Q2, the drain electrode of described fast recovery diode D2, the described IGBT pipe drain electrode of Q3 and the negative electrode of described fast recovery diode D3 connect formed contact altogether altogether as the high voltage input of described Intelligent Power Module, the described IGBT pipe source electrode of Q4 and the anode of described fast recovery diode D4 connect formed contact altogether altogether as the U phase low reference voltage end of described Intelligent Power Module, the described IGBT pipe source electrode of Q5 and the anode of described fast recovery diode D5 connect formed contact altogether altogether as the V phase low reference voltage end of described Intelligent Power Module, the described IGBT pipe source electrode of Q6 and the anode of described fast recovery diode D6 connect formed contact altogether altogether as the W phase low reference voltage end of described Intelligent Power Module, it is characterized in that, described Intelligent Power Module also comprises:

2. Intelligent Power Module as claimed in claim 1, it is characterized in that, described U goes up mutually brachium pontis input signal, described V and goes up mutually brachium pontis input signal, described W and go up mutually brachium pontis input signal, described U to descend mutually brachium pontis input signal, described V to descend mutually brachium pontis input signal and described W to descend mutually the voltage range of brachium pontis input signal be [0,5V].

3. Intelligent Power Module as claimed in claim 1, is characterized in that, the pulse duration that described U goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that described U goes up brachium pontis input signal mutually, and voltage range is [0,15V];

The pulse duration that described W goes up brachium pontis narrow pulse signal is mutually less than the pulse duration that described W goes up brachium pontis input signal mutually, and voltage range is [0,15V].

4. Intelligent Power Module as claimed in claim 1, is characterized in that, it is [0 that described U descends the voltage range of brachium pontis pulse signal mutually, 15V], it is [0,15V] that described V descends the voltage range of brachium pontis pulse signal mutually, it is [0,15V] that described W descends the voltage range of brachium pontis pulse signal mutually.

5. Intelligent Power Module as claimed in claim 1, it is characterized in that, the pulse duration that described U goes up brachium pontis control signal is mutually identical with the pulse duration that described U goes up brachium pontis input signal mutually, the voltage range that described U goes up brachium pontis control signal is mutually [Vs1, Vs1+15V], Vs1 is the voltage that described U goes up the power supply negative terminal of brachium pontis output circuit mutually, and described U goes up mutually brachium pontis control signal and with respect to described U, goes up mutually brachium pontis input signal and postpone the first Preset Time interval;

The pulse duration that described W goes up brachium pontis control signal is mutually identical with the pulse duration that described W goes up brachium pontis input signal mutually, the voltage range that described W goes up brachium pontis control signal is mutually [Vs3, Vs3+15V], Vs is the voltage that described W goes up the power supply negative terminal of brachium pontis output circuit mutually, and described W goes up mutually brachium pontis control signal and goes up mutually brachium pontis input signal delay control three Preset Time intervals with respect to described W;

6. Intelligent Power Module as claimed in claim 1, is characterized in that, described input circuit comprises:

Resistance R 1, Schmidt trigger U1, the first level shifting circuit, the first pulse generating circuit, resistance R 2, Schmidt trigger U2, second electrical level change-over circuit, the second pulse generating circuit, resistance R 3, Schmidt trigger U3, the 3rd level shifting circuit, the 3rd pulse generating circuit, resistance R 4, Schmidt trigger U4, the 4th level shifting circuit, not gate U7, not gate U8, resistance R 5, Schmidt trigger U5, the 5th level shifting circuit, not gate U9, not gate U10, resistance R 6, Schmidt trigger U6, the 6th level shifting circuit, not gate U11 and not gate U12,

The input of described Schmidt trigger U1, the input of described Schmidt trigger U2, the input of described Schmidt trigger U3, the input of described Schmidt trigger U4, the input of the input of described Schmidt trigger U5 and described Schmidt trigger U6 be respectively described input circuit first on brachium pontis signal end, brachium pontis signal end on second, brachium pontis signal end on the 3rd, first time brachium pontis signal end, second time brachium pontis signal end and the 3rd time brachium pontis signal end, described resistance R 1 is connected between the input and ground of described Schmidt trigger U1, described resistance R 2 is connected between the input and ground of described Schmidt trigger U2, described resistance R 3 is connected between the input and ground of described Schmidt trigger U3, described resistance R 4 is connected between the input and ground of described Schmidt trigger U4, described resistance R 5 is connected between the input and ground of described Schmidt trigger U5, described resistance R 6 is connected between the input and ground of described Schmidt trigger U6, the output of described Schmidt trigger U1 connects the input of the first level shifting circuit, the output of described the first level shifting circuit connects the input of described the first pulse generating circuit, the U that the first output of described the first pulse generating circuit and the second output are respectively described input circuit goes up mutually brachium pontis rising edge pulse output end and goes up mutually brachium pontis trailing edge pulse output end with U, the output of described Schmidt trigger U2 connects the input of described second electrical level change-over circuit, the output of described second electrical level change-over circuit connects the input of described the second pulse generating circuit, the V that the first output of described the second pulse generating circuit and the second output are respectively described input circuit goes up mutually brachium pontis rising edge pulse output end and goes up mutually brachium pontis trailing edge pulse output end with V, the output of described Schmidt trigger U3 connects the input of described the 3rd level shifting circuit, the output of described the 3rd level shifting circuit connects the input of described the 3rd pulse generating circuit, the W that the first output of described the 3rd pulse generating circuit and the second output are respectively described input circuit goes up mutually brachium pontis rising edge pulse output end and goes up mutually brachium pontis trailing edge pulse output end with W, the output of described Schmidt trigger U4 connects the input of described the 4th level shifting circuit, the output of described the 4th level shifting circuit connects the input of described not gate U7, the output of described not gate U7 connects the input of described not gate U8, the output of described not gate U8 is that the U of described input circuit descends brachium pontis output mutually, the output of described Schmidt trigger U5 connects the input of described the 5th level shifting circuit, the output of described the 5th level shifting circuit connects the input of described not gate U9, the output of described not gate U9 connects the input of described not gate U10, the output of described not gate U10 is that the V of described input circuit descends brachium pontis output mutually, the output of described Schmidt trigger U6 connects the input of described the 6th level shifting circuit, the output of described the 6th level shifting circuit connects the input of described not gate U11, the output of described not gate U11 connects the input of described not gate U12, the output of described not gate U11 is that the W of described input circuit descends brachium pontis output mutually, the positive power source terminal of described Schmidt trigger U1, the power end of described the first level shifting circuit, the power end of described the first pulse generating circuit, the positive power source terminal of described Schmidt trigger U2, the power end of described second electrical level change-over circuit, the power end of described the second pulse generating circuit, the positive power source terminal of described Schmidt trigger U3, the power end of described the 3rd level shifting circuit, the power end of described the second pulse generating circuit, the positive power source terminal of described Schmidt trigger U4, the power end of described the 4th level shifting circuit, the positive power source terminal of described not gate U7, the positive power source terminal of described not gate U8, the positive power source terminal of described Schmidt trigger U5, the power end of described the 5th level shifting circuit, the positive power source terminal of described not gate U9, the positive power source terminal of described not gate U10, the positive power source terminal of described Schmidt trigger U6, the power end of described the 6th level shifting circuit, the positive power source terminal of the positive power source terminal of described not gate U11 and described not gate U12 connects formed contact altogether altogether as the power end of described input circuit, the negative power end of described Schmidt trigger U1, the earth terminal of described the first level shifting circuit, the earth terminal of described the first pulse generating circuit, the negative power end of described Schmidt trigger U2, the earth terminal of described second electrical level change-over circuit, the earth terminal of described the second pulse generating circuit, the negative power end of described Schmidt trigger U3, the earth terminal of described the 3rd level shifting circuit, the earth terminal of described the second pulse generating circuit, the negative power end of described Schmidt trigger U4, the earth terminal of described the 4th level shifting circuit, the negative power end of described not gate U7, the negative power end of described not gate U8, the negative power end of described Schmidt trigger U5, the earth terminal of described the 5th level shifting circuit 105, the negative power end of described not gate U9, the negative power end of described not gate U10, the negative power end of described Schmidt trigger U6, the earth terminal of described the 6th level shifting circuit, the negative power end of the negative power end of described not gate U11 and described not gate U12 connects formed altogether contact ground connection and altogether as the earth terminal of described input circuit.

7. Intelligent Power Module as claimed in claim 1, is characterized in that, described U goes up mutually brachium pontis output circuit and described V and goes up mutually brachium pontis output circuit and described W to go up mutually the internal circuit configuration of brachium pontis output circuit identical;

Described U goes up mutually brachium pontis output circuit and comprises:

The grid of described high pressure DMOS pipe Q11 is respectively with the grid of described high pressure DMOS pipe Q12 rising edge input and the trailing edge input that described U goes up brachium pontis output circuit mutually, it is the earth terminal that described U goes up brachium pontis output circuit mutually that the source electrode of the source electrode of described high pressure DMOS pipe Q11 and substrate and described high pressure DMOS pipe Q12 and substrate connect formed common contact altogether, it is the power supply anode that described U goes up brachium pontis output circuit mutually that the first end of described resistance R 7 connects formed contact altogether altogether with the first end of described resistance R 8 and the source electrode of described PMOS pipe Q13, the second end of described resistance R 7 and the described high pressure DMOS pipe drain electrode of Q11 and the negative electrode of described diode D8 are connected to the input of described not gate U14 altogether, the second end of described resistance R 8 and the described high pressure DMOS pipe drain electrode of Q12 and the negative electrode of described diode D7 are connected to the input of described not gate U13 altogether, the output of the output of described not gate U13 and described not gate U14 is connected respectively first input end and the second input of described rest-set flip-flop U15, the in-phase output end of described rest-set flip-flop U15 connects the input of described not gate U16, the output of described not gate U16 is connected with the grid of described NMOS pipe Q14 with the grid of described PMOS pipe Q13 simultaneously, the substrate of described PMOS pipe Q13 is connected with source electrode, it is the output that described U goes up brachium pontis output circuit mutually that the drain electrode of the drain electrode of described PMOS pipe Q13 and described NMOS pipe Q14 connects formed common contact altogether, the substrate of described NMOS pipe Q14 is connected with source electrode, it is the power supply negative terminal that described U goes up brachium pontis output circuit mutually that the anode of described diode D7 connects formed contact altogether altogether with the anode of described diode D8 and the source electrode of described NMOS pipe Q14.

8. Intelligent Power Module as claimed in claim 1, is characterized in that, described U descends brachium pontis output circuit, described V to descend mutually brachium pontis output circuit and described W to descend mutually the internal circuit configuration of brachium pontis output circuit identical mutually;

Described U descends brachium pontis output circuit to comprise mutually:

Not gate U17, PMOS pipe Q15 and NMOS pipe Q16;

The input of described not gate U17 is the input that described U descends brachium pontis output circuit mutually, the output of described not gate is connected with the grid of described NMOS pipe Q16 with the grid of described PMOS pipe Q15 simultaneously, the source electrode of described PMOS pipe Q15 is respectively with described NMOS pipe Q16 source electrode power end and the earth terminal that described U descends brachium pontis output circuit mutually, the substrate of described PMOS pipe Q15 is connected with source electrode, it is the output that described U descends brachium pontis output circuit mutually that the drain electrode of the drain electrode of described PMOS pipe Q15 and described NMOS pipe Q16 connects formed common contact altogether, the substrate of described NMOS pipe Q16 is connected with source electrode.