CN103996715A - 一种横向双扩散金属氧化物半导体场效应管 - Google Patents
一种横向双扩散金属氧化物半导体场效应管 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 238000009792 diffusion process Methods 0.000 title claims abstract description 11
- 230000005669 field effect Effects 0.000 title claims abstract description 11
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 11
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 11
- 238000009413 insulation Methods 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- 239000011810 insulating material Substances 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 239000002800 charge carrier Substances 0.000 abstract 2
- 238000009825 accumulation Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000002708 enhancing effect Effects 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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Abstract
本发明提出了一种具有凹凸起伏的表面结构的新型半导体器件,以实现满足一定击穿电压的条件下,获得尽可能低的导通电阻。本发明从源区到漏区通过刻蚀形成凹凸起伏的表面结构,在刻蚀槽的侧壁沟道也形成了反型层积累以及侧壁的漂移区也形成了多数载流子,从而降低了沟道区的电阻和漂移区的电阻。并且将栅极扩展至漏端,完全覆盖在漂移区上面,使器件开态时漂移区表面形成多数载流子的积累,有效的降低了导通电阻。
Description
技术领域
本发明涉及半导体器件领域,特别是涉及一种横向双扩散金属氧化物半导体场效应管。
背景技术
近年来在PIC(power integrated circuit)领域低压横向功率器件受到了广泛关注。横向功率器件为了与低压电路在工艺上更好地兼容,设计具有薄外延层且能满足一定耐压的新型LDMOS,并且获得更低的导通电阻从而降低功耗,是目前功率半导体技术的一个重要发展方向,而LDMOS类器件存在的主要问题是关态击穿电压(BV)与开态导通电阻(Ron)之间的矛盾。所以在满足一定击穿电压的条件下,获得尽可能低的导通电阻以降低导通损耗就成为国内外研究的热点。
发明内容
本发明提出了一种具有凹凸起伏的表面结构的新型半导体器件,以实现满足一定击穿电压的条件下,获得尽可能低的导通电阻。
本发明的技术方案如下:
该横向双扩散金属氧化物半导体场效应管,包括:
半导体材料的衬底;
位于所述衬底上外延的漂移区;
分别位于漂移区上两端的基区和漏区;
位于所述基区表面的源区;
位于源区和漏区之间、基区和漂移区的整体表面上的栅绝缘层;
位于栅绝缘层表面的栅极;
其特征在于:
漂移区表面上从源区至漏区整体刻蚀成条状的凹凸起伏的表面结构(即条形凹槽与条形凸台相间平行排布)。
基于上述基本方案,本发明还进一步做如下优化限定和改进:
上述条状的凹凸起伏的表面结构中,所有条形凹槽的深度均相同,宽度均相同。
上述条状的凹凸起伏的表面结构中,设条形凸台的上表面和侧面为一区,条形凹槽的底面为二区,则漂移区在一区和二区的掺杂类型相同。
上述漂移区在一区的掺杂浓度大于漂移区在二区的掺杂浓度。
上述条状的凹凸起伏的表面结构中,条形凸台有两个或两个以上。
上述栅极以及栅绝缘层完全(扩展)覆盖漂移区表面。
本发明技术方案的有益效果如下:
本发明的结构由于从源区到漏区的通过刻蚀形成的凹凸起伏的表面结构,在刻蚀槽的侧面也形成了多数载流子(或沟道反型层)积累,降低了沟道区的电阻和漂移区的电阻。由于扩展的栅极完全覆盖子在漂移区的上方,使器件开态时漂移区表面形成多数载流子-电子的积累,积累的电子层提供了低的导电通道。沿纵向和横向的电场调制作用(增强的电荷补偿作用),使器件关断时承受一定击穿电压的漂移区浓度增加。
附图说明
图1为本发明实施例中LDMOS的结构正视图(不包含凹凸起伏的表面结构);
图2为本发明实施例中LDMOS的三维结构示意图;
图3为本发明实施例中LDMOS的侧视示意图。
附图标号说明:
1-源区;2-栅极;3-扩展覆盖在漂移区上面的栅极;4-漂移区;5-漏区;6-衬底;7-基区;41-漂移区一区(上表面、侧面);42-漂移区二区;8-条形凹槽的深度;9-条形凸台宽度;10-条形凹槽的宽度。
具体实施方式
下面结合附图和实施例,对本发明作详细的示例说明,该实施例并非是对本发明技术方案所确定范围的限制。
如图1、图2和图3所示,本发明的LDMOS包括:
半导体材料衬底6;
位于衬底上外延表面的漂移区4;
分别位于漂移区上两端的基区7和漏区5;
位于基区表面的源区1;
源区与漂移区之间为导电沟道,位于栅电极2的正下方;
导电沟道与2栅电极之间为栅氧化层;
栅电极拓展覆盖在漂移区上方的电极;
自源区至漏区整体刻蚀成条状的凹凸起伏的表面结构。
图3中,8、9和10分别表示凹凸起伏的硅表面刻蚀的深度、条形凸台宽度和条形凹槽的宽度。
由于从源区1到漏区5的凹凸起伏的表面结构,在刻蚀槽的侧面也形成了多数载流子(或沟道反型层)积累,这进一步降低了沟道区的电阻和漂移区的电阻。
优化设置漂移区4凹凸起伏的表面结构硅表面刻蚀的深度、条形凸台宽度和条形凹槽的宽度,进一步降低导通电阻。
通过扩展栅极3,使器件开态时漂移区4表面形成多数载流子-电子的积累,积累的电子层提供了低的导电通道。沿纵向与横向的电场调制作用(增强的电荷补偿作用),使器件关断时承受一定击穿电压的漂移区浓度增加。
本发明将从源区到漏区的导电层(也包含了栅绝缘层)刻蚀成条状的凹凸起伏的表面结构,形成凸出来的上表面和侧壁、凹下去的底面,可以设条形凸台的上表面和侧面为一区,条形凹槽的底面为二区,相应的,沟道区也就可以分为沟道区一区、沟道区二区,漂移区也就可以分为漂移区一区、漂移区二区,从而相对于同样宽度的传统平面的器件,增加等效沟道与等效漂移区的宽度。而且,将具有凹凸起伏表面结构的栅极在较薄的场氧化层上一直扩展到漏区。扩展栅极的电场调制作用,在漂移区一区41、漂移区二区42表面都形成多数载流子积累,积累的多数载流子大大降低了漂移区的导通电阻。并且在沟道一区、沟道二区表面等效反型层的浓度相比于平面沟道表面反型层的浓度增加,从而也大大降低了沟道的导通电阻。这种凹凸起伏的表面结构相比于传统平面结构,可获得非常低的导通电阻,从而显著地降低了器件的功耗。
具体可以通过以下步骤形成本发明的LDMOS:
1)半导体材料(包括Si、SiC和GaAs等)的衬底上生长掺杂的N型漂移区。
2)在漂移区上一端形成P型基区,并在基区上形成N型的源区。
3)在漂移区另一端形成P型重掺杂漏区。
4)通过反应离子刻蚀技术,从源区到漏区形成的凹凸起伏的表面结构。
5)相应的,在凹凸起伏的沟道上面形成栅氧化层。
6)并形成扩展的栅极。
当然,本发明中的LDMOS也可以为P沟道,其结构与N沟道LDMOS相同,在此不再赘述。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和替换,这些改进和替换也应视为本发明的保护范围。
Claims (6)
1.一种横向双扩散金属氧化物半导体场效应管,包括:
半绝缘材料的衬底;
位于所述衬底上外延的漂移区;
分别位于漂移区上两端的基区和漏区;
位于所述基区表面的源区;
位于源区和漏区之间、基区和漂移区的整体表面上的栅绝缘层;
位于栅绝缘层表面的栅极;
其特征在于:
漂移区表面上从源区至漏区整体刻蚀成条状的凹凸起伏的表面结构。
2.根据权利要求1所述的横向双扩散金属氧化物半导体场效应管,其特征在于:所述条状的凹凸起伏的表面结构中,所有条形凹槽的深度均相同,宽度均相同。
3.根据权利要求1所述的横向双扩散金属氧化物半导体场效应管,其特征在于:所述条状的凹凸起伏的表面结构中,设条形凸台的上表面和侧面为一区,条形凹槽的底面为二区,则漂移区在一区和二区的掺杂类型相同。
4.根据权利要求3所述的横向双扩散金属氧化物半导体场效应管,其特征在于:漂移区在一区的掺杂浓度大于漂移区在二区的掺杂浓度。
5.根据权利要求1-4任一所述的横向双扩散金属氧化物半导体场效应管,其特征在于:所述条状的凹凸起伏的表面结构中,条形凸台有两个或两个以上。
6.根据权利要求1-4任一所述的横向双扩散金属氧化物半导体场效应管,其特征在于:所述栅极以及栅绝缘层完全覆盖漂移区表面。
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107564957A (zh) * | 2016-06-30 | 2018-01-09 | 英飞凌科技股份有限公司 | 具有完全耗尽沟道区域的功率半导体器件 |
CN110808287A (zh) * | 2019-10-31 | 2020-02-18 | 东南大学 | 一种优品质因数横向双扩散金属氧化物半导体器件 |
US10950718B2 (en) | 2017-12-15 | 2021-03-16 | Infineon Technologies Dresden GmbH & Co. KG | IGBT with fully depletable n- and p-channel regions |
US11171202B2 (en) | 2016-06-30 | 2021-11-09 | Infineon Technologies Ag | Power semiconductor device having fully depleted channel regions |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080296694A1 (en) * | 2005-12-22 | 2008-12-04 | Nxp B.V. | Semiconductor Device with Field Plate and Method |
CN102709190A (zh) * | 2012-05-24 | 2012-10-03 | 上海宏力半导体制造有限公司 | Ldmos场效应晶体管及其制作方法 |
CN103515443A (zh) * | 2013-09-16 | 2014-01-15 | 电子科技大学 | 一种超结功率器件及其制造方法 |
-
2014
- 2014-05-29 CN CN201410235457.0A patent/CN103996715A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080296694A1 (en) * | 2005-12-22 | 2008-12-04 | Nxp B.V. | Semiconductor Device with Field Plate and Method |
CN102709190A (zh) * | 2012-05-24 | 2012-10-03 | 上海宏力半导体制造有限公司 | Ldmos场效应晶体管及其制作方法 |
CN103515443A (zh) * | 2013-09-16 | 2014-01-15 | 电子科技大学 | 一种超结功率器件及其制造方法 |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107564957A (zh) * | 2016-06-30 | 2018-01-09 | 英飞凌科技股份有限公司 | 具有完全耗尽沟道区域的功率半导体器件 |
US10672767B2 (en) | 2016-06-30 | 2020-06-02 | Infineon Technologies Ag | Power semiconductor device having different channel regions |
CN107564957B (zh) * | 2016-06-30 | 2020-12-29 | 英飞凌科技股份有限公司 | 具有完全耗尽沟道区域的功率半导体器件 |
US11171202B2 (en) | 2016-06-30 | 2021-11-09 | Infineon Technologies Ag | Power semiconductor device having fully depleted channel regions |
US10950718B2 (en) | 2017-12-15 | 2021-03-16 | Infineon Technologies Dresden GmbH & Co. KG | IGBT with fully depletable n- and p-channel regions |
CN110808287A (zh) * | 2019-10-31 | 2020-02-18 | 东南大学 | 一种优品质因数横向双扩散金属氧化物半导体器件 |
CN110808287B (zh) * | 2019-10-31 | 2023-10-17 | 东南大学 | 一种优品质因数横向双扩散金属氧化物半导体器件 |
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