CN103857197A - Circuit board and manufacturing method of circuit board - Google Patents

Circuit board and manufacturing method of circuit board Download PDF

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Publication number
CN103857197A
CN103857197A CN201210511978.5A CN201210511978A CN103857197A CN 103857197 A CN103857197 A CN 103857197A CN 201210511978 A CN201210511978 A CN 201210511978A CN 103857197 A CN103857197 A CN 103857197A
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CN
China
Prior art keywords
hole section
perforate
conductive pad
circuit board
dielectric layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201210511978.5A
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Chinese (zh)
Inventor
胡文宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Zhending Technology Co Ltd
Zhen Ding Technology Co Ltd
Original Assignee
Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Zhending Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongqisheng Precision Electronics Qinhuangdao Co Ltd, Zhending Technology Co Ltd filed Critical Hongqisheng Precision Electronics Qinhuangdao Co Ltd
Priority to CN201210511978.5A priority Critical patent/CN103857197A/en
Priority to TW101150396A priority patent/TWI463931B/en
Publication of CN103857197A publication Critical patent/CN103857197A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The invention relates to a circuit board which comprises a substrate, an electric conduction pad, a dielectric layer and electric conduction metal blocks. The electric conduction pad is formed on one surface of the substrate, the dielectric layer is pressed on the side, provided with the electric conduction pad, of the substrate and provided with a first surface far away from the substrate, holes corresponding to the electric conduction pad are formed in the dielectric layer and are a step hole, each hole comprises a first hole section and a second hole section which are connected with each other, the first hole sections are adjacent to the electric conduction pad, the second hole sections are adjacent to the first surface, the hole diameters of the second hole sections are larger than the hole diameters of the first hole sections, the electric conduction metal blocks are formed in the holes, and the holes are fully filled with the electric conduction metal blocks. The invention further provides a manufacturing method of the circuit board.

Description

Circuit board and preparation method thereof
Technical field
The present invention relates to circuit board making technical field, relate in particular to a kind of circuit board and preparation method thereof.
Background technology
Employing flip-chip ball grid array (FCBGA) carries out the circuit board of packaged chip, conventionally need to make multiple conductive lug structures of array arrangement, for carrying tin ball.Described conductive projection need to run through welding resisting layer and mutually be electrically connected with corresponding conducting wire.In prior art, conventionally adopt and on described conducting wire, form corresponding welding resisting layer opening, then on welding resisting layer, form and electroplate barrier layer, and form the plating barrier layer corresponding with welding resisting layer opening in plating barrier layer.Form because welding resisting layer opening all needs to develop with plating barrier layer opening, and need to be interconnected, in manufacturing process, need corresponding plating barrier layer opening and welding resisting layer opening to carry out contraposition.Afterwards, the mode that then chemical plating electroplates in the opening of welding resisting layer forms conductive projection.Finally, remove and electroplate barrier layer, obtain protruding from the conductive projection of welding resisting layer.In above-mentioned manufacture method, that welding resisting layer opening need to be made is relatively large, carries out contraposition so that develop to form while electroplating barrier layer opening.And because the conductive projection and the welding resisting layer that form are in contact with one another, and contact area is less, thereby easily causes conductive projection to be separated from each other in welding resisting layer, the reliability of the circuit board obtaining is poor.And such manufacture method has determined that the distribution density of the conductive lug structure of making is less, is unfavorable for multiple conductive lug structure dense distribution.
Summary of the invention
Therefore, be necessary to provide a kind of circuit board and preparation method thereof, can improve the reliability of the conducting metal piece of circuit board.
A manufacture method for circuit board, comprises step: circuit substrate is provided, and it comprises substrate and is formed at the conductive pad on substrate one surface; Dielectric layer is closed in one side pressure at described circuit substrate with conductive pad, and described dielectric layer has the first surface away from described substrate; Adopt laser in dielectric layer, to form multiple and conductive pad multiple perforates one to one, each described perforate is shoulder hole, described perforate comprises interconnective the first hole section and the second hole section, the first hole section is adjacent with conductive pad, the second hole section is adjacent with first surface, and the aperture of the second hole section is greater than the aperture of the first hole section; And in described perforate, forming conducting metal piece, each conducting metal piece is electrically connected mutually with corresponding conductive pad.
A kind of circuit board, it comprises substrate, conductive pad, dielectric layer and conducting metal piece, described conductive pad is formed at a surface of substrate, described dielectric layer is pressed on substrate and has a side of conductive pad, described dielectric layer has the first surface away from substrate, in dielectric layer, be formed with perforate corresponding to conductive pad, described perforate is shoulder hole, each described perforate comprises interconnective the first hole section and the second hole section, the first hole section is adjacent with conductive pad, the second hole section is adjacent with first surface, the aperture of the second hole section is greater than the aperture of the first hole section, conducting metal piece is formed in perforate, and fill described perforate completely.
Compared with prior art, circuit board that the technical program provides and preparation method thereof, because conducting metal piece is formed in dielectric layer, and in dielectric layer is shoulder hole for accommodating the perforate of conducting metal piece.In prior art, in welding resisting layer, form opening, then form and protrude from welding resisting layer surface metal projection, can increase the contact area of conducting metal piece and dielectric layer.Than welding resisting layer, the binding ability of dielectric layer and metal is better than the binding ability of welding resisting layer and metal.The reliability of the circuit board that therefore, the technical program provides is better.
Accompanying drawing explanation
Fig. 1 is the generalized section of the circuit substrate that provides of the technical program embodiment.
Fig. 2 is that the generalized section after dielectric layer is closed in circuit substrate one side pressure of Fig. 1.
Fig. 3 forms the generalized section after perforate in the dielectric layer of Fig. 2.
Fig. 4 is that dielectric layer surface and the perforate inwall of Fig. 3 forms the generalized section after metal seed layer.
Fig. 5 forms the generalized section after electroplating metal material on the metal seed layer surface of Fig. 4.
Fig. 6 is the generalized section of the circuit board that provides of the technical program.
Fig. 7 forms the generalized section after surface-treated layer on the conducting metal piece surface of the circuit board of Fig. 6.
Main element symbol description
Circuit substrate 110
Substrate 111
Conductive pad 112
Conducting wire layer 113
Dielectric layer 120
Perforate 121
The first hole section 1211
The second hole section 1212
Joint face 1213
First surface 122
Metal seed layer 130
Electroplating metal material 140
Conducting metal piece 150
End face 151
Connecting portion 152
Supporting part 153
Surface-treated layer 160
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
The circuit board manufacturing method that the technical program provides comprises the steps:
The first step, refers to Fig. 1, and circuit substrate 110 is provided.
Described circuit substrate 110 comprises substrate 111 and multiple conductive pad 112.
Circuit substrate 110 can be that individual layer circuit substrate can be also Mulitilayer circuit board.In the time that circuit substrate 110 is individual layer circuit substrate, the dielectric layer that substrate 111 is individual layer.In the time that circuit substrate 110 is Mulitilayer circuit board, substrate 111 can be multi-layer conductive line road floor and the alternately laminated structure of multilayer dielectric layer.Multiple conductive pads 112 contact with the one dielectric layer of substrate 111.In the present embodiment, a surface of substrate 111 is formed with conducting wire layer 113, and conducting wire layer 113 comprises multiple conductive pads 112 and many conducting wire (not shown).
Second step, refers to Fig. 2, on multiple conductive pads 112 surface of circuit substrate 110 and the surface of the substrate 111 of exposing from conducting wire layer 113 form dielectric layer 120.
In this step, the substrate 111 that dielectric layer 120 is formed at multiple conductive pads 112 surfaces and is exposed from conductive pad 112 by the mode of pressing, makes dielectric layer 120 cover conducting wire layer 113 completely.Dielectric layer 120 has the first surface 122 away from substrate 111.
The 3rd step, refers to Fig. 3, adopts laser in dielectric layer 120, to be formed with multiple perforates 121, and each perforate 121 is mutually corresponding with a conductive pad 112, and each conductive pad 112 exposes from corresponding perforate 121.
In this step, adopt excimer laser to form perforate 121.Perforate 121 is stepped.Perforate 121 comprises the first hole section 1211 and the second hole section 1212 that are interconnected.The first hole section 1211 is adjacent with conductive pad 112, and the second hole section 1212 is near first surface 122.Wherein, the aperture of the first hole section 1211 is less than the aperture of the second hole section 1212.Preferably, the first hole section 1211 and the second hole section 1212 coaxially arrange.Form because perforate 121 adopts laser, the longitudinal section of the first hole section 1211 and the second hole section 1212 is inverted trapezoidal.In the junction of the first hole section 1211 and the second hole section 1212, be formed with joint face 1213, described joint face 1213 exposes from the second hole section 1,212 one sides, and described joint face 1213 is roughly parallel to first surface 122.
Because adopting excimer laser, perforate 121 forms, in the time forming excimer laser, and can be by the energy of the laser of control diverse location, be positioned at perforate 121 central areas, adopt larger energy, dielectric layer 120 is run through completely, form the first hole section 1211 and the second hole section 1212 simultaneously.Around the fringe region of central area, adopt less laser energy outside, make the only ablated removal of dielectric layer 120 of part, only form the second hole section 1212, thereby obtain the perforate 121 of stairstepping.
The 4th step, refers to Fig. 4 to Fig. 6, at the interior formation conducting metal of each perforate 121 piece 150, obtains circuit board 100.
This step is specially:
First, form metal seed layer 130 at the inwall of perforate 121 and the first surface 122 of dielectric layer 120.
Described metal seed layer 130 can adopt the mode of chemical plating metal to form.As the mode of electroless copper forms.Certainly, metal seed layer 130 also can adopt the modes such as shadow, makes the inwall of perforate 121 and the surface of dielectric layer 120 form metal seed layer 130.
Then, by the mode of electroplating, form electroplating metal material 140 on metal seed layer 130 surfaces, described perforate 121 is completely filled.
In this step, the metal material of plating can be copper, silver etc.In the present embodiment, electroplating metal material 140 is filled perforate 121 completely, and is formed on the surface of the metal seed layer 130 of the first surface 122 of dielectric layer 120.
Finally, remove electroplating metal material 140 and the metal seed layer 130 of the first surface 122 of dielectric layer 120, the electroplating metal material 140 and the metal seed layer 130 that are positioned at perforate 121 form conducting metal piece 150, thereby obtain circuit board 100.
In this step, can adopt the mode of chemical etching to remove electroplating metal material 140 and the metal seed layer 130 of the first surface 122 of dielectric layer 120.By controlling the etched time, make electroplating metal material 140 and metal seed layer 130 in perforate 121 still stay the interior formation conducting metal of perforate 121 piece 150.Conducting metal piece 150 has the end face 151 away from conductive pad 112.Described end face 151 is concordant with first surface 122.
Conducting metal piece 150 comprises interconnective connecting portion 152 and supporting part 153.Described connecting portion 152 be positioned at described the first hole section 1211, described supporting part 153 is positioned at the second hole section 1212.The shape of connecting portion 152 is corresponding with the shape of the first hole section 1211, and the shape of supporting part 153 is corresponding with the shape of the second hole section 1212.Described connecting portion 152 is electrically connected conductive pad 112 and supporting part 153, and supporting part 153 is for welding with other elements.Connecting portion 152 and supporting part 153 are reverse frustoconic, and the cross-sectional area of connecting portion 152 is less than the cross-sectional area of supporting part 153.
Refer to Fig. 7, the circuit board manufacturing method that the technical program provides, can also be included in end face 151 and form the step of surface-treated layer 160.Described surface-treated layer 160 can be organic guarantor's layer, can be also nickel gold plate etc., to protect conducting metal piece 150.
Refer to Fig. 6 and Fig. 7, the technical program also provides a kind of circuit board 100 that adopts said method to make, and described circuit board 100 comprises substrate 111, conductive pad 112, dielectric layer 120 and conducting metal piece 150.
Described conductive pad 112 is formed at a surface of substrate 111.Described dielectric layer 120 is pressed on substrate 111 and has a side of conductive pad 112.In dielectric layer 120, be formed with perforate 121, perforate 121 is shoulder hole.Described dielectric layer 120 has the first surface 122 away from substrate 111.Conducting metal piece 150 is formed in perforate 121, and is mutually electrically connected with corresponding conductive pad 112.Conducting metal piece 150 has the end face 151 away from corresponding conductive pad 112, and end face 151 is concordant with the first surface 122 of dielectric layer 120.
Conducting metal piece 150 comprises interconnective connecting portion 152 and supporting part 153.Described connecting portion 152 be positioned at described the first hole section 1211, described supporting part 153 is positioned at the second hole section 1212.The shape of connecting portion 152 is corresponding with the shape of the first hole section 1211, and the shape of supporting part 153 is corresponding with the shape of the second hole section 1212.Described connecting portion 152 is electrically connected conductive pad 112 and supporting part 153, and supporting part 153 is for welding with other elements.Connecting portion 152 and supporting part 153 are reverse frustoconic, and the cross-sectional area of connecting portion 152 is less than the cross-sectional area of supporting part 153.
Conducting metal piece 150 is made up of the metal seed layer 130 contacting with the inwall of perforate 121 and the electroplating metal material 140 that is formed at metal seed layer 130 surfaces.
Further, be also formed with surface-treated layer 160 at the end face 151 of each conducting metal piece 150, to protect conducting metal piece 150.
Circuit board that the technical program provides and preparation method thereof because conducting metal piece 150 is formed in dielectric layer 120, and in dielectric layer 120 is shoulder hole for accommodating the perforate 121 of conducting metal piece 150.In prior art, in welding resisting layer, form opening, then form and protrude from welding resisting layer surface metal projection, can increase the contact area of conducting metal piece 150 and dielectric layer 120.Than welding resisting layer, the binding ability of dielectric layer and metal is better than the binding ability of welding resisting layer and metal.The reliability of the circuit board that therefore, the technical program provides is better.
And the perforate in dielectric layer adopts a laser ablation to form, thereby can form the perforate of comparison dense distribution, closely can form the conducting metal piece of comparison dense distribution, improve the wiring density of circuit board.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change the protection range that all should belong to the claims in the present invention with distortion.

Claims (11)

1. a manufacture method for circuit board, comprises step:
Circuit substrate is provided, and it comprises substrate and is formed at the conductive pad on substrate one surface;
Dielectric layer is closed in one side pressure at described circuit substrate with conductive pad, and described dielectric layer has the first surface away from described substrate;
Adopt laser in dielectric layer, to form multiple and conductive pad multiple perforates one to one, each described perforate is shoulder hole, described perforate comprises interconnective the first hole section and the second hole section, the first hole section is adjacent with conductive pad, the second hole section is adjacent with first surface, and the aperture of the second hole section is greater than the aperture of the first hole section; And
In described perforate, form conducting metal piece, each conducting metal piece is electrically connected mutually with corresponding conductive pad.
2. the manufacture method of circuit board as claimed in claim 1, is characterized in that, each conducting metal piece has the end face away from corresponding conductive pad, and described end face is concordant with first surface.
3. the manufacture method of circuit board as claimed in claim 1, is characterized in that, forms conducting metal piece and comprise step in described perforate:
Form metal seed layer at the inwall of perforate and the first surface of dielectric layer;
By the mode of electroplating, form electroplating metal material on metal seed layer surface, described perforate is completely filled; And
Remove electroplating metal material and the metal seed layer of the first surface of dielectric layer, the electroplating metal material and the metal seed layer that are positioned at perforate form conducting metal piece.
4. the manufacture method of circuit board as claimed in claim 1, is characterized in that, adopts excimer laser to form described perforate.
5. the manufacture method of circuit board as claimed in claim 1, is characterized in that, described the first hole section and the second section junction, hole are formed with joint face, and described joint face exposes from the second hole section one side, and described joint face is parallel to first surface.
6. the manufacture method of circuit board as claimed in claim 1, it is characterized in that, described conducting metal piece comprises interconnective connecting portion and supporting part, described connecting portion be positioned at described the first hole section, described supporting part is positioned at the second hole section, described connecting portion is connected between corresponding conductive pad and supporting part, and the cross-sectional area of described connecting portion is less than the cross-sectional area of supporting part.
7. the manufacture method of circuit board as claimed in claim 1, is characterized in that, is also included in described end face and forms surface-treated layer.
8. a circuit board, it comprises substrate, conductive pad, dielectric layer and conducting metal piece, described conductive pad is formed at a surface of substrate, described dielectric layer is pressed on substrate and has a side of conductive pad, described dielectric layer has the first surface away from substrate, in dielectric layer, be formed with perforate corresponding to conductive pad, described perforate is shoulder hole, each described perforate comprises interconnective the first hole section and the second hole section, the first hole section is adjacent with conductive pad, the second hole section is adjacent with first surface, the aperture of the second hole section is greater than the aperture of the first hole section, conducting metal piece is formed in perforate, and fill described perforate completely.
9. circuit board as claimed in claim 8, it is characterized in that, described conducting metal piece comprises interconnective connecting portion and supporting part, described connecting portion be positioned at described the first hole section, described supporting part is positioned at the second hole section, described connecting portion is connected between corresponding conductive pad and supporting part, and the cross-sectional area of described connecting portion is less than the cross-sectional area of supporting part.
10. circuit board as claimed in claim 8, is characterized in that, each conducting metal piece has the end face away from corresponding conductive pad, and described end face is concordant with first surface.
11. circuit boards as claimed in claim 10, is characterized in that, described end face is formed with surface-treated layer.
CN201210511978.5A 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board Pending CN103857197A (en)

Priority Applications (2)

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CN201210511978.5A CN103857197A (en) 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board
TW101150396A TWI463931B (en) 2012-12-04 2012-12-27 Circuit board and method for manufacturing same

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Application Number Priority Date Filing Date Title
CN201210511978.5A CN103857197A (en) 2012-12-04 2012-12-04 Circuit board and manufacturing method of circuit board

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CN103857197A true CN103857197A (en) 2014-06-11

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106332436A (en) * 2015-06-26 2017-01-11 健鼎（无锡）电子有限公司 Circuit board and manufacturing method thereof
CN107689358A (en) * 2016-08-04 2018-02-13 胡迪群 Metal pad structure
CN107808859A (en) * 2016-09-09 2018-03-16 思鹭科技股份有限公司 Semiconductor structure
CN111212527A (en) * 2020-01-15 2020-05-29 广东科翔电子科技股份有限公司 Through hole filling and plating method applied to optical module high-density interconnection HDI board
CN112752429A (en) * 2019-10-31 2021-05-04 鹏鼎控股(深圳)股份有限公司 Multilayer circuit board and manufacturing method thereof
CN112888152A (en) * 2014-11-21 2021-06-01 安费诺公司 Mating backplane for high speed, high density electrical connectors
CN112888152B (en) * 2014-11-21 2024-06-07 安费诺公司 Matched backboard for high-speed and high-density electric connector

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US10163801B2 (en) * 2016-10-14 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of chip package with fan-out structure

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TWI239594B (en) * 2004-10-06 2005-09-11 Advanced Semiconductor Eng Redistribution layer structure of a wafer and the fabrication method thereof

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112888152A (en) * 2014-11-21 2021-06-01 安费诺公司 Mating backplane for high speed, high density electrical connectors
US11950356B2 (en) 2014-11-21 2024-04-02 Amphenol Corporation Mating backplane for high speed, high density electrical connector
CN112888152B (en) * 2014-11-21 2024-06-07 安费诺公司 Matched backboard for high-speed and high-density electric connector
CN106332436A (en) * 2015-06-26 2017-01-11 健鼎（无锡）电子有限公司 Circuit board and manufacturing method thereof
CN106332436B (en) * 2015-06-26 2019-05-14 健鼎（湖北）电子有限公司 Circuit board and preparation method thereof
CN107689358A (en) * 2016-08-04 2018-02-13 胡迪群 Metal pad structure
CN107808859A (en) * 2016-09-09 2018-03-16 思鹭科技股份有限公司 Semiconductor structure
CN112752429A (en) * 2019-10-31 2021-05-04 鹏鼎控股(深圳)股份有限公司 Multilayer circuit board and manufacturing method thereof
US11297722B2 (en) 2019-10-31 2022-04-05 Avary Holding (Shenzhen) Co., Limited. Multi-layered circuit board
CN112752429B (en) * 2019-10-31 2022-08-16 鹏鼎控股(深圳)股份有限公司 Multilayer circuit board and manufacturing method thereof
CN111212527A (en) * 2020-01-15 2020-05-29 广东科翔电子科技股份有限公司 Through hole filling and plating method applied to optical module high-density interconnection HDI board

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Publication number Publication date
TW201424497A (en) 2014-06-16
TWI463931B (en) 2014-12-01

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Application publication date: 20140611