CN103855210A - 射频横向双扩散场效应晶体管及其制造方法 - Google Patents

射频横向双扩散场效应晶体管及其制造方法 Download PDF

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CN103855210A
CN103855210A CN201210509266.XA CN201210509266A CN103855210A CN 103855210 A CN103855210 A CN 103855210A CN 201210509266 A CN201210509266 A CN 201210509266A CN 103855210 A CN103855210 A CN 103855210A
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李娟娟
钱文生
韩峰
慈朋亮
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Abstract

本发明公开了一种射频横向双扩散场效应晶体管,包括P型衬底、在所述P型衬底上外延生长形成的P型外延层及位于P型外延层中离子注入形成的P阱,所述P阱用于形成沟道,所述在P型外延层中离子注入形成的P埋层。所述P埋层位于所述P阱的下方,所述P埋层与所述P阱相接触。本发明所述的射频横向双扩散场效应晶体管可以有效的降低寄生双极晶体管的基区电阻,从而抑制其寄生双极晶体管导通。并且P埋层与P阱一起对轻掺杂的漂移区进行耗尽,使漂移区表面电场分部均匀,降低多晶硅栅靠近漏端边缘下方电场强度,从而抑制热载流子注入到栅靠近漏端边缘氧化层中。

Description

射频横向双扩散场效应晶体管及其制造方法
技术领域
本发明涉及一种半导体集成电路,特别是涉及一种射频横向双扩散场效应晶体管,本发明还涉及该晶体管的制造方法。
背景技术
随着3G时代的到来,通讯领域越来越多的要求更大功率的射频(RF)器件的开发。射频横向双扩散场效应晶体管(RFLDMOS),由于其具有非常高的输出功率,早在上世纪90年代就已经被广泛应用于手提式无线基站功率放大中,其应用频率为900MHz-3.8GHz。RFLDMOS与传统的硅基双极晶体管相比,具有更好的线性度,更高的功率和增益。如今,RFLDMOS比双极管,以及GaAs器件更受欢迎。
在RFLDMOS的可靠性评估中,热载流子注入(HCI)和寄生双极晶体管是否容易导通是两个非常重要的指标,它们影响到器件的寿命。目前RFLDMOS的结构如图1所示,采用掺高浓度P型杂质的衬底,即P型衬底11,在所述P型衬底11上根据器件耐压的要求不同外延生长不同厚度和掺杂浓度的P型外延层12,随后形成栅氧17及多晶硅栅15,然后通过离子注入和扩散工艺分别形成轻掺杂的漂移区(LDD)18、P阱14、N+源区110、N+漏区111和P+区域19,再分别形成法拉第屏蔽层16、P型多晶硅塞或金属塞13等后续其他工艺过程形成RFLDMOS。这种结构在漏端有轻掺杂的漂移区(LDD)18,从而使其具有较大的击穿电压(BV),同时由于其漂移区18浓度较淡,使其具有较大的导通电阻(Rdson)。而RFLDMOS在应用中,有时候会需要非常大的输出功率,因此需要器件具有非常低的导通电阻(Rdson),此时,漂移区的浓度会增加,在原有法拉第屏蔽层不变的情况下,多晶硅栅氧边缘下方电场强度变大,使得HCI恶化。同时,在研发过程中,寄生的双极晶体管是否导通也是一项不容忽视的指标。这里的寄生双极管指的是,源端N型重掺杂区域形成的发射区、沟道P型中掺杂区域形成的基区和轻掺杂漂移区形成的集电区。其导通的原因主要是,沟道浓度太低或者有效沟道长度太短,基区电阻较大,使得基区和发射区正向导通。
发明内容
本发明所要解决的技术问题是提供一种射频横向双扩散场效应晶体管,能降低寄生双极晶体管基区电阻从而抑制寄生双极晶体管导通,并且降低多晶硅栅氧靠近漏端边缘下方的电场强度从而抑制HCI。
为解决上述技术问题,本发明提供的一种射频横向双扩散场效应晶体管,包括P型衬底、在所述P型衬底上外延生长形成的P型外延层及位于P型外延层中的P阱,所述P阱用于形成沟道,所述在P型外延层中包括一P埋层,所述P埋层位于所述P阱的下方,所述P埋层与所述P阱相接触。
进一步的,所述P埋层的长度为源端到沟道底下区域的长度。
进一步的,所述P埋层的长度为所述P型外延层的长度。
进一步的,还包括氧化层和多晶硅栅、轻掺杂的漂移区、法拉第屏蔽层、N+源区、N+漏区、P+区域、以及P型多晶硅塞或金属塞。
一种射频横向双扩散场效应晶体管的制造方法,包括:
步骤1、在P型衬底上外延生长P型外延层;在P型外延层上面生长一层阻挡氧化层,然后通过离子注入形成P埋层。
步骤2、多晶硅栅的形成,首先去除所述阻挡氧化层,接着热氧生长一层栅氧化层,然后淀积多晶硅,淀积光刻胶,最后通过光刻板定义刻蚀出多晶硅栅;
步骤3、轻掺杂漂移区的形成,在不去除光刻胶的情况下,进行轻掺杂漂移区的N型离子注入,形成轻掺杂漂移区;
步骤4、P阱的形成,光刻板定义出P阱区域及位置,刻蚀出该区域,通过自对准的工艺进行P型离子注入,然后高温推进形成;
步骤5、通过光刻板分别定义出N+源区、N+漏区以及P+区域,分别进行离子注入形成N+源区、N+漏区以及P+区域;
步骤6、法拉第屏蔽层的形成,淀积氧化层,淀积金属硅化物,光刻板定义出法拉第屏蔽层的面积和位置,然后刻蚀金属硅化物形成法拉第屏蔽层;
步骤7、P型多晶硅塞或者金属塞的形成,光刻板定义出P型多晶硅塞或者金属塞的区域,刻蚀出槽,淀积P型多晶硅或者金属材料,通过研磨或者刻蚀等工艺形成。
进一步的,步骤1中所述的离子注入形成P埋层为通过在所述P型外延层中光刻板定义刻蚀出P埋层的区域,然后注入P型杂质,高温推进形成一P埋层。
进一步的,步骤1中所述离子注入形成P埋层为在所述P型外延层中直接普注P型杂质,然后高温推进形成一P埋层。
进一步的,步骤1中所述离子注入形成P埋层,所述离子的种类为硼,其能量为100keV-1000keV,剂量为1.0e12-1.0e15cm-2;步骤3中所述的轻掺杂漂移区的N型离子注入,所述离子的种类为磷或砷,其能量为50keV-300keV,剂量为1.0e11-4.0e12cm-2;步骤4中所述的P型离子注入,所述离子的种类为硼,能量为30-80keV,剂量为5e12-2e14cm-2
进一步的,步骤6中所述的法拉第屏蔽层为一层。
进一步的,步骤6中所述的法拉第屏蔽层为多层。
本发明所述的射频横向双扩散场效应晶体管可以有效的降低寄生双极晶体管的基区电阻,从而抑制其寄生双极晶体管导通。并且P埋层的注入与P阱一起对轻掺杂的漂移区进行耗尽,使漂移区表面电场分部均匀,降低多晶硅栅靠近漏端边缘下方部分电场强度降低,从而抑制热载流子注入到栅边缘氧化层中。
附图说明
下面结合附图和具体实施方式对本发明作进一步详细的说明:
图1是现有的RFLDMOS器件的结构示意图;
图2是本发明RFLDMOS器件第一实施例结构示意图;
图3是本发明RFLDMOS器件第二实施例结构示意图;
图4a是公知的RFLDMOS在HCI测试条件下的碰撞电离率图;
图4b是本发明的RFLDMOS在HCI测试条件下的碰撞电离率图;
图4c是公知的RFLDMOS与本发明RFLDMOS在沿着图4a中M切线所对应的电场强度曲线对比图;
图5a是公知的RFLDMOS硼离子的浓度分布图;
图5b是本发明的RFLDMOS硼离子的浓度分布图;
图5c是公知的RFLDMOS与本发明RFLDMOS在沿着图5a中N切线所对应的硼离子浓度分布对比图;
图6是公知的RFLDMOS与本发明RFLDMOS的转移特性曲线对比图;
图7是公知的RFLDMOS与本发明RFLDMOS的击穿电压曲线对比图;
图8a-8i是本发明RFLDMOS制造方法的流程示意图。
主要器件附图说明:
P型衬底11                         P型外延层12
P型多晶硅塞或金属塞13                     P阱14
多晶硅栅15                                法拉第屏蔽层16
氧化层17                                  轻掺杂的漂移区18
P+区域19                                  N+源区110
N+漏区111
P型衬底201                                P型外延层202
P埋层203                                  P阱204
P型多晶硅塞或金属塞205                    多晶硅栅206
氧化层207                                 法拉第屏蔽层208
轻掺杂的漂移区209                         P+区域210
N+源区211                                 N+漏区212
P型衬底301                                P型外延层302
P埋层303                                  P阱304
P型多晶硅塞或金属塞305                    多晶硅栅306
氧化层307                                 法拉第屏蔽层308
轻掺杂的漂移区309                         P+区域310
N+源区311                                 N+漏区312
P型衬底801                                P型外延层802
阻挡氧化层803                             光刻胶804
P埋层805                                  栅氧化层806
多晶硅807                                 多晶硅栅808
轻掺杂漂移区809                           P阱810
P+区域811                                 N+源区812
N+漏区813                                 法拉第屏蔽层814
氧化层815                                 P型多晶硅塞或者金属塞816
具体实施方式
为使贵审查员对本发明的目的、特征及功效能够有更进一步的了解与认识,以下配合附图详述如后。
如图2所示,为本发明RFLDMOS器件的第一实施例的结构示意图,采用掺高浓度P型杂质的衬底,即P型衬底201,在所述P型衬底201上根据器件耐压的要求不同生长不同厚度和掺杂浓度的P型外延层202,在所述的P型外延层202中通过光刻板定义刻蚀出P埋层203的区域,即源端到沟道底下区域,然后进行P型离子注入并高温推进形成P埋层203;利用离子注入和扩散工艺形成P阱204,热氧生长氧化层207和淀积多晶硅栅206;利用离子注入和扩散工艺分别形成轻掺杂的漂移区(LDD)209、P+区域210、N+源区211及N+漏区212。随后形成法拉第屏蔽层208、P型多晶硅塞或者金属塞205。其中,所述P阱204用于形成沟道;所述P埋层203位于所述P阱204的下方,所述P埋层203与所述P阱204相接触;所述P埋层203的注入可以有效的降低寄生双极晶体管的基区电阻,从而抑制其寄生双极晶体管导通并且P埋层203的注入与P阱204一起对轻掺杂的漂移区209进行耗尽,使轻掺杂的漂移区209表面电场分部均匀,降低多晶硅栅206靠近漏端边缘下方部分电场强度降低,从而抑制热载流子注入到栅边缘氧化层中。
如图3所示,为本发明第二实施例的结构示意图,本发明第二实施例与第一实施例的区别在于,本实施例中的P埋层303的区域不使用光刻板定义,而直接进行P型离子普注,即P埋层303的长度为所述P型外延层302的长度。
如图4a、图4b所示,分别为公知的RFLDMOS和本发明的RFLDMOS在HCI测试条件下的碰撞电离率图,图4a、图4b中电离率随着颜色的加深电离率变大,从图4a、图4b中可以看出,区域A浅色部分的面积明显比区域B的面积大,即公知的RFLDMOS在多晶硅栅下的电离率明显比本发明的RFLDMOS的电离率大,则本发明的结构有益于抑制热载流子的注入(HCL)。
如图4c所示,为公知的RFLDMOS与本发明RFLDMOS在沿着图4a中M切线所对应的电场强度曲线对比图,其中虚线表示公知技术,实线表示本发明技术。可以看出本发明的RFLDMOS沿着M切线的电场强度明显小于公知技术,有益于抑制热载流子注入(HCI)。
如图5a、5b所示,分别表示公知的RFLDMOS与本发明的RFLDMOS硼离子的浓度分布图,图5a、5b中硼离子的浓度随着颜色的加深浓度越小,则可以看出图5a中的硼离子浓度较大的区域面积明显小于图5b中的面积,可以知道公知的RFLDMOS中的硼离子的浓度比本发明的RFLDMOS硼离子的浓度小。
如图5c所示,为公知的RFLDMOS与本发明RFLDMOS在沿着图5a中N切线所对应的硼离子浓度分布对比图,其中虚线表示公知技术,实线表示本发明技术,可以看出本发明的RFLDMOS沿着N切线所对应的硼离子浓度分布明显大于公知的RFLDMOS,有利于降低寄生双极晶体管的基区电阻,从而可以起到抑制寄生双极晶体管导通的作用。如图6所示,为公知的RFLDMOS与本发明RFLDMOS的转移特性曲线对比图,其中虚线表示公知技术,实线表示本发明技术,从图中可以看出,两者的转移特性曲线基本一致,即两种器件的阈值电压、导通电阻基本相同。
如图7所示,为公知的RFLDMOS与本发明RFLDMOS的击穿电压曲线对比图,其中虚线表示公知技术,实线表示本发明技术,从图中可以看出,两者的转移特性曲线基本一致,即两种器件的击穿电压基本相同。
本发明的射频横向双扩散场效应晶体管的制造方法,包括:
步骤1、在P型衬底801上外延生长P型外延层802;在P型外延层802上面生长一层阻挡氧化层803;淀积一层光刻胶804,然后通过光刻板在所述P型外延层802中定义刻蚀出P埋层805注入的区域,然后进行P型离子注入,然后高温推进形成P埋层805;如图8a所示,或者不淀积光刻板,在所述P型外延层802中直接普注P型杂质,然后高温推进形成P埋层805,如图8b所示。注入较高能量的P型杂质,其杂质种类为硼,其能量为100keV-1000keV,剂量为1.0e12-1.0e15cm-2。形成的P埋层805的体浓度为1.0e15-1.0e20cm-3。最后去除光刻胶804。
步骤2、多晶硅栅808形成,首先去除阻挡氧化层803,接着热氧生长一层栅氧化层806,然后淀积多晶硅807,淀积光刻胶804,如图8c;最后通过光刻板定义刻蚀出多晶硅栅808,如图8d所示。
步骤3、在不去除光刻胶804的情况下,进行一步较高能量的轻掺杂漂移区(LDD)809的N型离子注入。所述N型离子种类为磷、砷等,其能量为50keV-300keV,剂量为1.0e11-4.0e12cm-2。如图8e所示;然后去除光刻胶804。
步骤4、P阱810的形成,光刻板定义出P阱810区域及位置,刻蚀出该区域,通过自对准的工艺进行P型离子注入,然后高温推进形成。所述P型离子为硼,能量为30-80keV,剂量为5e12-2e14cm-2;如图8f所示。
步骤5、通过光刻板定义出P+区域811、N+源区812及N+漏区813,分别进行离子注入并高温退火形成N+源区811、N+漏区812以及P+区域813;注入N+源区812及N+漏区813的N+离子,杂质为磷或砷,能量为0keV-200keV,剂量为1.0e12-1.0e16cm-2。在P+区域811中注入P+离子,杂质为硼或者二氟化硼,其能量为0keV-100keV,剂量为1.0e12-1.0e16cm-2;如图8g所示。
步骤6、法拉第屏蔽层814的形成工艺:淀积氧化层815,淀积金属硅化物,光刻板定义出法拉第屏蔽层814的面积和位置,然后刻蚀金属硅化物形成法拉第屏蔽层814,如图8h。其中法拉第屏蔽层可以是一层或者多层的结构。
步骤7、P型多晶硅塞或者金属塞816的形成工艺:光刻板定义出P型多晶硅塞或者金属塞816的区域,刻蚀出槽,淀积P型多晶硅或者金属材料,通过研磨或者刻蚀等工艺形成,如图8i。
以上通过具体实施例对本发明进行了详细的说明,但这些并非构成对本发明的限制。在不脱离本发明原理的情况下,本领域的技术人员还可做出许多变形和改进,这些也应视为本发明的保护范围。

Claims (10)

1.一种射频横向双扩散场效应晶体管,包括P型衬底、在所述P型衬底上外延生长形成的P型外延层及位于P型外延层中的P阱,所述P阱用于形成沟道,其特征在于,所述在P型外延层中包括一P埋层,所述P埋层位于所述P阱的下方,所述P埋层与所述P阱相接触。
2.如权利要求1所述射频横向双扩散场效应晶体管,其特征在于,所述P埋层的长度为源端到沟道底下区域的长度。
3.如权利要求1所述射频横向双扩散场效应晶体管,其特征在于,所述P埋层的长度为所述P型外延层的长度。
4.如权利要求1所述的射频横向双扩散场效应晶体管,其特征在于,还包括氧化层和多晶硅栅、轻掺杂的漂移区、法拉第屏蔽层、N+源区、N+漏区、P+区域、以及P型多晶硅塞或金属塞。
5.一种如权利要求1所示的射频横向双扩散场效应晶体管的制造方法,其特征在于,包括:
步骤1、在P型衬底上外延生长P型外延层;在P型外延层上面生长一层阻挡氧化层,然后通过离子注入形成P埋层;
步骤2、多晶硅栅的形成,首先去除所述阻挡氧化层,接着热氧生长一层栅氧化层,然后淀积多晶硅,淀积光刻胶,最后通过光刻板定义刻蚀出多晶硅栅;
步骤3、轻掺杂漂移区的形成,在不去除光刻胶的情况下,进行轻掺杂漂移区的N型离子注入,形成轻掺杂漂移区,然后去除光刻胶;
步骤4、P阱的形成,光刻板定义出P阱区域及位置,刻蚀出该区域,通过自对准的工艺进行P型离子注入,然后高温推进形成;
步骤5、通过光刻板分别定义出N+源区、N+漏区以及P+区域,分别进行离子注入并高温退火形成N+源区、N+漏区以及P+区域;
步骤6、法拉第屏蔽层的形成,淀积氧化层,淀积金属硅化物,光刻板定义出法拉第屏蔽层的面积和位置,然后刻蚀金属硅化物形成法拉第屏蔽层;
步骤7、P型多晶硅塞或者金属塞的形成,光刻板定义出P型多晶硅塞或者金属塞的区域,刻蚀出槽,淀积P型多晶硅或者金属材料,通过研磨或者刻蚀等工艺形成。
6.如权利要求5所述的制造方法,其特征在于,步骤1中所述的离子注入形成的P埋层为通过在所述P型外延层中光刻板定义刻蚀出P埋层的区域,然后注入P型杂质,高温推进形成。
7.如权利要求5所述的制造方法,其特征在于,步骤1中所述离子注入形成P埋层为在所述P型外延层中直接普注P型杂质,然后高温推进形成。
8.如权利要求5所述的制造方法,其特征在于,步骤1中所述离子注入形成P埋层,所述离子的种类为硼,其能量为100keV-1000keV,剂量为1.0e12-1.0e15cm-2步骤3中所述的轻掺杂漂移区的N型离子注入,所述离子的种类为磷或砷,其能量为50keV-300keV,剂量为1.0e11-4.0e12cm-2;步骤4中所述的P型离子注入,所述离子的种类为硼,能量为30-80keV,剂量为5e12-2e14cm-2
9.如权利要求5所述的制造方法,其特征在于,步骤6中所述的法拉第屏蔽层为一层。
10.如权利要求5所述的制造方法,其特征在于,步骤6中所述的法拉第屏蔽层为多层。
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