CN103682021A - LED with metal electrodes adopting array microstructures and manufacturing method thereof - Google Patents
LED with metal electrodes adopting array microstructures and manufacturing method thereof Download PDFInfo
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- CN103682021A CN103682021A CN201210349636.8A CN201210349636A CN103682021A CN 103682021 A CN103682021 A CN 103682021A CN 201210349636 A CN201210349636 A CN 201210349636A CN 103682021 A CN103682021 A CN 103682021A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
Abstract
The application provides an LED with metal electrodes adopting array microstructures. The LED comprises an epitaxial wafer substrate and a multilayer structure prepared on the epitaxial wafer substrate, wherein the multilayer structure sequentially comprises a buffer layer, a first semiconductor layer, a multi-quantum well active layer, an electron blocking layer, a second semiconductor layer and a transparent current expanding layer from the bottom to the top; a first metal electrode and a second metal electrode are prepared on the transparent current expanding layer, and the first metal electrode and the transparent current expanding layer are separated from the second semiconductor layer through an insulation layer. The application further provides a corresponding manufacturing method of the LED. According to the LED, the situation that the area of an active region in a manufacturing process of an LED chip is greatly reduced can be remarkably improved and the luminous power of the LED can be effectively increased.
Description
Technical field
The present invention relates to LED technical field, specifically, the present invention relates to a kind of light-emitting diode with array type micro-structural and preparation method thereof.
Background technology
Light-emitting diode (Light Emitting Diodes, LEDs) advantage such as electro-optical efficiency is high, energy-saving and environmental protection, the life-span is long, volume is little owing to having, makes LED-based semiconductor lighting be considered to 21st century and most possibly enters one of a kind of novel solid cold light source in general lighting field and high-technology field most with prospects.
The key of semiconductor lighting extensive use is to improve its electro-optical efficiency.Wherein, improve one of the internal quantum efficiency of nitride LED chip and effective way of the whole electro-optical efficiency that light extraction efficiency is raising LED.The internal quantum efficiency of LED chip depends primarily on quality and the epitaxial structure of epitaxial material, and light extraction efficiency is main relevant with chip structure.Therefore, need to remove to improve from aspects such as material, epitaxial structure, chip surface, side and the back side forms internal quantum efficiency and the light extraction efficiency of LED chip.
For epitaxially grown horizontal structure power type light-emitting diode chip in Sapphire Substrate, its p-n electrode is positioned at the same side, because the path of minimal path is observed in the mobile meeting of electric current, so is easily causing electric current to stop up under large current practice condition.Further can form the long-pending effect of heat, reduce the internal quantum efficiency of power type light-emitting diode chip, cause active area non-uniform light.Therefore need to be optimized design to the electrode pattern of power type light-emitting diode chip, Injection Current is uniformly distributed in light-emitting diode chip for backlight unit active area, avoid electric current clogging.
In horizontal structure power type light-emitting diode chip manufacturing proces, the formation of the first type Ohm contact electrode need to be carried out etching to LED epitaxial layer by micro fabrication, exposes the GaN layer of the first type doping.
Fig. 1 shows the structure of a kind of typical GaN based power type light-emitting diode in prior art, in Fig. 1, below is the vertical view of GaN based power type LED surface, top be GaN based power type light-emitting diode along the generalized section of A-A face, the structure of this GaN based power type light-emitting diode is followed successively by epitaxial loayer substrate 100, low temperature buffer layer 101, the first type semiconductor layer 102, Multiple Quantum Well active layer 103, electronic barrier layer 104, Second-Type semiconductor layer 105, transparent current extending 106 from the bottom to top.
Second-Type Ohm contact electrode is produced on transparent current extending 106, particularly, according to the electrode structure of design in advance, on current barrier layer 107, make transparent current extending 106, and then make Second-Type plain conductor 108 on transparent current extending 106, thereby form Second-Type Ohm contact electrode.And for the first type Ohm contact electrode, in its manufacturing process, need, by micro fabrication, LED epitaxial layer is carried out to etching, expose the subregion of the first type semiconductor layer 102, then the region exposing in the first type semiconductor layer 102 according to the electrode structure of design in advance makes the first type plain conductor 109, thereby forms the first type Ohm contact electrode.
Easily find out, in prior art when making the first type Ohm contact electrode, owing to need to exposing by micro fabrication etching the subregion of the first type semiconductor layer 102, therefore inevitably can cause significantly reducing of light-emitting diode chip for backlight unit active region area, cause the utilance of light-emitting diode chip for backlight unit active region area to decline, and then cause the decline of the luminous power of power type light-emitting diode chip.
In sum, current in the urgent need to a kind of light-emitting diode and the manufacture method thereof that can avoid light-emitting diode chip for backlight unit active region area significantly to reduce and can improve luminous power.
Summary of the invention
For overcoming existing defect, the present invention proposes a kind of light-emitting diode and the manufacture method thereof that can avoid light-emitting diode chip for backlight unit active region area significantly to reduce and can improve luminous power.
According to an aspect of the present invention, the light-emitting diode that a kind of metal electrode has array type micro-structural has been proposed, comprise epitaxial wafer substrate and the sandwich construction of preparation on epitaxial wafer substrate, described sandwich construction is followed successively by resilient coating from the bottom to top, the first type semiconductor layer, Multiple Quantum Well active layer, electronic barrier layer, Second-Type semiconductor layer and transparent current extending, the first type metal electrode and the preparation of Second-Type metal electrode are on transparent current extending, and by insulating barrier, separated between the first type metal electrode and transparent current extending and Second-Type semiconductor layer, under the pad of Second-Type metal electrode and between transparent current extending, by current barrier layer, separated, described the first type metal electrode is realized and being electrically connected to described the first type semiconductor layer by the micropore of a plurality of filling metals, between each layer of light-emitting diode that metal in described micropore and micropore pass, there is side wall insulating layer, the superiors of described light-emitting diode deposit passivation protection layer.
Wherein, described micropore has certain gradient, forms inverted trapezoidal structure.
Wherein, the inclination angle of the gradient of described micropore is 30 ° ~ 70 °.
Wherein, described micropore place has electric connection micro-structural, is electrically connected the overall dimensions of micro-structural between 20um ~ 50um.
Wherein, described electric connection micro-structural is distributed on the wire of described the first type electrode with a determining deviation.
Wherein, the ratio of the overall dimensions of the spacing of described electric connection micro-structural and described electric connection micro-structural is between 1 ~ 4.
Wherein, the interior hole dimension of the side wall insulating layer in described micropore is at least less than described pore size 5um.
Wherein, described micropore is circle or regular polygon, or is with wavy circle or regular polygon, or is with serrate circle or regular polygon.
Wherein, described transparent current extending can adopt tin indium oxide (Indium Tin Oxides writes a Chinese character in simplified form ITO), RuO
x, IrO
x, the three major elements doping of Ga/Al grade in an imperial examination the materials such as ZnO make.
Wherein, the thickness of described transparent current extending is
wherein λ is lambda1-wavelength, and n is the refractive index of described transparent current extending material, and m is integer.
Wherein, described current blocking layer material is SiO
2, SiN
xfilm, or A
2o
3film.
Wherein, described passivation protection layer material is SiO
2, SiN
xfilm, or A
2o
3film.
Wherein, the dielectric material of described side wall insulating layer is SiO
2, Si
3n
4, TiO
2, Al
2o
3, spin-coating glass, polyimides or benzocyclobutene.
Wherein, described lumination of light emitting diode layer surface coarsening.
According to a further aspect in the invention, proposed the preparation method that a kind of metal electrode has the light-emitting diode of array type micro-structural, comprised the following steps:
1) on epitaxial wafer substrate, prepare successively resilient coating, the first type semiconductor layer, Multiple Quantum Well active layer, electronic barrier layer, Second-Type semiconductor layer;
2) in epitaxial wafer surface etch, go out a plurality of micropores to expose the first type semiconductor layer;
3), at epitaxial wafer surface deposition insulating material, make to adhere to insulating material in described a plurality of micropore and form side wall insulating layer; And current barrier layer is prepared in position under Second-Type wire;
4) prepare transparent current extending;
5) make the first type metal electrode and Second-Type metal electrode, and be full of metal in described a plurality of micropores, make described the first type metal electrode realize and being electrically connected to described the first type semiconductor layer by the metal in described a plurality of micropores;
6) make passivation protection layer, and make metal pad exposed outside in order to being electrically connected.Wherein, described step 2) in, adopt the inclination angle of 30 ° ~ 70 ° to etch micropore, make micropore be inverted trapezoidal structure.
Wherein, in described step 3), can adopt lift-off or wet corrosion technique to prepare described side wall insulating layer.
Wherein, in described step 6), adopt plasma reinforced chemical vapour deposition method (PECVD), sputtering method (sputter), atomic layer deposition method (ALD) deposition of insulative material.
Compared with prior art, the present invention has following technique effect:
1, the present invention can effectively improve the problem that light-emitting diode chip for backlight unit active region area significantly reduces.
2, the present invention can improve the luminous power of light-emitting diode.
3, process conditions of the present invention are simple, cost of manufacture is low, processing procedure is easily controlled.
Accompanying drawing explanation
Fig. 1 shows the structure of a kind of typical GaN based power type light-emitting diode in prior art, wherein below be the vertical view of GaN based power type LED surface, top be that GaN based power type light-emitting diode is along the generalized section of A-A face;
Fig. 2 (a) shows the structure of the GaN based power type light-emitting diode in one embodiment of the invention, and wherein below is the vertical view of LED surface; Top be that this light-emitting diode is along the generalized section of A-A face; Its first wire is that noncontinuity is electrically connected, and its micro-structural is circular;
Fig. 2 (b) is the micro-structural partial enlarged drawing of the first type electrode cable of the GaN based power type light-emitting diode shown in Fig. 2 (a);
Fig. 3 (a) is the surperficial vertical view of the GaN based power type light-emitting diode in another embodiment of the present invention;
Fig. 3 (b) is the micro-structural partial enlarged drawing of the first type wire of the GaN based power type light-emitting diode shown in Fig. 3 (a);
Fig. 4 (a) is the surperficial vertical view of the GaN based power type light-emitting diode in another embodiment of the present invention;
Fig. 4 (b) is the micro-structural partial enlarged drawing of the first type wire of the GaN based power type light-emitting diode shown in Fig. 4 (a);
Fig. 5 is the profile of the electric connection micro-structural in one embodiment of the invention; In figure, A represents Second-Type metal node, and B represents side wall insulating layer; C represents transparent current extending; D is each layer of epitaxial wafer that micropore passes;
Fig. 6 (a) is the schematic diagram (not shown electric connection micro-structural) of the adoptable another kind of electrode pattern of the present invention;
Fig. 6 (b) is the schematic diagram (not shown electric connection micro-structural) of adoptable another electrode pattern of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, describe the present invention.
Embodiment mono-
According to one embodiment of present invention, provide a kind of metal electrode to have the light-emitting diode of array type micro-structural, the method comprises the following steps:
(1) first adopt the method for metallochemistry vapour deposition (MOCVD) in Sapphire Substrate, to deposit successively resilient coating, the first type semiconductor layer n-GaN, quantum well, InGaN electronic barrier layer, Second-Type semiconductor layer p-GaN epitaxial loayer, form complete LED P N junction structure;
(2) adopt alloying furnace to carry out annealing in process to the complete epitaxial wafer of growing, excite the Mg doping acceptor of p-GaN;
(3) behind the method processing epitaxial wafer surface that adopts chemical reagent to clean, carry out step etching, expose the first type semiconductor layer n-GaN, this operation is MESA etching technics; Be different from prior art, this step is not carried out etching to the full wafer region on epitaxial wafer surface, but go out a series of micropore in epitaxial wafer surface etch, from the micropore of institute's etching, expose the first type semiconductor layer n-GaN, these micropores form microwell array, for form noncontinuity between the first type semiconductor layer n-GaN and the first type plain conductor, are electrically connected; When MESA etching, the micropore etching has certain gradient, forms inverted trapezoidal structure, and 30 °-70 °, its inclination angle, is beneficial to like this insulating barrier and adheres to and increase sidewall lighting area, thereby in micropore, form side wall insulating layer;
(4) adopt the method for plasma reinforced chemical vapour deposition (PECVD) at crystal column surface deposition one deck SiO
2by the design of reticle, make this insulating barrier part as the current barrier layer (insulating barrier) between Second-Type plain conductor and Second-Type semiconductor layer, another part forms the side wall insulating layer in micropore, for each layer of epitaxial wafer that the first type plain conductor and the micropore of micropore are passed, separates;
(5) use thin film evaporation equipment at epitaxial wafer surface evaporation one deck ITO transparent conductive film, its thickness changes according to lambda1-wavelength and ITO refractive index, can determine by following formula:
In formula, λ is lambda1-wavelength, and n is the refractive index of ito thin film, and m is integer, and t is the thickness of ito thin film.
(6) ito thin film photoetching, prepares current extending consistent with MESA shape, the little 5um of size;
(7) at 450 ℃ of high temperature and N
2under atmosphere, ITO is annealed, annealing time is 30 minutes.
(8) metal electrode preparation, utilizes negative photoresist to prepare metal electrode pattern at crystal column surface, and on electron beam evaporation equipment, completes electrode evaporation; Wherein, when evaporation the first type electrode, except insulating barrier upper surface is produced required pattern, also need in micropore, fill full metal, make the first type semiconductor layer n-GaN realize and being electrically connected with the metal electrode that is produced on insulating barrier upper surface by the metal in micropore;
(9) at 400 ℃ of high temperature and N
2under atmosphere, metal electrode is carried out to alloying, annealing time is 30 minutes;
(10) use PECVD equipment deposition passivation protection layer and by photoetching, etching process, remove the passivation layer on metal pad (PAD) surface.
Fig. 2 shows the light-emitting diode that adopts the prepared metal electrode of said method to have array type micro-structural.As shown in Figure 2, this light-emitting diode comprises from the bottom to top successively: epitaxial loayer substrate 100, low temperature buffer layer 101, the first type semiconductor layer 102, Multiple Quantum Well active layer 103, electronic barrier layer 104, Second-Type semiconductor layer 105, transparent current extending 106 and current barrier layer 107.Wherein on transparent current extending 106, there is Second-Type plain conductor 108, between Second-Type metal pad and transparent current extending 106, with current barrier layer 107, separate, insulating barrier 110 preparations are on transparent current extending 106, the first type plain conductor 109 is produced on insulating barrier 110, is insulated layer 110 and separates between such the first type plain conductor 109 and transparent current extending 106.The vertical view of the first type plain conductor 109 and figure that Second-Type plain conductor 108 forms as shown in Figure 2 (a) shows.The first type semiconductor layer 102 is realized and being electrically connected with the first type plain conductor 109 that is positioned at epitaxial wafer surface by the metal in a series of micropores (can be described as the electrical connected node of metal, hereinafter do not repeating).In addition; the light-emitting diode of the present embodiment also has first type metal pad, the Second-Type metal pad corresponding with the first type plain conductor 109, Second-Type plain conductor 108; the superiors of light-emitting diode also deposit passivation protection layer, and these are all not shown in Figure 2.In the present embodiment, realize noncontinuity be electrically connected between the first type semiconductor layer n-GaN and the first type plain conductor by the micro-structural in micropore, this micro-structural is as shown in Fig. 2 (b), and the shape of this micro-structural is circular.Wherein c1 is: the diameter at minimum place, insulating barrier aperture (can understand with reference to figure 5), c2 is: the electric connection node diameter of plain conductor, c3 is: the opening diameter of MESA etching, c4 is: transparent current extending opening diameter, c5 is: diameter of a circle outside insulating barrier.The size of the micro-structural of the present embodiment and spacing can according to circumstances be selected flexibly.The overall dimensions of micro-structural is between 20um-50um, and the spacing of micro-structural and the ratio of microstructure size are between 1-4.In addition, insulating barrier aperture minimum place size both can be greater than and also can be less than the electrical connected node size of metal.More than insulating barrier endoporus is generally less than MESA etching size 5um.
Embodiment bis-
According to one embodiment of present invention, provide another kind of metal electrode to have the light-emitting diode of array type micro-structural, the method comprises the following steps:
(1) first adopt the method for metallochemistry vapour deposition (MOCVD) in Sapphire Substrate, to deposit successively resilient coating, n-GaN, quantum well, p-InGaN electronic barrier layer, p-GaN epitaxial loayer, form complete LED P N junction structure;
(2) adopt alloying furnace to carry out annealing in process to the complete epitaxial wafer of growing, excite the Mg doping acceptor of p-GaN;
(3) behind the method processing epitaxial wafer surface that adopts chemical reagent to clean, carry out step etching, expose n-GaN; Be different from prior art, this step is not carried out etching to the full wafer region on epitaxial wafer surface, but go out a series of micropore in epitaxial wafer surface etch, from the micropore of institute's etching, expose the first type semiconductor layer n-GaN, these micropores form microwell array, for form noncontinuity between the first type semiconductor layer n-GaN and the first type plain conductor, are electrically connected; When MESA etching, the micropore etching has certain gradient, forms inverted trapezoidal structure, and 30 °-70 °, its inclination angle, is beneficial to like this insulating barrier and adheres to, thereby form side wall insulating layer in micropore;
(4) adopt lift-off technique to prepare current barrier layer (in finished product, this current barrier layer is positioned under Second-Type metal pad, for Second-Type metal pad and transparent current extending are separated) and side wall insulating layer that each layer of epitaxial wafer that the first type plain conductor micro-structural and micropore pass separated; Its step is as follows:
First, use positive photoresist to prepare required insulating layer pattern at crystal column surface;
Secondly, by the method for spin coating, at the crystal column surface spin coating spin-coating glass (SOG) with photoetching agent pattern, carry out the film forming of insulating barrier;
Again, on the hot plate of 120 ° of C, toast wafer 10min, make spin-coating glass insulating barrier primary solidification; Then, wafer is immersed in positive photoresist cleaning solution, sonic oscillation 20min, removes the photoresist below spin-coating glass;
Finally, the wafer cleaning up is solidified in 500 ° of C high temperature furnace pipes to 30min;
(5) use thin film evaporation equipment at epitaxial wafer surface evaporation one deck ITO transparent conductive film, its thickness changes according to lambda1-wavelength and ITO refractive index, can determine by following formula:
In formula, λ is lambda1-wavelength, and n is the refractive index of ito thin film, and m is integer, and t is the thickness of ito thin film.
(6) ito thin film photoetching, prepares current extending consistent with MESA shape, the little 5-10um of size;
(7) at 450 ℃ of high temperature and N
2under atmosphere, ITO is annealed, annealing time is 30 minutes.
(8) metal electrode preparation, utilizes negative photoresist to prepare metal electrode pattern at crystal column surface, and on electron beam evaporation equipment, completes electrode evaporation;
(9) at 400 ℃ of high temperature and N
2under atmosphere, metal electrode is carried out to alloying, annealing time is 30 minutes;
(10) use PECVD equipment deposit passivation layer and by photoetching, etching process, remove the passivation layer on PAD surface.
The overall structure of the light-emitting diode of the present embodiment is consistent with embodiment mono-, repeats no more.The difference of the present embodiment is to realize between the first type semiconductor layer n-GaN and the first type plain conductor the shape that the micro-structural in the micropore that noncontinuity is electrically connected adopts.As shown in Figure 3 (b), the shape of the micro-structural of the present embodiment is the circle with wave concaveconvex structure, and this circle with wave concaveconvex structure has the effect of further increase sidewall lighting area.Wherein c1 ' is: the diameter at minimum place, insulating barrier aperture (can understand with reference to figure 5), r0 is: waveform half radius of a circle on the electric connection node of plain conductor, r1 is: waveform half radius of a circle on MESA aperture, r2 is: waveform half radius of a circle on transparent current extending aperture, r3 is: waveform half radius of a circle on insulating barrier outer ledge, a1 is: the electric connection node of plain conductor and the distance between MESA aperture, a2 is: the distance between transparent current extending aperture and MESA aperture, a3 is: the distance between transparent current extending aperture and insulating barrier outer ledge.The size of the micro-structural of the present embodiment and spacing can according to circumstances be selected flexibly.The overall dimensions of micro-structural is between 20um-50um, and the spacing of micro-structural and the ratio of microstructure size are between 1-4.In addition, insulating barrier aperture minimum place size both can be greater than and also can be less than the electrical connected node size of metal.More than insulating barrier endoporus is generally less than MESA etching size 5um.
Embodiment tri-
According to one embodiment of present invention, provide another metal electrode to have the light-emitting diode of array type micro-structural, the method comprises the following steps:
(1) first adopt the method for metallochemistry vapour deposition (MOCVD) in Sapphire Substrate, to deposit successively resilient coating, n-GaN, quantum well, P-InGaN electronic barrier layer, P-GaN epitaxial loayer, form complete LED P N junction structure;
(2) adopt alloying furnace to carry out annealing in process to the complete epitaxial wafer of growing, excite the Mg doping acceptor of p-GaN;
(3) behind the method processing epitaxial wafer surface that adopts chemical reagent to clean, carry out step etching, expose n-GaN; Be different from prior art, this step is not carried out etching to the full wafer region on epitaxial wafer surface, but go out a series of micropore in epitaxial wafer surface etch, from the micropore of institute's etching, expose the first type semiconductor layer n-GaN, these micropores form microwell array, for form noncontinuity between the first type semiconductor layer n-GaN and the first type plain conductor, are electrically connected; When MESA etching, the micropore etching has certain gradient, forms inverted trapezoidal structure, and 30 °-70 °, its inclination angle, is beneficial to like this insulating barrier and adheres to, thereby form side wall insulating layer in micropore;
(4) adopt crystal column surface deposition one deck SiO of the method for PECVD deposition
2, by the method for photoetching and wet etching, prepare current barrier layer, in final finished product, this current barrier layer is positioned under Second-Type metal pad, for Second-Type metal pad and transparent current extending are separated;
(5) side wall insulating layer that each layer of epitaxial wafer that adopts the preparation of lift-off technique that the first type plain conductor micro-structural and micropore are passed separates; Its step is as follows:
First, use positive photoresist to prepare required insulating layer pattern at crystal column surface;
Secondly, by the method for spin coating, at the crystal column surface spin coating spin-coating glass (SOG) with photoetching agent pattern, carry out the film forming of insulating barrier;
Again, on the hot plate of 120 ° of C, toast wafer 10min, make spin-coating glass insulating barrier primary solidification;
Then, wafer is immersed in positive photoresist cleaning solution, sonic oscillation 20min, removes the photoresist below spin-coating glass;
Finally, the wafer cleaning up is solidified in 500 ° of C high temperature furnace pipes to 30min;
(6) use thin film evaporation equipment at epitaxial wafer surface evaporation one deck ITO transparent conductive film, its thickness changes according to lambda1-wavelength and ITO refractive index, can determine by following formula:
In formula, λ is lambda1-wavelength, and n is the refractive index of ito thin film, and m is integer, and t is the thickness of ito thin film.
(7) ito thin film photoetching, prepares current extending consistent with MESA shape, the little 5um of size;
(8) at 450 ℃ of high temperature and N
2under atmosphere, ITO is annealed, annealing time is 30 minutes.
(9) metal electrode preparation, utilizes negative photoresist to prepare metal electrode pattern at crystal column surface, and on electron beam evaporation equipment, completes electrode evaporation;
(10) at 400 ℃ of high temperature and N
2under atmosphere, metal electrode is carried out to alloying, annealing time is 30 minutes;
(11) use PECVD equipment deposit passivation layer and by photoetching, etching process, remove the passivation layer on PAD surface.
The overall structure of the light-emitting diode of the present embodiment is consistent with embodiment mono-, repeats no more.The difference of the present embodiment is to realize between the first type semiconductor layer n-GaN and the first type plain conductor the shape that the micro-structural in the micropore that noncontinuity is electrically connected adopts.As shown in Figure 4 (b), the shape of the micro-structural of the present embodiment is regular hexagon, and this shape has the effect of the total reflection probability that reduces light.
In figure, c1 is: the length of side at minimum place, insulating barrier aperture (can understand with reference to figure 5), b1 is: the electric connection node length of side of plain conductor, b2 is: the length of side in MESA hole, b3 is: the length of side in transparent current extending hole, b4 is: the length of side of insulating barrier lateral profile.The size of the micro-structural of the present embodiment and spacing can according to circumstances be selected flexibly.The overall dimensions of micro-structural is between 20um-50um, and the spacing of micro-structural and the ratio of microstructure size are between 1-4.In addition, insulating barrier aperture minimum place size both can be greater than and also can be less than the electrical connected node size of metal.Insulating barrier endoporus is generally less than MESA etching size 5um.
In above-described embodiment, the first wire beyond micro-structural does not contact with the first type semiconductor layer, but be attached to the second semiconductor surface by insulating barrier, so just traditional the first type metal electrode place etch areas is prepared into noncontinuity electric interconnection structure, thereby reduce etching area, improve the area utilization of light-emitting diode active area, promote the light extraction efficiency of chip.
In addition, the present invention, when utilizing metal micro structure to realize noncontinuity electrical interconnection, can also make micro-structural on light-emitting diode chip for backlight unit luminescent layer surface so that luminescent layer surface coarsening, thereby further improve chip light-emitting efficiency.
Need explanation time, electrode pattern of the present invention is not limited to the pattern shown in Fig. 1, Fig. 2, for example 2 kinds of patterns shown in Fig. 6 (a) and (b) also can be adopted by the present invention.Certainly, not shown electric connection micro-structural in Fig. 6, the present invention need to increase electric connection micro-structural in use on the basis of Fig. 6 (a) and (b) pattern, and this is that those skilled in the art are understandable.
Finally it should be noted that, above embodiment is only in order to describe technical scheme of the present invention rather than this technical method is limited, the present invention can extend to other modification, variation, application and embodiment in application, and therefore thinks that all such modifications, variation, application, embodiment are in spirit of the present invention and teachings.
Claims (18)
1. a metal electrode has the light-emitting diode of array type micro-structural, comprise epitaxial wafer substrate and the sandwich construction of preparation on epitaxial wafer substrate, described sandwich construction is followed successively by resilient coating from the bottom to top, the first type semiconductor layer, Multiple Quantum Well active layer, electronic barrier layer, Second-Type semiconductor layer and transparent current extending, the first type metal electrode and the preparation of Second-Type metal electrode are on transparent current extending, metal electrode protection pad and wire two parts, and two parts Nature Link, between the first type metal electrode and transparent current extending and Second-Type semiconductor layer, by insulating barrier, separated, between the pad of Second-Type metal electrode and transparent current extending, by current barrier layer, separated, described the first type metal electrode is realized and being electrically connected to described the first type semiconductor layer by the micropore of a plurality of filling metals, between each layer of light-emitting diode that metal in described micropore and micropore pass, there is side wall insulating layer, the superiors of described light-emitting diode deposit passivation protection layer.
2. light-emitting diode according to claim 1, is characterized in that, described micropore has the gradient, forms inverted trapezoidal structure.
3. light-emitting diode according to claim 3, is characterized in that, the inclination angle of the gradient of described micropore is 30 ° ~ 70 °.
4. light-emitting diode according to claim 1, is characterized in that, described the first type metal electrode has electric connection micro-structural at described micropore place, is electrically connected the overall dimensions of micro-structural between 20um ~ 50um.
5. light-emitting diode according to claim 4, is characterized in that, described electric connection micro-structural is distributed on the wire of described the first type metal electrode with a determining deviation.
6. light-emitting diode according to claim 5, is characterized in that, the ratio of the overall dimensions of the spacing of described electric connection micro-structural and described electric connection micro-structural is between 1～4.
7. light-emitting diode according to claim 6, is characterized in that, the interior hole dimension of the side wall insulating layer in described micropore is at least less than described pore size 5um.
8. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, described micropore is circle or regular polygon, or is with wavy circle or regular polygon, or is with serrate circle or regular polygon.
9. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, described transparent current extending adopts ITO, RuO
x, IrO
xor the ZnO of the 3rd major element doping makes.
10. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, the thickness of described transparent current extending is
, wherein λ is lambda1-wavelength, and n is the refractive index of described transparent current extending material, and m is integer.
11. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, described current blocking layer material is SiO
2film, SiN
xfilm or Al
2o
3deielectric-coating.
12. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, the dielectric material of described passivation protection layer is SiO
2, Si
3n
4or Al
2o
3.
13. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, the dielectric material of described side wall insulating layer is SiO
2, Si
3n
4, TiO
2, Al
2o
3, spin-coating glass, polyimides or benzocyclobutene.
14. according to the light-emitting diode described in any one in claim 1 to 7, it is characterized in that, described lumination of light emitting diode layer surface coarsening.
15. 1 kinds of metal electrodes have the preparation method of the light-emitting diode of array type micro-structural, comprise the following steps:
1) on epitaxial wafer substrate, prepare successively resilient coating, the first type semiconductor layer, Multiple Quantum Well active layer, electronic barrier layer and Second-Type semiconductor layer;
2) in epitaxial wafer surface etch, go out a plurality of micropores to expose the first type semiconductor layer;
3), at epitaxial wafer surface deposition insulating material, make to adhere to insulating material in described a plurality of micropore and form side wall insulating layer; And current barrier layer is prepared in position under Second-Type metal electrode pad;
4) prepare transparent current extending;
5) make the first metal electrode and Second-Type metal electrode, and be full of metal in described a plurality of micropores, make described the first type metal electrode realize and being electrically connected to described the first type semiconductor layer by the metal in described a plurality of micropores;
6) make passivation protection layer, and make metal pad exposed outside in order to being electrically connected.
The preparation method of 16. light-emitting diodes according to claim 15, is characterized in that, described step 2) in, adopt the inclination angle of 30 ° ~ 70 ° to etch micropore, make micropore be inverted trapezoidal structure.
The preparation method of 17. light-emitting diodes according to claim 15, is characterized in that, in described step 4), adopts lift-off or wet corrosion technique to prepare described side wall insulating layer.
The preparation method of 18. light-emitting diodes according to claim 15, is characterized in that, in described step 6), adopts plasma reinforced chemical vapour deposition method, sputtering method, atomic layer deposition method deposition of insulative material.
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