CN102611465B - Coder of structured q-ary irregular repeat-accumulate code and coding method of coder - Google Patents

Abstract

The invention discloses a coder of a structured q-ary irregular repeat-accumulate (S-QIRA) code and a coding method of the coder, solving the problem that the existing coder of a q-ary irregular repeat-accumulate (QIRA) code is insufficient in parallelism and low in coding speed. The coder divides information symbol sequences to be coded into a plurality of subgroups; the symbol sequences in the subgroups are subjected to repetitive operation, interleaving operation, GF(q) weighting operation, merging operation and accumulation operation in sequence according to the groups; symbols in the same subgroup are processed in a parallel manner in each step and operated at the same time, and therefore, the degree of parallelism and the coding speed of the coder are effectively improved; and a produced check matrix of the S-QIRA code has a 'category' quasi-cycle structure, which can greatly reduce a memory unit for storing the check matrix of the coder and effectively reduce the complexity of hardware realization of the coder. The coder disclosed by the invention can be applied to correct the error in information transmission of a physical layer in a modern communication system.

Description

Structuring multiple irregular repeats encoder and the coding method of accumulated codes

Technical field

The invention belongs to communication technical field, particularly relate to a kind of encoder and coding method thereof of structuring multiple irregular RA code, can be used for the error control of transmitting data in physical layer.

Background technology

Low-density check LDPC code is proposed in 1962 by Gallager the earliest, and MacKay, Neal equal nineteen ninety-five LDPC code has been carried out to " finding " again, and have proved that its code length has the error control performance of approaching Shannon limit while being tending towards infinite.1998, Davey and MacKay were generalized to high-order limited territory GF (q) by binary LDPC code, on q > 2.Study and show widely, the multielement LDPC code based on GF (q) is better than binary LDPC code and Turbo code in short-and-medium code length performance.Particularly, multielement LDPC code is compared binary LDPC code and is had the following advantages: 1) multielement LDPC code has stronger antiburst error ability; 2) multielement LDPC code has lower error floor; 3) multielement LDPC code is preferably combines with High Order Modulation System; Yet initial multielement LDPC code is defined in the sparse check matrix of random configuration, so its encoder complexity is very high.In order to address this problem, needing structure to have can fast coding structure and the multielement LDPC code of error control function admirable.

Numerous can the multielement LDPC code structural scheme of fast coding in, multiple irregular repeats accumulation (Q-aryIrregular Repeat-Accumulate, QIRA) code can be by repeating and accumulating operation carry out simple and quick coding.Such yard combines the good Parallel Iteration Decoding Method performance of low encoder complexity and the multielement LDPC code of Turbo code.Fig. 1 has shown the coder structure of QIRA code, comprising duplication code, weighter, symbol interleaver, combiner, accumulator and multiplexer six parts.As seen from Figure 1, QIRA code can complete low encoding complexity by the mode of serially concatenated.Suppose that code length is that the information symbol length of the QIRA code of N is K, checking symbol length is M, and its specific coding process comprises the steps:

1) the symbol u in input message symbol sebolic addressing u _i, i=1 ..., K repeats r by duplication code _iinferior, obtain symbol sebolic addressing v;

2) in symbol sebolic addressing v, each symbol carries out the weighting of GF (q) multiplication by weighter, carries out sequence subsequently interweave by symbol interleaver, obtains output symbol sequence

3) symbol sebolic addressing by combiner, by symbol, press coefficient a _i, i=1 ..., M carries out union operation, and obtaining length is the symbol sebolic addressing w of M;

4) accumulator carries out cumulative sum ranking operation to each symbol in w, and the symbol sebolic addressing p that the length of output is M is the checking symbol sequence of encoder;

5) multiplexer carries out multiplexingly to information symbol sequence u and checking symbol sequence p, obtains the final output QIRA code code word c=(u, p) of encoder;

In above cataloged procedure, each computing is all defined on finite field gf (q).The check matrix H of the QIRA code being generated by this coded system is comprised of two parts: H=[H _u, H _p], H wherein _upart has random structure, H _ppart is:

As shown in Figure 2, its decoding can be carried out Parallel Iteration Decoding Method, m=r in Fig. 2 to the factor graph of the QIRA code generating on this factor graph ₁+ r ₂.

In sum, QIRA code can carry out fast coding by cascade duplication code and convolution code as serial concatenation of codes, can on its factor graph, carry out Parallel Iteration Decoding Method to obtain good performance as multielement LDPC code simultaneously.

Yet encoder and the coding method of described traditional Q IRA code lack certain concurrency, thereby have affected its coding rate.And the QIRA code that this coding method generates lacks structural, thereby be unfavorable for storage and the realization of High Speed of decoder.

Summary of the invention

The object of the invention is to overcome the encoder of above-mentioned traditional Q IRA code and the deficiency of coding method, provide a kind of structuring multiple irregular to repeat to accumulate encoder and the corresponding encoded method of S-QIRA code, to improve concurrency and the coding rate of encoder, and make the S-QIRA code generating there is ' class ' quasi-cyclic characteristic, thereby simplify storage and the hardware realization of corresponding decoder.

For achieving the above object, encoder of the present invention comprises:

Grouping duplicator: for completing the grouping repetitive operation to symbol sebolic addressing, wherein every group of length is s;

Class symbol interleaver: in order to complete the block interleaved operation to symbol sebolic addressing;

Grouping GF (q) weighter I: in order to complete, symbol sebolic addressing is carried out to packet-weighted operation by GF (q) nonzero element, wherein every group of internal symbol adopts same weight coefficient;

Packet combining device: in order to complete the packet combining operation to symbol sebolic addressing, the every group code wherein generating adopts equal merge coefficient;

Grouping accumulator: in order to symbol sebolic addressing is sorted, and the symbol sebolic addressing grouping after sequence is carried out to the cumulative operation of weighted sum on GF (q);

Multiplexer: in order to two symbol sebolic addressing serials are multiplexed with to 1 symbol sebolic addressing;

Above each several part is serially connected from top to bottom, completes the serial code operation to information symbol sequence.

Described grouping accumulator comprises:

Sorting unit, grouping GF (q) weighter II, register and GF (q) adder unit, the input of grouping accumulator directly enters sorting unit, sorting unit completes exporting GF (q) adder unit after the sorting operation of symbol sebolic addressing to, GF (q) adder unit carries out GF (q) add operation to the output of sorting unit and grouping GF (q) weighter II, its output is as the output of grouping accumulator, by register, enter grouping GF (q) weighter II simultaneously, after grouping GF (q) weighter II carries out packet-weighted to symbol sebolic addressing by GF (q) nonzero element, feed back input is to GF (q) adder unit, wherein GF (q) represents that size is the finite field of q.

For achieving the above object, coding method of the present invention, comprises the steps:

(1) grouping repeating step:

To code length, be that N, information symbol length are that the multiple irregular repetition accumulated codes that K, checking symbol length are M=N-K is encoded, first by information symbol sequence u=(u to be encoded ₀, u ₁..., u _k-1) be divided into long k=K/s the U that divides into groups for s ⁽⁰⁾..., U ^(k-1), more by group to each grouping U ^(l)in symbol carry out repetition, 0≤l < k wherein, on the same group in each symbol number of repetition be r _l, make r=(r ₁+ ...+r _k-1)/k is that the average number of repetition of all symbols is r, and obtaining length is the replicator sequence v of rK:

(2) block interleaved step:

2a) the accurate cyclic check matrix H=[H of definition encoder corresponding ' class ' _u, H _p], H wherein _ufor information matrix array, H _pfor dual-diagonal matrix array, be expressed as follows:

In formula represent that size is the unit matrix I of s _seach row is cyclic shift B to the right _{i, j}the inferior square formation obtaining, δ _{i, j}represent the nonzero element on GF (q), 0≤i≤m-1,0≤j≤k-1;

In formula 0 _srepresent that size is complete zero square formation of s, γ _ifor the nonzero element on GF (q), represent that size is the square formation of s:

2b) make a _ithe i every trade weight of information matrix array in the corresponding check matrix H of presentation code device, h _{i, j}for the i of this matrix array capable in the row mark of j nonzero circle shift matrix, b _{i, j}for the cyclic shift coefficient of this cyclic shift matrices, definition interweave subscript sequence (π (0) ..., π (rK-1))=(π ₀, π ₁..., π _m-1), m=M/s wherein,

π _i＝(π _i(0)，π _i(1)，...，π _i(s-1))，0≤i≤m-1，

${\mathrm{\&pi;}}_i\left(t\right)=({\mathrm{sh}}_{i,0}+(b_{i,0}+t)\mathrm{mod}s...,{\mathrm{sh}}_{i,a_i-1}+(b_{i,a_i-1}+t)\mathrm{mod}s),0\&le;t\&le;s-1,$

2c) according to the above-mentioned subscript sequence that interweaves, replicator sequence v is carried out to block interleaved, obtain interleaved symbol sequence

$\stackrel{\&OverBar;}{v}=({\stackrel{\&OverBar;}{v}}_1,...,{\stackrel{\&OverBar;}{v}}_{\mathrm{rK}-1})=(u_{\mathrm{\&pi;}\left(0\right)},u_{\mathrm{\&pi;}\left(1\right)},...,u_{\mathrm{\&pi;}(\mathrm{rK}-1)});$

(3) grouping GF (q) weighting step:

3a) make β represent weight coefficient sequence, it is the grouping of s that β is divided into m=M/s long:

Wherein be the i of the corresponding information matrix array of encoder GF (q) the nonzero element sequence in capable, wherein GF (q) represents that size is the finite field of q;

3b) to interleaved symbol sequence in every multiply each other between two in order with every in weight coefficient sequence β, obtain weighting symbol sebolic addressing

(4) packet combining step:

4a) make A _dthe d every trade weight of the corresponding information matrix of presentation code device, 0≤d≤M-1, definition merge coefficient sequence A=(A ₀..., A _m-1), A wherein ₀+ A ₁+ ... + A _m-1=rK;

4b) to weighting symbol sebolic addressing in each symbol by every in merge coefficient sequence A, merge successively, obtaining length is the merging symbol sebolic addressing w=(w of M ₀..., w _m-1), wherein

$w_0={\hat{v}}_0+\&CenterDot;\&CenterDot;\&CenterDot;+{\hat{v}}_{A_0-1}$

$w_1={\hat{v}}_{A_0}+\&CenterDot;\&CenterDot;\&CenterDot;+{\hat{v}}_{A_0+A_1-1}$

$\begin{array}{c}.\\ .\\ .\end{array};$

$w_{M-1}={\hat{v}}_{A_0+A_1+\&CenterDot;\&CenterDot;\&CenterDot;+A_{M-2}}+\&CenterDot;\&CenterDot;\&CenterDot;+{\hat{v}}_{A_0+A_1+\&CenterDot;\&CenterDot;\&CenterDot;+A_{M-1}-1}$

(5) grouping accumulation step:

5a) will merge each symbol w in symbol sebolic addressing w ₀..., w _m-1sort in the following order:

((w ₍₀₎，...，w _(0)+(m-1)s)，...，(w _(s-1)，w _(s-1)+s，...，w _(s-1)+(m-1)s))，

This sequence is sequence symbol sebolic addressing

5b) right carry out accumulating operation, be about to middle symbol by register and after GF (q) weighting again with symbol add up, obtain symbol p _d, wherein 0 < d≤M-1, and then the raw checking symbol sequence p=(p that grows into M ₀..., p _m-1);

(6) multiplexer carries out information symbol sequence u and checking symbol sequence p multiplexing, and obtaining encoder length is the final output codons c=(u, p) of N.

Tool of the present invention has the following advantages:

Encoder of the present invention is due to information symbol sequence to be encoded is divided into some groupings, again to the symbol sebolic addressing after grouping by group divide into groups successively repetition, block interleaved, grouping GF (q) weighting, packet combining, grouping accumulating operation, and all the symbol in same grouping is carried out to parallel processing in each step, effectively raise the degree of parallelism of encoder; Because encoder carries out computing to every group of internal symbol simultaneously, further improved coding rate simultaneously; The check matrix H of the S-QIRA code generating due to coding method of the present invention in addition has ' class ' quasi-cyclic, has not only greatly reduced decoder and has stored the required memory cell of this check matrix, and effectively reduced the hardware implementation complexity of decoder.

Simulation result shows, the S-QIRA code based on GF (64) that the encoder proposing and specific coding method generate all has good error control performance under BPSK-AWGN channel and 64QAM-Rayleigh fading channel.

Below in conjunction with accompanying drawing, the present invention is described in detail.

Accompanying drawing explanation

Fig. 1 is the coder structure block diagram of traditional Q IRA code;

Fig. 2 is the factor graph of traditional Q IRA code;

Fig. 3 is the coder structure of S-QIRA code of the present invention;

Fig. 4 is the coding flow chart of S-QIRA code of the present invention;

Fig. 5 is the analogous diagram of S-QIRA code of the present invention on BPSK-AWGN channel;

Fig. 6 is the analogous diagram of S-QIRA code of the present invention in 64QAM-Rayleigh fading channel.

Embodiment

With reference to Fig. 3, the encoder that the structuring multiple irregular that the present invention proposes repeats accumulated codes comprises: grouping duplicator, class symbol interleaver, grouping GF (q) weighter, packet combining device, grouping accumulator and multiplexer six parts.Wherein, the input message symbol sebolic addressing u of encoder directly enters grouping duplicator, by grouping duplicator, completes the grouping repetitive operation to u, and every group of length is s, obtains replicator sequence v; Class symbol interleaver carries out block interleaved operation to the output symbol sequence v of grouping duplicator, and it is output as interleaved symbol sequence grouping GF (q) weighter is to interleaved symbol sequence by GF (q) nonzero element, carry out packet-weighted operation, wherein every group of internal symbol adopts same weight coefficient, obtains weighting symbol sebolic addressing packet combining device is to weighting symbol sebolic addressing carry out packet combining operation, every group code of generation adopts equal merge coefficient, and its output merges symbol sebolic addressing w and is connected to grouping accumulator; Grouping accumulator comprises: sorting unit, cumulative GF (q) weighter, register and GF (q) adder unit four parts.This sorting unit completes exporting GF (q) adder unit after the sorting operation of symbol sebolic addressing to, this GF (q) adder unit carries out GF (q) add operation to the output of sorting unit and cumulative GF (q) weighter, its output is the checking symbol sequence p of grouping accumulator output, checking symbol sequence p enters cumulative GF (q) weighter by register simultaneously, this cumulative GF (q) weighter in p every by GF (q) nonzero element, carry out packet-weighted after feed back input to GF (q) adder unit, above-mentioned symbol GF (q) represents that size is the finite field of q; It is multiplexing that multiplexer carries out serial to information symbol sequence u and checking symbol sequence p, obtains the final output codons c=(u, p) of encoder.

With reference to Fig. 4, utilize above-mentioned encoder to encode, comprise the steps:

Step 1, to the information symbol sequence repetitive operation of dividing into groups:

1a) grouping is divided:

To code length, be that N, information symbol length are that the multiple irregular repetition accumulated codes that K, checking symbol length are M=N-K is encoded, first by information symbol sequence u=(u to be encoded ₀, u ₁..., u _k-1) be divided into long k=K/s the U that divides into groups for s ⁽⁰⁾..., U ^(k-1),

Wherein:

$U^{\left(l\right)}=(U_0^{\left(l\right)},...,U_{s-1}^{\left(l\right)}),0\&le;l<k;$

1b) symbol repeats:

By group according to l=0,1 ..., the order of k-1 is to each U that divides into groups ^(l)in symbol carry out repetition, on the same group in each symbol number of repetition be all made as rl, make r _l=(r ₀+ ...+r _k-1)/k is the average number of repetition of all symbols, and obtaining length is the replicator sequence v of rK:

Step 2, replicator sequence is carried out to block interleaved operation:

2a) definition check matrix:

The accurate cyclic check matrix H=[H of definition encoder corresponding ' class ' _u, H _p], H wherein _ufor information matrix array, H _pfor dual-diagonal matrix array, be expressed as follows:

δ in formula _{i, j}represent the field element on GF (q), 0≤i≤m-1,0≤j≤k-1, represent that size is the unit matrix I of s _seach row is cyclic shift B to the right _{i, j}the inferior square formation obtaining, for example B _{i, j}=1 o'clock:

In formula 0 _srepresent that size is complete zero square formation of s, γ _ifor the nonzero element on GF (q), represent that size is the square formation of s:

2b) define the subscript sequence that interweaves:

Make a _iinformation matrix array H in the corresponding check matrix H of presentation code device _ui every trade weight, h _{i, j}for the i of this matrix array capable in the row mark of j nonzero circle shift matrix, b _{i, j}for the cyclic shift coefficient of this cyclic shift matrices, definition interweave subscript sequence (π (0) ..., π (rK-1))=(π ₀, π ₁..., π _m-1), m=M/s wherein,

π _i＝(π _i(0)，π _i(1)，...，π _i(s-1))，0≤i≤m-1，

${\mathrm{\&pi;}}_i\left(t\right)=({\mathrm{sh}}_{i,0}+(b_{i,0}+t)\mathrm{mod}s,...,{\mathrm{sh}}_{i,a_i-1}+(b_{i,a_i-1}+t)\mathrm{mod}s),0\&le;t\&le;s-1;$

2c) block interleaved:

According to the above-mentioned subscript sequence that interweaves, replicator sequence v is carried out to block interleaved, obtain interleaved symbol sequence

$\stackrel{\&OverBar;}{v}=({\stackrel{\&OverBar;}{v}}_1,...,{\stackrel{\&OverBar;}{v}}_{\mathrm{rK}-1})=(u_{\mathrm{\&pi;}\left(0\right)},u_{\mathrm{\&pi;}\left(1\right)},...,u_{\mathrm{\&pi;}(\mathrm{rK}-1)}).$

Step 3, interleaved symbol sequence is carried out to GF (q) weighting operation:

3a) definition weight coefficient sequence:

Make β represent weight coefficient sequence, it is the grouping of s that β is divided into m=M/s long:

Wherein be the i of the corresponding information matrix array of encoder GF (q) the nonzero element sequence in capable, wherein GF (q) represents that size is the finite field of q;

3b) sequence multiplies each other:

To interleaved symbol sequence in every multiply each other between two in order with every in weight coefficient sequence β, obtain weighting symbol sebolic addressing

Step 4, weighting symbol sebolic addressing is carried out to packet combining operation:

4a) definition merge coefficient sequence:

Make A _dthe d every trade weight of the corresponding information matrix of presentation code device, 0≤d≤M-1, definition merge coefficient sequence A=(A ₀..., A _m-1), A wherein ₀+ A ₁+ ... + A _m-1=rK;

4b) symbol merging:

To weighting symbol sebolic addressing in each symbol by every in merge coefficient sequence A, merge successively, obtaining length is the merging symbol sebolic addressing w=(w of M ₀..., w _m-1), wherein

$w_0={\hat{v}}_0+\&CenterDot;\&CenterDot;\&CenterDot;+{\hat{v}}_{A_0-1}$

$w_1={\hat{v}}_{A_0}+\&CenterDot;\&CenterDot;\&CenterDot;+{\hat{v}}_{A_0+A_1-1}$

$w_{M-1}={\hat{v}}_{A_0+A_1+\&CenterDot;\&CenterDot;\&CenterDot;+A_{M-2}}+\&CenterDot;\&CenterDot;\&CenterDot;+{\hat{v}}_{A_0+A_1+\&CenterDot;\&CenterDot;\&CenterDot;+A_{M-1}-1};$

Step 5, is combined the symbol sebolic addressing cumulative operation of dividing into groups:

5a) be combined each symbol w in symbol sebolic addressing w ₀..., w _m-1sort, obtain the symbol sebolic addressing that sorts $\stackrel{\&OverBar;}{w}=({\stackrel{\&OverBar;}{w}}_0,...,{\stackrel{\&OverBar;}{w}}_{M-1}),$ Wherein:

$({\stackrel{\&OverBar;}{w}}_0,...,{\stackrel{\&OverBar;}{w}}_{M-1})=((w_{\left(0\right)},...,w_{\left(0\right)+(m-1)s}),...,(w_{(s-1)},w_{(s-1)+s},...,w_{(s-1)+(m-1)s}));$

5b) to sequence symbol sebolic addressing carry out accumulating operation, be about to middle symbol by register and after GF (g) weighting again with symbol add up, obtain symbol p _d, wherein 0 < d≤M-1, and then the raw checking symbol sequence p=(p that grows into M ₀..., p _m-1), be specially:

$p_0={\stackrel{\&OverBar;}{w}}_0$

$p_s={\mathrm{\&gamma;}}_0{p}_0+{\stackrel{\&OverBar;}{w}}_1$

$p_{(m-1)s}={\mathrm{\&gamma;}}_{m-2}{p}_{(m-2)s}+{\stackrel{\&OverBar;}{w}}_{m-1}$

For i=1,2 ..., s-1, has

$p_i={\mathrm{\&gamma;}}_{m-1}{p}_{i-1+(m-1)s}+{\stackrel{\&OverBar;}{w}}_{\mathrm{mi}}$

$p_{i+s}={\mathrm{\&gamma;}}_0{p}_i+{\stackrel{\&OverBar;}{w}}_{\mathrm{mi}+1}$

$p_{i+(m-1)s}={\mathrm{\&gamma;}}_{m-2}{p}_{i+(m-2)s}+{\stackrel{\&OverBar;}{w}}_{m(i+1)-1}$

γ wherein ₀, γ ₁..., γ _m-2for dual-diagonal matrix array H _pmiddle GF (g) nonzero element.

Step 6, information symbol sequence and checking symbol sequence are carried out to multiplexing operation:

Multiplexer carries out information symbol sequence u and checking symbol sequence p multiplexing, is about to u and p and is serially connected, and obtaining encoder length is the final output codons c=(u, p) of N.

The present invention proposes S-QIRA code performance and can further illustrate by following emulation:

Simulation parameter: the S-QIRA code that emulation of the present invention is selected is based on finite field gf (64), its code length be 84 symbols 504 bits, code check be 1/2, cyclic shift matrices size s=7.Meanwhile, choose code length, code check and this S-QIRA code all identical binary low-density check BLDPC code carry out Performance Ratio.Wherein, S-QIRA code adopts respectively polynary sum-product algorithm QSPA and expansion is minimum and EMS decoding algorithm, and BLDPC code adopts belief propagation BP decoding algorithm.

Emulation content:

Emulation one: the frame error rate BLER performance under BPSK-AWGN channel is carried out Computer Simulation to S-QIRA code of the present invention and existing BLDPC code, and simulation result is shown in Fig. 5.

Emulation two: the BLER performance under 64QAM-Rayleigh fading channel is carried out Computer Simulation to S-QIRA code of the present invention and existing BLDPC code, and simulation result is shown in Fig. 6.

Analysis of simulation result:

As seen from Figure 5, on BPSK-AWGN channel, S-QIRA code of the present invention is when system BLER performance is 10-4, and its signal to noise ratio Eb/N0 is better than the about 0.43dB of BLDPC code.

As seen from Figure 6, in 64QAM-Rayleigh fading channel, S-QIRA code of the present invention is when system BLER performance is 10-4, and its signal to noise ratio Eb/N0 is better than the about 3.7dB of BLDPC code.

The present invention not detailed description is known to the skilled person technology.

Claims (1)

1. structuring multiple irregular repeats a LDPC coding method for accumulated codes, comprising:

(1) grouping repeating step:

To code length, be that N, information symbol length are that the multiple irregular repetition accumulated codes that K, checking symbol length are M=N-K is encoded, first by information symbol sequence u=(u to be encoded ₀, u ₁..., u _k-1) be divided into long k=K/s the U that divides into groups for s ⁽⁰⁾..., U ^(k-1), more by group to each grouping U ^(l)in symbol carry out repetition, 0≤l < k wherein, on the same group in each symbol number of repetition be r _l, make r=(r ₀+ ... + r _k-1)/k is the average number of repetition of all symbols, and obtaining length is the replicator sequence v of rK:

(2) block interleaved step:

2a) the accurate cyclic check matrix H=[H of definition encoder corresponding ' class ' _u, H _p], H wherein _ufor information matrix array, H _pfor dual-diagonal matrix array, be expressed as follows:

In formula represent that size is the unit matrix I of s _seach row is cyclic shift B to the right _i,jthe inferior square formation obtaining, δ _i,jrepresent the field element on GF (q), 0≤i≤m-1,0≤j≤k-1;

In formula 0 _srepresent that size is complete zero square formation of s, γ _ifor the nonzero element on GF (q), represent that size is the square formation of s:

2b) make a _iinformation matrix array H in the corresponding check matrix H of presentation code device _ui every trade weight, h _i,jfor the i of this matrix array capable in the row mark of j nonzero circle shift matrix, b _i,jfor the cyclic shift coefficient of this cyclic shift matrices, definition interweave subscript sequence (π (0) ..., π (rK-1)) and=(π ₀, π ₁..., π _m-1), m=M/s wherein,

π _i＝(π _i(0),π _i(1),…,π _i(s-1))，0≤i≤m-1，

${\mathrm{\&pi;}}_1\left(t\right)=({\mathrm{sh}}_{i,0}+(b_{i,0}+t)\mathrm{mod}s,...,{\mathrm{sh}}_{i,a_i-1}+(b_{i,a_i-t}+t)\mathrm{mod}s),0\&le;t\&le;s-1,$

2c) according to the above-mentioned subscript sequence that interweaves, replicator sequence v is carried out to block interleaved, obtain interleaved symbol sequence $\stackrel{\&OverBar;}{v}=({\stackrel{\&OverBar;}{v}}_1,...,{\stackrel{\&OverBar;}{v}}_{\mathrm{rK}-1})=(u_{\mathrm{\&pi;}\left(0\right)},u_{\mathrm{\&pi;}\left(1\right)},...,u_{\mathrm{\&pi;}(\mathrm{rK}-1)});$

(3) grouping GF (q) weighting step:

3a) make β represent weight coefficient sequence, it is the grouping of s that β is divided into m=M/s long:

Wherein the corresponding information matrix array of encoder H _ugF (q) the nonzero element sequence of i in capable, wherein GF (q) represents that size is the finite field of q;

3b) to interleaved symbol sequence in every multiply each other between two in order with every in weight coefficient sequence β, obtain weighting symbol sebolic addressing

(4) packet combining step:

4a) make A _dthe d every trade weight of the corresponding information matrix of presentation code device, 0≤d≤M-1, definition merge coefficient sequence A=(A ₀..., A _m-1), A wherein ₀+ A ₁+ ... + A _m-1=rK;

4b) to weighting symbol sebolic addressing in each symbol by every in merge coefficient sequence A, merge successively, obtaining length is the merging symbol sebolic addressing w=(w of M ₀..., w _m-1), wherein

$w_0={\hat{v}}_0+...+{\hat{v}}_{A_0-1}$

$w_1={\hat{v}}_{A_0}+...+{\hat{v}}_{A_0+A_1-1}$

……

$w_{M-1}={\hat{v}}_{A_0+A_1+...+A_{M-2}}+...+{\hat{v}}_{A_0+A_1+...+A_{M-1}-1};$

(5) grouping accumulation step:

5a) be combined each symbol w in symbol sebolic addressing w ₀..., w _m-1sort, obtain the symbol sebolic addressing that sorts $\stackrel{\&OverBar;}{w}=({\stackrel{\&OverBar;}{w}}_0,...,{\stackrel{\&OverBar;}{w}}_{M-1}),$ Wherein:

$({\stackrel{\&OverBar;}{w}}_0,...,{\stackrel{\&OverBar;}{w}}_{M-1})=((w_{\left(0\right)},...,w_{\left(0\right)+(m-1)s}),...,(w_{(s-1)},w_{(s-1)+s},...,w_{(s-1)+(m-1)s}));$

5b) right carry out accumulating operation, be about to middle symbol by register and after GF (q) weighting again with symbol add up, obtain symbol p _d, wherein 0 < d≤M-1, and then the raw checking symbol sequence p=(p that grows into M ₀..., p _m-1);

(6) multiplexer carries out information symbol sequence u and checking symbol sequence p multiplexing, is about to u and p and is serially connected, and obtaining encoder length is the final output codons c=(u, p) of N.