CN102543728A - Power transistor chip wafer manufacturing method - Google Patents

Power transistor chip wafer manufacturing method Download PDF

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Publication number
CN102543728A
CN102543728A CN2012100015741A CN201210001574A CN102543728A CN 102543728 A CN102543728 A CN 102543728A CN 2012100015741 A CN2012100015741 A CN 2012100015741A CN 201210001574 A CN201210001574 A CN 201210001574A CN 102543728 A CN102543728 A CN 102543728A
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CN
China
Prior art keywords
chip
carried out
chip back
producing sheet
metalized
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Pending
Application number
CN2012100015741A
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Chinese (zh)
Inventor
王友铸
杨晓智
李建球
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SHENZHEN PENGWEI TECHNOLOGY CO LTD
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SHENZHEN PENGWEI TECHNOLOGY CO LTD
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Priority to CN2012100015741A priority Critical patent/CN102543728A/en
Publication of CN102543728A publication Critical patent/CN102543728A/en
Pending legal-status Critical Current

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Abstract

The invention relates to the field of chip processing and provides a power transistor chip wafer manufacturing method, which comprises the following steps of: after a metal electrode is formed on the front processing surface of a chip, using thinning equipment to thin the back surface of the chip; filling concentrated phosphorus into the back surface of the chip and heating and annealing the back surface; and metallizing the back surface of the chip. The power transistor chip wafer manufacturing method has the advantages that the material cost is low, the production period is greatly shortened, the energy is saved and the consumption is reduced.

Description

Pliotron chip method of producing sheet
Technical field
The present invention relates to the triode process technology, relate in particular to a kind of pliotron chip method of producing sheet.
Background technology
In the pliotron chip manufacturing proces, continue to use traditional handicraft processing: triple diffusion technologys and epitaxy technique always.Triple diffusion technology flow processs are shown in Figure 1A~Fig. 1 D; It uses the monocrystal material sheet of 500um left and right thickness; It technology that comprises has that N+ expands in advance, N+ master expands, the N+ oxidation, and (injection), fairlead photoetching, front metal evaporation, front metal photoetching, back metal evaporation, test, scribing etc. are spread in grinding and polishing---once oxidation, photoetching, base diffusion (injections), emitter region photoetching, emitter region.The purpose of triple diffusions is to mix in the back side, and for back face metalization forms good Ohmic contact, its chip material is thicker, and material cost is higher; The work flow time is long; High temperature (more than 1250 ℃) control cycle long (about triple one weeks of diffusion time); Destabilizing factor is many in the technical process; Therefore cause with the big problem of ideal value deviation greatly easily, the equipment cost that takies of processing is high, energy consumption is high, and the cost loss is high, time loss is long thereby produce.Extension flow process such as Fig. 2 A~Fig. 2 C; Materials used is the single-sided polishing heavy doping monocrystal material sheet about 200um, and its technological process mainly comprises: extension, once oxidation, photoetching, base diffusion (injection), emitter region photoetching, emitter region diffusion (injection), fairlead photoetching, front metal evaporation, front metal photoetching, back metal evaporation, test, scribing etc.Though this process cycle is shorter, because the epitaxial process material expensive, epitaxy technique control is strict, therefore because processing cost is high, except that aspect integrated circuit and MOSFET, using some, aspect pliotron, uses seldom.
Can know that to sum up existing triode chip fabrication technique obviously exists inconvenience and defective, so be necessary to improve on reality is used.
Summary of the invention
To above-mentioned defective, the object of the present invention is to provide a kind of pliotron chip method of producing sheet, it can shorten the production cycle, save energy and reduce the cost.
To achieve these goals, the present invention provides a kind of pliotron chip method of producing sheet, comprises the steps:
After chip manufacture front metal electrode forms, chip back is carried out reduction processing with stripping apparatus;
Said chip back is injected dense phosphorus, and carry out back side heating anneal and handle;
Said chip back is carried out metalized.
According to method of producing sheet of the present invention, saidly said chip back is carried out the metalized step comprise: chip back is carried out the wiping corrosion with hydrofluoric acid, remove the oxide layer at the back side.
According to method of producing sheet of the present invention, said said chip back is carried out further comprising after the metalized step: chip back is carried out clean, then chip back is advanced evaporation of metal processing, test and scribing.
According to method of producing sheet of the present invention, said said chip back is carried out in the heating anneal treatment step, said chip back heats through infrared heating equipment.
According to method of producing sheet of the present invention, the thickness that said chip carries out after the reduction processing is 70um~100um.
The present invention to guarantee the N-district thickness of chip, injects dense phosphorus to chip back through with the attenuate milling apparatus chip back being carried out attenuate then, makes that through heavy doping chip back resistivity is low, and conductivity strengthens.The chip back surface that to inject dense phosphorus is again carried out heating anneal through infrared heating equipment to chip back, makes the phosphorus that injects to be evenly distributed, and repairs simultaneously and injects the lattice damage that produces, and at last chip is carried out metalized.Manufacture craft of the present invention whereby is energy-saving and cost-reducing, can shorten the production cycle big.
Description of drawings
Figure 1A~Fig. 1 D is the processing structure flow chart of triple diffusion technologys of the triode chip of prior art;
Fig. 2 A~Fig. 2 C is the processing structure flow chart of epitaxy technique of the triode chip of prior art;
Fig. 3 is the method flow diagram of method of producing sheet of the present invention;
Fig. 4 A~Fig. 4 D is the processing structure flow chart of method of producing sheet of the present invention.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
Referring to Fig. 3, the invention provides a kind of method of producing sheet of triode chip, it specifically comprises the steps:
Step S301 after chip manufacture front metal electrode forms, carries out reduction processing with stripping apparatus to chip back.The original material of process using of the present invention is the N-single crystalline chip disk (shown in Fig. 4 A) of 250um left and right thickness, finishes at the audion processing procedure (shown in Fig. 4 B), promptly through after a series of processing such as once oxidation, photoetching, base diffusion (injection), emitter region photoetching, emitter region diffusion (injection), fairlead photoetching, front metal evaporation, front metal photoetching; With the attenuate milling apparatus chip back is carried out attenuate (shown in Fig. 4 C); Thickness after the reduction processing does not wait at 70um~100um, can guarantee the N-district thickness of chip whereby, and then ensures the voltage that chip can bear; Certainly; Concrete thickness behind the chips attenuate of the present invention is decided according to product demand, and this is relevant with triode chip area and model, and chip area is big; Chip voltage requires higher, and then chip is thicker; Chip area is smaller, and chip voltage requires to hang down some, and then chip thickness is thinner.
Step S302 injects dense phosphorus with said chip back, and carries out back side heating anneal and handle.Through grinding attenuate chip afterwards; Pass through again clean clean after; With ion implantor chip back is carried out dense phosphorus and inject, make that through heavy doping chip back resistivity is low, conductivity strengthens; Can make chip back and back metal afterwards form good Ohmic contact, use as the contact point of collector electrode C.Simultaneously, the chip back surface after the injection is carried out heating anneal through infrared heating equipment to chip back, makes the phosphorus that injects to be evenly distributed, and repairs simultaneously and injects the lattice damage that produces.
Step S303 carries out metalized to said chip back.After annealing finishes, chip back is carried out back face metalization handle, chip back is carried out the wiping corrosion with hydrofluoric acid (HF acid), remove the oxide layer (SiO2) at the back side, finally form structure shown in Fig. 4 D.This step can be carried out clean to chip back after accomplishing, and carries out operations such as normal back metal evaporation process, test, scribing then.
In sum, the present invention to guarantee the N-district thickness of chip, injects dense phosphorus to chip back through with the attenuate milling apparatus chip back being carried out attenuate then, makes that through heavy doping chip back resistivity is low, and conductivity strengthens.The chip back surface that to inject dense phosphorus is again carried out heating anneal through infrared heating equipment to chip back, makes the phosphorus that injects to be evenly distributed, and repairs simultaneously and injects the lattice damage that produces, and at last chip is carried out metalized.Manufacture craft of the present invention whereby is energy-saving and cost-reducing, can shorten the production cycle big.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.

Claims (5)

1. a pliotron chip method of producing sheet is characterized in that, comprises the steps:
After chip manufacture front metal electrode forms, chip back is carried out reduction processing with stripping apparatus;
Said chip back is injected dense phosphorus, and carry out back side heating anneal and handle;
Said chip back is carried out metalized.
2. method of producing sheet according to claim 1 is characterized in that, saidly said chip back is carried out the metalized step comprises: said chip back is carried out the wiping corrosion with hydrofluoric acid, remove the oxide layer of said chip back.
3. method of producing sheet according to claim 2; It is characterized in that; Said said chip back is carried out further comprising after the metalized step: said chip back is carried out clean, then said chip back is carried out evaporation of metal processing, test and scribing.
4. method of producing sheet according to claim 1 is characterized in that, said said chip back is carried out in the heating anneal treatment step, and said chip back heats through infrared heating equipment.
5. method of producing sheet according to claim 1 is characterized in that, the thickness that said chip carries out after the reduction processing is 70um~100um.
CN2012100015741A 2012-01-05 2012-01-05 Power transistor chip wafer manufacturing method Pending CN102543728A (en)

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Application Number Priority Date Filing Date Title
CN2012100015741A CN102543728A (en) 2012-01-05 2012-01-05 Power transistor chip wafer manufacturing method

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Application Number Priority Date Filing Date Title
CN2012100015741A CN102543728A (en) 2012-01-05 2012-01-05 Power transistor chip wafer manufacturing method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108878367A (en) * 2017-05-09 2018-11-23 上海珏芯光电科技有限公司 The manufacturing method and device of BiCMOS integrated circuit device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080076240A1 (en) * 2006-09-22 2008-03-27 Commissariat A L'energie Atomique Method for producing doped regions in a substrate, and photovoltaic cell
US20090014753A1 (en) * 2007-07-10 2009-01-15 Mitsubishi Electric Corporation Power semiconductor device and manufacturing method therefor
CN101459084A (en) * 2008-09-02 2009-06-17 北大方正集团有限公司 Plane double diffusion metal oxide semiconductor device and preparation method
US7947586B2 (en) * 2009-02-04 2011-05-24 Fuji Electric Systems Co., Ltd. Method of manufacturing a semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080076240A1 (en) * 2006-09-22 2008-03-27 Commissariat A L'energie Atomique Method for producing doped regions in a substrate, and photovoltaic cell
US20090014753A1 (en) * 2007-07-10 2009-01-15 Mitsubishi Electric Corporation Power semiconductor device and manufacturing method therefor
CN101459084A (en) * 2008-09-02 2009-06-17 北大方正集团有限公司 Plane double diffusion metal oxide semiconductor device and preparation method
US7947586B2 (en) * 2009-02-04 2011-05-24 Fuji Electric Systems Co., Ltd. Method of manufacturing a semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108878367A (en) * 2017-05-09 2018-11-23 上海珏芯光电科技有限公司 The manufacturing method and device of BiCMOS integrated circuit device
CN108878367B (en) * 2017-05-09 2021-02-05 上海珏芯光电科技有限公司 Method for manufacturing BiCMOS integrated circuit device and device

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Application publication date: 20120704