CN102522337B - Preparation method of top gate zinc oxide film transistor - Google Patents
Preparation method of top gate zinc oxide film transistor Download PDFInfo
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- CN102522337B CN102522337B CN201110423372.1A CN201110423372A CN102522337B CN 102522337 B CN102522337 B CN 102522337B CN 201110423372 A CN201110423372 A CN 201110423372A CN 102522337 B CN102522337 B CN 102522337B
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Abstract
The invention discloses a preparation method of a top gate zinc oxide film transistor, belonging to the semiconductor industry and the flat display field. According to the invention, in a preparation process of the top gate zinc oxide film transistor, a channel region, a gate medium layer and a gate electrode layer are peeled off together, processing steps are simple, the channel region, the gate medium layer and the gate electrode layer continuously grow under a vacuum condition, manufacture cost is saved, pollution of extraneous impurities of air, dust and the like on each layer of film is reduced, and the performance of the zinc oxide film transistor device is raised effectively.
Description
Technical field
The invention belongs to and belong to semicon industry, flat panel display field, be specifically related to a kind of preparation method of top gate zinc oxide film transistor.
Background technology
In recent years, the thin-film transistor technologies that is applicable to flat panel display industry is in fast development.Thin-film transistor is one of kind of field-effect transistor, and main production method is on substrate, to deposit various film, as the metal of semiconductor channel layer, gate insulation dielectric layer and conduction or compound electrode layer.Thin-film transistor is on substrate, to deposit layer of semiconductor film as conductivity channel layer.The thin-film transistor major part using is at present amorphous silicon hydride (a-Si:H) thin-film transistor, and polycrystalline SiTFT technology is also among constantly improving.The performance of amorphous silicon film transistor is more stable, but mobility is low.The mobility of polycrystalline SiTFT improves a lot, but the preparation temperature of polycrystalline SiTFT is high, lack of homogeneity prepared by large area.In addition, amorphous silicon film transistor and polycrystalline SiTFT are all to photaesthesia, and under illumination condition, great changes will take place for device performance, therefore, in flat panel display, need to introduce black matrix, this complexity that has also increased preparation technology has reduced the aperture opening ratio of display device simultaneously.In order further to improve the performance of thin-film transistor, solve the problems such as black matrix, aperture opening ratio, brightness, international semiconductor technical field has started the research boom of transparent electronics in recent years.Transparent electronics is exactly to utilize transparent electronic material to make a kind of semiconductor technology of electronic device and interlock circuit thereof.At present to transparent semiconductor investigation of materials more be zinc oxide material.Zinc oxide material has lot of advantages: be easy to preparation, utilize the methods such as magnetron sputtering method, molecular beam epitaxy (MBE) method, sol-gel (Sol-Gel) method, mocvd method can prepare well behaved zinc oxide material; Preparation temperature is low, and the temperature of general preparation can be controlled in 500 DEG C, in glass substrate; Transparency is high, and zinc oxide is wide-band gap material, and energy gap is about 3.37eV, in visible-range, is therefore transparent; Electric property is good, and the electric property of zinc oxide material is good, and carrier mobility is far above amorphous silicon; Nontoxic, environment-friendly materials, zinc oxide material is a kind of nontoxic environment-friendly materials; Material price is low, and Zinc material is aboundresources on earth, cheap, can effectively reduce the manufacturing cost of product.Scientists is thought, efficiency is higher, the emerging electron trade of cheaper by developing into for transparent electronics, its range of application is quite extensive, comprises from flat-panel monitor to solar cell, many-sided field such as mobile phone, flexible electronic paper, organic light emitting display.
But the manufacturing cost of zinc oxide thin-film transistor will be much larger than amorphous silicon film transistor, this is also the main cause that hinders zinc oxide thin-film transistor to be widely adopted.Therefore, how Optimization Technology, reduces manufacturing cost, is also the key subject that at present relevant zinc oxide thin-film transistor is studied.
Summary of the invention
The object of the present invention is to provide a kind of technique simple, the preparation method of the top gate zinc oxide film transistor of low cost of manufacture.
The preparation method of top gate zinc oxide film transistor provided by the invention, comprises the following steps:
1) transparent conductive film of growing in glass substrate, then photoetching and peel off formation source, drain electrode;
2) get rid of one deck photoresist, photoetching development, forms channel region, and in channel region, without photoresist, all the other regions are covered by photoresist, and channel region and source, drain electrode overlap mutually;
3) growth one deck oxide semiconductor layer is as channel layer;
4) growth one deck dielectric material is as gate dielectric layer;
5) grow layer of conductive film as gate electrode,
6) oxide semiconductor, dielectric material are peeled off together with conductive film, formed raceway groove, gate medium and gate electrode;
7) growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage;
8) growth layer of metal film, photoetching and etching form metal electrode and interconnection.
In described preparation method, step 1) conductive film of growing, can be formed by transparent conductive material ITO etc.
In described preparation method, step 3) oxide semiconductor layer of growing, adopt zinc oxide and doped semiconductor materials thereof to form.
In described preparation method, step 4) the dielectric material layer of growing, formed by aluminium oxide, silicon dioxide, silicon nitride or high dielectric constant insulating material.
In described preparation method, step 5) conductive film of growing, can be formed by transparent conductive material.
Advantage of the present invention and good effect: the thin-film transistor back of the body grid technique that the present invention compares traditional, together with these three layers of channel region, gate dielectric layer and gate electrode layers, peel off, processing step is simple, and these three layers growth continuously under vacuum condition of channel layer, gate insulation dielectric layer and gate electrode layer, save manufacturing cost, and reduce the pollution of the introduced contaminants such as air, dust to each layer film, effectively improved the performance of zinc oxide thin-film transistor device.
Brief description of the drawings
Fig. 1 is the cross-sectional view of the described top gate zinc oxide film transistor of the specific embodiment of the invention;
Fig. 2 is the plan structure schematic diagram of the described top gate zinc oxide film transistor of the specific embodiment of the invention;
Fig. 3 (a)～(e) show successively the main technological steps of film crystal tube preparation method of the present invention, wherein:
Fig. 3 (b) has illustrated the processing step that source-drain electrode forms;
Fig. 3 (c) has illustrated the processing step of whirl coating photoetching;
Fig. 3 (d) has illustrated the processing step of semiconductor conductivity channel layer, gate insulation dielectric layer and gate electrode layer growth;
Fig. 3 (e) has illustrated stripping technology.
Embodiment
Below by embodiment, the present invention will be further described.
Top gate zinc oxide film transistor of the present invention is formed in glass substrate 1, as depicted in figs. 1 and 2.This thin-film transistor comprises a source-drain electrode 2, semiconductor conductivity channel layer 3, one gate insulation dielectric layer 4, one gate electrodes 5.Described source-drain electrode 2 is positioned on glass substrate 1, and described semiconductor conductivity channel layer 3 is positioned on source, drain electrode 2 and glass substrate 1, and gate medium 4 is positioned on described semiconductor conductivity channel layer 3, and described gate electrode electrode 5 is positioned on gate medium 4.
One instantiation of the manufacture method of described thin-film transistor, is comprised the following steps to shown in Fig. 3 (e) by Fig. 3 (a):
As shown in Fig. 3 (a), substrate is selected transparent glass substrate 1.
As shown in Fig. 3 (b), transparent conductive film or the metal A l such as the ITO of Grown by Magnetron Sputtering one deck 50～100 nanometer thickness on glass substrate 1, Cr, Mo, then photoetching and etching form source, drain electrode 2.
As shown in Fig. 3 (c), photoetching development is protected by photoresist 6 except channel region;
As shown in Fig. 3 (d), with the semiconductor oxide zinc thin layer 3 of rf magnetron sputtering deposit one deck 50～500 nanometer thickness; With the gate dielectric layer 4 of rf magnetron sputtering deposit one deck 50～500 nanometer thickness; With transparent conductive film or the metal A l such as the ITO of rf magnetron sputtering deposit one deck 50～500 nanometer thickness, Cr, Mo gate electrode layer 5.
As shown in Fig. 3 (e), peel off generation top gate zinc oxide film transistor.
According to standard technology growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage subsequently, regrowth one deck Al or transparent conductive film material, and photoetching and etching form electrode and interconnection.
Finally it should be noted that, the object of publicizing and implementing mode is to help further to understand the present invention, but it will be appreciated by those skilled in the art that: without departing from the spirit and scope of the invention and the appended claims, various substitutions and modifications are all possible.Therefore, the present invention should not be limited to the disclosed content of embodiment, and the scope that the scope of protection of present invention defines with claims is as the criterion.
Claims (5)
1. a preparation method for top gate zinc oxide film transistor, comprises the following steps:
1) transparent conductive film of growing in glass substrate, then photoetching and peel off formation source, drain electrode;
2) get rid of one deck photoresist, photoetching development, forms channel region, and in channel region, without photoresist, all the other regions are covered by photoresist, and channel region and source-drain electrode overlap mutually;
3) growth one deck oxide semiconductor is as channel layer, and described oxide semiconductor is zinc oxide and doped semiconductor films thereof;
4) growth one deck dielectric material is as gate dielectric layer;
5) grow layer of conductive film as gate electrode,
6) oxide semiconductor, dielectric material are peeled off together with conductive film, formed raceway groove, gate medium and gate electrode;
7) growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage;
8) growth layer of metal film, photoetching and etching form metal electrode and interconnection.
2. the method for claim 1, is characterized in that, described step 1) in, the transparent conductive film of growth is formed by transparent conductive material ITO.
3. the method for claim 1, is characterized in that, described step 4) in, the dielectric material layer of growth is high dielectric constant insulating material or silicon dioxide.
4. method as claimed in claim 3, is characterized in that, described high dielectric constant insulating material is aluminium oxide or silicon nitride.
5. the method for claim 1, is characterized in that, described step 5) in, the conductive film of growth is transparent conductive material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201110423372.1A CN102522337B (en) | 2011-12-16 | 2011-12-16 | Preparation method of top gate zinc oxide film transistor |
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| CN201110423372.1A CN102522337B (en) | 2011-12-16 | 2011-12-16 | Preparation method of top gate zinc oxide film transistor |
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| CN102522337A CN102522337A (en) | 2012-06-27 |
| CN102522337B true CN102522337B (en) | 2014-07-02 |
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| CN105206570B (en) * | 2015-10-27 | 2018-11-23 | 深圳市华星光电技术有限公司 | A kind of display panel and its manufacturing method |
| CN108122759B (en) * | 2016-11-30 | 2021-01-26 | 京东方科技集团股份有限公司 | Thin film transistor, manufacturing method thereof, array substrate and display device |
| CN112108196A (en) * | 2020-10-16 | 2020-12-22 | 安图实验仪器(郑州)有限公司 | Active matrix digital micro-fluidic chip substrate and manufacturing method thereof |
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Effective date of registration: 20140619 Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No. Patentee after: BOE Technology Group Co., Ltd. Address before: 100871 Beijing the Summer Palace Road, Haidian District, No. 5 Patentee before: Peking University |