A kind of preparation method of top gate zinc oxide thin-film transistor
Technical field
The invention belongs to and belong to semicon industry, flat panel display field, be specifically related to a kind of preparation method of top gate zinc oxide thin-film transistor.
Background technology
In recent years, the thin-film transistor technologies that is applicable to the flat panel display industry is in fast development.Thin-film transistor is one of kind of field-effect transistor, and main production method is the various film of deposition on substrate, like the metal or the compound electrode layer of semiconductor channel layer, gate insulation dielectric layer and conduction.Thin-film transistor is that deposition layer of semiconductor film is regarded conductivity channel layer on substrate.The thin-film transistor major part of using at present is amorphous silicon hydride (a-Si:H) thin-film transistor, and the polycrystalline SiTFT technology is also among constantly improving.The performance of amorphous silicon film transistor is more stable, but mobility is low.The mobility of polycrystalline SiTFT improves a lot, but the preparation temperature of polycrystalline SiTFT is high, the lack of homogeneity of large-area preparation.In addition; Amorphous silicon film transistor and polycrystalline SiTFT are all to photaesthesia, and great changes will take place for device performance under the illumination condition, therefore; In flat panel display, need to introduce black matrix, this complexity that has also increased preparation technology has reduced the aperture opening ratio of display device simultaneously.In order further to improve the performance of thin-film transistor, solve problems such as black matrix, aperture opening ratio, brightness, the international semiconductor technical field has started the research boom of transparent electronics in recent years.Transparent electronics is exactly to utilize transparent electronic material to make a kind of semiconductor technology of electronic device and interlock circuit thereof.At present to the transparent semiconductor investigation of materials more be zinc oxide material.Zinc oxide material has lot of advantages: be easy to preparation, utilize methods such as magnetron sputtering method, molecular beam epitaxy (MBE) method, sol-gel (Sol-Gel) method, mocvd method can prepare well behaved zinc oxide material; Preparation temperature is low, and the temperature of general preparation can be controlled in 500 ℃, on glass substrate; Transparency is high, and zinc oxide is wide-band gap material, and energy gap is about 3.37eV, is transparent in visible-range therefore; Electric property is good, and the electric property of zinc oxide material is good, and carrier mobility is far above amorphous silicon; Nontoxic, environment-friendly materials, zinc oxide material are a kind of nontoxic environment-friendly materials; Material price is low, and Zinc material is aboundresources on earth, and is cheap, can reduce the manufacturing cost of product effectively.Scientists is thought; Transparent electronics will develop into an emerging electron trade that efficient is higher, price is more cheap; Its range of application is quite extensive, comprises from the flat-panel monitor to the solar cell, many-sided field such as mobile phone, flexible electronic paper, organic light emitting display.
Yet the manufacturing cost of zinc oxide thin-film transistor will be much larger than amorphous silicon film transistor, and this also is to hinder zinc oxide thin-film transistor by the main cause that extensively adopts.Therefore, how optimizing technology, reduce manufacturing cost, also is the key subject of at present relevant zinc oxide thin-film transistor research.
Summary of the invention
The object of the present invention is to provide a kind of technology simple, the preparation method of the top gate zinc oxide thin-film transistor of low cost of manufacture.
The preparation method of top gate zinc oxide thin-film transistor provided by the invention may further comprise the steps:
1) transparent conductive film of on glass substrate, growing, photoetching and peel off formation source, drain electrode then;
2) get rid of one deck photoresist, photoetching development forms channel region, no photoresist in the channel region, and all the other zones are covered by photoresist, and channel region and source, drain electrode overlap mutually;
3) growth one deck oxide semiconductor layer is as channel layer;
4) growth one deck dielectric material is as gate dielectric layer;
5) grow layer of conductive film as gate electrode,
6) oxide semiconductor, dielectric material and conductive film are peeled off together, formed raceway groove, gate medium and gate electrode;
7) growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage;
8) growth layer of metal film, photoetching and etching form metal electrode and interconnection.
Among the said preparation method, the conductive film that step 1) is grown can be formed by transparent conductive material ITO etc.
Among the said preparation method, step 3) institute grown oxide semiconductor layer adopts zinc oxide and doped semiconductor materials thereof to form.
Among the said preparation method, the dielectric material layer that step 4) is grown is formed by aluminium oxide, silicon dioxide, silicon nitride or high dielectric constant insulating material.
Among the said preparation method, the conductive film that step 5) is grown can be formed by transparent conductive material.
Advantage of the present invention and good effect: the thin-film transistor back of the body grid technique that the present invention compares traditional; Channel region, gate dielectric layer and gate electrode layer are peeled off for these three layers together; Processing step is simple, and these three layers growth continuously under vacuum condition of channel layer, gate insulation dielectric layer and gate electrode layer, practices thrift manufacturing cost; And reduced of the pollution of introduced contaminantses such as air, dust, effectively improved the performance of zinc oxide thin-film transistor device each layer film.
Description of drawings
Fig. 1 is the cross-sectional view of the described top gate zinc oxide thin-film transistor of the specific embodiment of the invention;
Fig. 2 is the plan structure sketch map of the described top gate zinc oxide thin-film transistor of the specific embodiment of the invention;
Fig. 3 (a)~(e) shows the main technique step of film crystal tube preparation method of the present invention successively, wherein:
Fig. 3 (b) has illustrated the processing step that source-drain electrode forms;
Fig. 3 (c) has illustrated the processing step of whirl coating photoetching;
Fig. 3 (d) has illustrated the processing step of semiconductor conductivity channel layer, gate insulation dielectric layer and gate electrode layer growth;
Fig. 3 (e) has illustrated stripping technology.
Embodiment
Through embodiment the present invention is further specified below.
Top gate zinc oxide thin-film transistor of the present invention is formed on the glass substrate 1, and is as depicted in figs. 1 and 2.This thin-film transistor comprises a source-drain electrode 2, semiconductor conductivity channel layer 3, one gate insulation dielectric layers 4, one gate electrodes 5.Said source-drain electrode 2 is positioned on the glass substrate 1, and said semiconductor conductivity channel layer 3 is positioned on source, drain electrode 2 and the glass substrate 1, and gate medium 4 is positioned on the said semiconductor conductivity channel layer 3, and said gate electrode electrode 5 is positioned on the gate medium 4.
One instantiation of the manufacture method of said thin-film transistor, may further comprise the steps to shown in Fig. 3 (e) by Fig. 3 (a):
Shown in Fig. 3 (a), substrate is selected transparent glass substrate 1 for use.
Shown in Fig. 3 (b), the transparent conductive film or the metal A l such as ITO of magnetron sputtering growth one deck 50~100 nanometer thickness on glass substrate 1, Cr, Mo, photoetching and etching form source, drain electrode 2 then.
Shown in Fig. 3 (c), photoetching development is protected by photoresist 6 except that channel region;
Shown in Fig. 3 (d), with the semiconductor oxide zinc thin layer 3 of rf magnetron sputtering deposit one deck 50~500 nanometer thickness; Gate dielectric layer 4 with rf magnetron sputtering deposit one deck 50~500 nanometer thickness; With the transparent conductive film or the metal A l such as ITO of rf magnetron sputtering deposit one deck 50~500 nanometer thickness, Cr, Mo gate electrode layer 5.
Shown in Fig. 3 (e), peel off and generate the top gate zinc oxide thin-film transistor.
According to standard technology growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage subsequently, regrowth one deck Al or transparent electrically-conductive film material, and photoetching and etching form electrode and interconnection.
It should be noted that at last; The purpose of publicizing and implementing mode is to help further to understand the present invention; But it will be appreciated by those skilled in the art that: in the spirit and scope that do not break away from the present invention and appended claim, various replacements and to revise all be possible.Therefore, the present invention should not be limited to the disclosed content of embodiment, and the scope that the present invention requires to protect is as the criterion with the scope that claims define.