CN102361008A - Method for controlling defects of wafer edge - Google Patents
Method for controlling defects of wafer edge Download PDFInfo
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- CN102361008A CN102361008A CN2011103351468A CN201110335146A CN102361008A CN 102361008 A CN102361008 A CN 102361008A CN 2011103351468 A CN2011103351468 A CN 2011103351468A CN 201110335146 A CN201110335146 A CN 201110335146A CN 102361008 A CN102361008 A CN 102361008A
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- wafer
- crystal round
- round fringes
- protective cover
- wafer edge
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Abstract
The invention provides a method for controlling defects of a wafer edge. The method comprises the following steps of: providing a deposition reaction cavity, wherein the reaction cavity comprises an upper electrode plate and a lower electrode plate which are arranged oppositely; putting a wafer on the lower electrode plate; providing a protective cover, and arranging the protective cover between the wafer and the upper electrode plate, wherein the area of the protective cover is smaller than that of the wafer, so that the wafer edge is exposed; and depositing a layer of protective film on the exposed wafer edge. In the method for controlling the defects of the wafer edge, a layer of silicon oxide protective film is grown on the wafer edge by a method for performing chemical vapor deposition on the wafer edge, and a part, which is fragile and easy to strip, of the wafer edge is protected and is cured on the wafer, so that the stripped part cannot drop in the wafer to avoid influencing the yield of products.
Description
Technical field
The present invention relates to the integrated circuit fabrication process field in line defect improvement method, and be particularly related to a kind of method of controlling the crystal round fringes defective.
Background technology
Along with the development of integrated circuit technology and considering of cost control, the wafer specification is gradually to large scale development, and 12 cun become the main flows that integrated circuit is made gradually, and is following even can develop into more than 18 cun and 18 cun.The expansion of wafer size causes the expansion of crystal round fringes area accordingly, and the manufacturing process at edge is difficult to control more, thereby causes many crystal round fringes to peel off defective, has a strong impact on yield and promotes even cause and scrap.
The defective control one of crystal round fringes is to being a difficult point in the integrated circuit defective Control work.Traditional crystal round fringes defect control method is to remove the possible source of peeling off through the mode at cleaning wafer edge, in case a type defective is fallen into wafer internal influence yield here.But; These class methods at first need find peels off source and corresponding processing step thereof; Then the crystal round fringes level after this step is analyzed; Thickness and corresponding cleaning formula that decision is cleaned if the process cycle is consuming time oversize and clean not in place or overclean can cause and more peels off defective, even cause serious metallic pollution.
Summary of the invention
The present invention proposes a kind of method of controlling the crystal round fringes defective; Through carry out the method for chemical vapour deposition (CVD) at crystal round fringes; Diaphragm at the long last layer silica of crystal round fringes; Get up the fragile flaky partial protection of crystal round fringes and be solidificated on the wafer, stop it to drop and the product yield is impacted in the wafer the inside.
In order to achieve the above object, the present invention proposes a kind of method of controlling the crystal round fringes defective, comprises the following steps:
One deposition reaction chamber is provided, and said reaction chamber comprises top crown and the bottom crown of establishing relatively;
Wafer is positioned on the said bottom crown;
One protective cover is provided, is arranged between said wafer and the said top crown, wherein, the area of said protective cover is less than said wafer, thus the marginal portion of exposing said wafer;
Partly deposit layer protecting film at the said crystal round fringes that exposes.
Further, the distance of the said crystal round fringes of said protective cover Edge Distance is 0～3mm.
Further, said diaphragm is a silicon oxide film.
Further, the thickness of said diaphragm is 50 dusts～10000 dusts.
Further, said deposition reaction chamber is the chemical vapour deposition reaction chamber.
Further, the depositional mode of said diaphragm is chemical vapour deposition (CVD).
Know-why of the present invention is through carry out the method for chemical vapour deposition (CVD) at crystal round fringes; Diaphragm at the long last layer silica of crystal round fringes; Get up the fragile flaky partial protection of crystal round fringes and be solidificated on the wafer, stop it to drop and the product yield is impacted in the wafer the inside.Its concrete design principle is that traditional chemical vapour deposition (CVD) board is transformed; Install the layer of protecting cover additional in its reaction chamber inside, make it in the chemical vapour deposition reaction process, can protect the most area of crystal column surface centre, only expose the part of peeling off easily at the edge and deposit; In deposition process, can grow one deck sull then; Flaky partly solidified on wafer, thereby realize the protection crystal round fringes, eliminate the purpose of peeling off defective hidden danger.The method is applied in and is prone to peel off the processing step of defective, can stop very soon and peel off generation, solves a problem promptly.
Description of drawings
Shown in Figure 1 is the method flow diagram of the control crystal round fringes defective of preferred embodiment of the present invention.
Shown in Figure 2 for the deposition reaction cavity configuration sketch map of preferred embodiment of the present invention.
Fig. 3 a and Fig. 3 b are depicted as the sketch map of the curing crystal round fringes front and back of preferred embodiment of the present invention.
Embodiment
Please refer to Fig. 1, shown in Figure 1 is the method flow diagram of the control crystal round fringes defective of preferred embodiment of the present invention.The present invention proposes a kind of method of controlling the crystal round fringes defective, comprises the following steps:
Step S100: a deposition reaction chamber is provided, and said reaction chamber comprises top crown and the bottom crown of establishing relatively;
Step S200: wafer is positioned on the said bottom crown;
Step S300: a protective cover is provided, is arranged between said wafer and the said top crown, wherein, the area of said protective cover is less than said wafer, thus the marginal portion of exposing said wafer;
Step S400: partly deposit layer protecting film at the said crystal round fringes that exposes.
Please refer to Fig. 2 again, shown in Figure 2ly be the deposition reaction cavity configuration sketch map of preferred embodiment of the present invention.The present invention transforms traditional chemical vapour deposition (CVD) board; Install the layer of protecting cover additional in its reaction chamber inside; Said deposition reaction chamber 100 comprises the top crown of establishing relatively 200 and bottom crown 300, and wafer 400 is positioned on the said bottom crown 300, and said protective cover 500 is arranged between said wafer 400 and the said top crown 200; Make it in the chemical vapour deposition reaction process, can protect the middle most area in wafer 400 surfaces; Only expose the part of peeling off easily at the edge and deposit, in deposition process, can grow one deck sull 600 then, flaky partly solidified on wafer 400; Thereby realize protection wafer 400 edges, eliminate the purpose of peeling off defective hidden danger.
Please refer to Fig. 3 a and Fig. 3 b again, Fig. 3 a and Fig. 3 b are depicted as the sketch map of the curing crystal round fringes front and back of preferred embodiment of the present invention.Wafer 400 is positioned on the said bottom crown 300; The distance at the said wafer of said protective cover 500 Edge Distances 400 edges is 0～3mm; Carry out chemical vapor deposition process; Deposition one deck sull 600 is as diaphragm in the marginal portion of said wafer 400, and wherein said diaphragm is a silicon oxide film, and its thickness range is 50 dusts～10000 dusts.
In sum; Know-why of the present invention is through carry out the method for chemical vapour deposition (CVD) at crystal round fringes; Diaphragm at the long last layer silica of crystal round fringes; Get up the fragile flaky partial protection of crystal round fringes and be solidificated on the wafer, stop it to drop and the product yield is impacted in the wafer the inside.Its concrete design principle is that traditional chemical vapour deposition (CVD) board is transformed; Install the layer of protecting cover additional in its reaction chamber inside, make it in the chemical vapour deposition reaction process, can protect the most area of crystal column surface centre, only expose the part of peeling off easily at the edge and deposit; In deposition process, can grow one deck sull then; Flaky partly solidified on wafer, thereby realize the protection crystal round fringes, eliminate the purpose of peeling off defective hidden danger.The method is applied in and is prone to peel off the processing step of defective, can stop very soon and peel off generation, solves a problem promptly.
Though the present invention discloses as above with preferred embodiment, so it is not in order to limit the present invention.Have common knowledge the knowledgeable in the technical field under the present invention, do not breaking away from the spirit and scope of the present invention, when doing various changes and retouching.Therefore, protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (6)
1. a method of controlling the crystal round fringes defective is characterized in that, comprises the following steps:
One deposition reaction chamber is provided, and said reaction chamber comprises top crown and the bottom crown of establishing relatively;
Wafer is positioned on the said bottom crown;
One protective cover is provided, is arranged between said wafer and the said top crown, wherein, the area of said protective cover is less than said wafer, thus the marginal portion of exposing said wafer;
Partly deposit layer protecting film at the said crystal round fringes that exposes.
2. the method for control crystal round fringes defective according to claim 1 is characterized in that, the distance of the said crystal round fringes of said protective cover Edge Distance is 0～3mm.
3. the method for control crystal round fringes defective according to claim 1 is characterized in that, said diaphragm is a silicon oxide film.
4. the method for control crystal round fringes defective according to claim 1 is characterized in that, the thickness of said diaphragm is 50 dusts～10000 dusts.
5. the method for control crystal round fringes defective according to claim 1 is characterized in that, said deposition reaction chamber is the chemical vapour deposition reaction chamber.
6. the method for control crystal round fringes defective according to claim 1 is characterized in that, the depositional mode of said diaphragm is chemical vapour deposition (CVD).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103351468A CN102361008A (en) | 2011-10-28 | 2011-10-28 | Method for controlling defects of wafer edge |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103351468A CN102361008A (en) | 2011-10-28 | 2011-10-28 | Method for controlling defects of wafer edge |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102361008A true CN102361008A (en) | 2012-02-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011103351468A Pending CN102361008A (en) | 2011-10-28 | 2011-10-28 | Method for controlling defects of wafer edge |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103646893A (en) * | 2013-11-29 | 2014-03-19 | 上海华力微电子有限公司 | A wafer defect detecting method |
| CN105040097A (en) * | 2015-06-30 | 2015-11-11 | 上海华力微电子有限公司 | Chemical vapor deposition technological cavity aiming at crystal edge of wafer and chemical vapor deposition method |
| CN105070645A (en) * | 2015-07-21 | 2015-11-18 | 上海华力微电子有限公司 | Method of avoiding peeling defect source of wafer edge aluminum and device |
| CN109913880A (en) * | 2017-12-13 | 2019-06-21 | 南京机器人研究院有限公司 | A kind of weldment method for protecting surface |
| CN110880450A (en) * | 2019-11-28 | 2020-03-13 | 上海华力集成电路制造有限公司 | Method for improving ILD oxide layer peeling |
Citations (5)
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| US5037775A (en) * | 1988-11-30 | 1991-08-06 | Mcnc | Method for selectively depositing single elemental semiconductor material on substrates |
| JP2002100596A (en) * | 2000-09-25 | 2002-04-05 | Mitsubishi Materials Silicon Corp | Edge protecting device for silicon wafer |
| KR20060061705A (en) * | 2004-12-02 | 2006-06-08 | 주식회사 하이닉스반도체 | Method for manufacturing storage node electrode of the semiconductor device |
| KR20110055983A (en) * | 2009-11-20 | 2011-05-26 | 주식회사 하이닉스반도체 | Semiconductor manufacturing apartus and semiconductor manufacturing method by using the same |
| US20110146703A1 (en) * | 2009-12-17 | 2011-06-23 | Lam Research Corporation | Method and apparatus for processing bevel edge |
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2011
- 2011-10-28 CN CN2011103351468A patent/CN102361008A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5037775A (en) * | 1988-11-30 | 1991-08-06 | Mcnc | Method for selectively depositing single elemental semiconductor material on substrates |
| JP2002100596A (en) * | 2000-09-25 | 2002-04-05 | Mitsubishi Materials Silicon Corp | Edge protecting device for silicon wafer |
| KR20060061705A (en) * | 2004-12-02 | 2006-06-08 | 주식회사 하이닉스반도체 | Method for manufacturing storage node electrode of the semiconductor device |
| KR20110055983A (en) * | 2009-11-20 | 2011-05-26 | 주식회사 하이닉스반도체 | Semiconductor manufacturing apartus and semiconductor manufacturing method by using the same |
| US20110146703A1 (en) * | 2009-12-17 | 2011-06-23 | Lam Research Corporation | Method and apparatus for processing bevel edge |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103646893A (en) * | 2013-11-29 | 2014-03-19 | 上海华力微电子有限公司 | A wafer defect detecting method |
| CN105040097A (en) * | 2015-06-30 | 2015-11-11 | 上海华力微电子有限公司 | Chemical vapor deposition technological cavity aiming at crystal edge of wafer and chemical vapor deposition method |
| CN105040097B (en) * | 2015-06-30 | 2018-05-01 | 上海华力微电子有限公司 | For the chemical vapor deposition process chamber and chemical vapor deposition method of wafer crystal edge |
| CN105070645A (en) * | 2015-07-21 | 2015-11-18 | 上海华力微电子有限公司 | Method of avoiding peeling defect source of wafer edge aluminum and device |
| CN109913880A (en) * | 2017-12-13 | 2019-06-21 | 南京机器人研究院有限公司 | A kind of weldment method for protecting surface |
| CN110880450A (en) * | 2019-11-28 | 2020-03-13 | 上海华力集成电路制造有限公司 | Method for improving ILD oxide layer peeling |
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Application publication date: 20120222 |