CN102279609A - Voltage regulator and reference voltage generating circuit thereof - Google Patents
Voltage regulator and reference voltage generating circuit thereof Download PDFInfo
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- CN102279609A CN102279609A CN2010102039559A CN201010203955A CN102279609A CN 102279609 A CN102279609 A CN 102279609A CN 2010102039559 A CN2010102039559 A CN 2010102039559A CN 201010203955 A CN201010203955 A CN 201010203955A CN 102279609 A CN102279609 A CN 102279609A
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Abstract
The invention discloses a voltage regulator and a reference voltage generating circuit thereof. The voltage regulator comprises a reference voltage generating circuit, a comparator, a driving unit and a feedback unit, wherein the input end of the driving unit is connected with the output end of the comparator; the output end of the driving unit serves as the output end of the voltage regulator; the input end of the feedback unit is connected with the output end of the driving unit; the output end of the feedback unit is connected with the first input end of the comparator; the reference voltage generating circuit comprises a first voltage dividing unit and a second voltage dividing unit; the first voltage dividing unit is used for dividing a first voltage in the working mode of a load unit to generate a first reference voltage input to the second input end of the comparator; the second voltage dividing unit is used for dividing a second voltage in the standby mode of the load unit to generate a second reference voltage input to the second input end of the comparator; and the second reference voltage is greater than the first reference voltage. According to the invention, the influence of amplitude perturbation on the work of the load unit can be lowered, and the floor area of a decoupling capacitor is small.
Description
Technical field
The present invention relates to the generating circuit from reference voltage of voltage regulator and voltage regulator.
Background technology
Chip internal often needs a plurality of voltages accurately, as the control signal or the reference voltage signal of disparate modules, as the program voltage in the flash memory (flash memory), erasing voltage etc.Voltage generation circuit of the prior art generally uses reference voltage source to produce reference voltage, re-uses comparer, driver element and feedback unit this reference voltage is regulated, and produces the output voltage of relevant voltage value according to the demand of disparate modules.
See also Fig. 1, existing voltage regulator comprises generating circuit from reference voltage 1, comparer 2, driver element 3 and feedback unit 4, and driver element 3 output voltage V out are to load unit 5.Generating circuit from reference voltage 1 is in order to produce reference voltage.Two input ends of comparer 2 connect the output terminal of generating circuit from reference voltage 1 and the output terminal of feedback unit 4 respectively, and the output terminal of comparer 2 connects the input end of described driver element 3.The output terminal of driver element 3 connects the input end and the load unit 5 of feedback unit 4.Described load unit 5 can comprise capacitor type load unit and/or current mode load unit, as the read control signal port of flush memory device.
See also Fig. 2, Fig. 2 is the physical circuit figure of the voltage regulator of Fig. 1, and wherein, wherein driver element 3 specifically comprises PMOS transistor M1, feedback unit 4 specifically comprises the resistor network that is made of resistance R 1 and resistance R 2, and the branch pressure voltage that feedback unit 4 produces is as feedback voltage Vfb.Comparer 2 is in order to compare the reference voltage Vref that feedback voltage Vfb and generating circuit from reference voltage 1 produce.The conducting of driver element 3 or the comparative result that ends by comparer 2 determine, after repeatedly feeding back, make feedback voltage Vfb be tending towards equating with the magnitude of voltage of reference voltage Vref, thereby obtain stable output voltage V out.In actual applications, can make that output voltage V out is a scheduled voltage by the magnitude of voltage of adjustment reference voltage Vref and the resistance value of the resistor network in the feedback unit 4.
See also Fig. 3, the mode of operation that inserts the load unit 5 of voltage regulator has multiple, usually can comprise mode of operation and standby mode, such as, when load unit is storer, in the different moment, be operated in mode of operation (Active mode) respectively, standby mode (Standby mode) and originate mode (Initialmode), described mode of operation is meant the pattern of storer execution read operation or write operation, described standby mode is meant that storer neither carries out read operation, also do not carry out the pattern of write operation, described originate mode is the mode of operation when just having powered on to storer.In the prior art, the reference voltage that is used for voltage regulator is a fixed value, when load unit 5 when standby mode transfers mode of operation (execution read operation) to, load unit 5 can produce shunting effect, and owing to fix by the transient current of PMOS transistor M1, like this, cause diminishing by the electric current of resistance R 1 and R2, make the magnitude of voltage of output voltage V out of whole voltage regulator reduce, the feedback voltage Vfb of feedback unit 4 generations simultaneously also reduces, and through after the feedback of certain hour, output voltage V out recovers gradually, therefore, load unit 5 transfers to the process of mode of operation from standby mode, and downward amplitude dither appears in the voltage curve of output voltage V out, influences the operate as normal of load unit 5, such as, the speed of storer execution read operation is slack-off.
See also Fig. 4, the phenomenon that occurs amplitude dither for fear of load unit 5 variations, the way of prior art is to be connected decoupling capacitance C1 between driver element 3 and ground, and such scheme also can be referring to No. 200610121677.6, the Chinese patent application of Novatek Technology Co.In such scheme, decoupling capacitance C1 is for output voltage V out that can the burning voltage regulator, and the capacitance of decoupling capacitance C1 is bigger, can make that like this area of decoupling capacitance C1 is bigger, the cost height.In addition, decoupling capacitance C1 is for output voltage V out that can the burning voltage regulator, and entire circuit need be worked so that store electric charge on the decoupling capacitance C1 always, can make the power consumption height of whole voltage regulator like this.
Summary of the invention
The technical matters that the present invention solves is that amplitude dither, power consumption height and the big problem of area occupied appear in the voltage of voltage regulator output.
In order to address the above problem, the invention provides a kind of voltage regulator, this voltage regulator comprises generating circuit from reference voltage, comparer, driver element and feedback unit, comparer has first input end, second input end and output terminal; The input end of driver element is connected with the output terminal of comparer, and the output terminal of driver element is the output terminal of voltage regulator; The input end of feedback unit is connected with the output terminal of driver element, the output terminal of feedback unit is connected with the first input end of comparer, described generating circuit from reference voltage comprises first partial pressure unit and second partial pressure unit, and first partial pressure unit produces first reference voltage of second input end that inputs to described comparer to the first voltage dividing potential drop under the mode of operation of described load unit; Second partial pressure unit produces second reference voltage of second input end that inputs to described comparer to the second voltage dividing potential drop under the standby mode of described load unit, described second reference voltage is greater than first reference voltage.
Alternatively, also comprise compensating circuit and second switch, conducting when second switch drops to preset value at described second reference voltage, described compensating circuit is connected with second partial pressure unit by second switch, compensates second reference voltage of described second partial pressure unit output when described second switch conducting.
Alternatively, described compensating circuit comprises first resistance, second resistance and the 4th switch, first end input tertiary voltage of first resistance, and second end is connected with first end of second resistance; The 4th switch is a transistor, and first utmost point of the 4th switch is connected in second end of second resistance, second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is imported first control signal; Described second switch is a transistor, and first utmost point of this second switch is connected between first resistance and second resistance, and second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described first control signal when described second reference voltage drops to preset value effectively and described the 4th switch of conducting and second switch.
Alternatively, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, first utmost point input tertiary voltage of the first transistor, and the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is a transistor, first utmost point of the 4th switch connects the grid of transistor seconds, second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects first control signal, described second switch is a transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described second switch of conducting and the 4th switch when described first control signal drops to preset value at described second reference voltage.
Alternatively, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, first end of the 3rd electric capacity is imported the output voltage of described driver element, second end of described the 3rd electric capacity connects first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized first utmost point is imported the 4th voltage, the 7th transistorized second utmost point connects the described the 8th transistorized first utmost point, the 8th transistorized second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, and when the output voltage of driver element was lower than preset value, the node between the 7th transistorized second utmost point and the 8th transistor first order was exported described first control signal.
Alternatively, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, first end of the 3rd resistance is imported described first voltage, second end of the 3rd resistance is connected with first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described first reference voltage; Described first switch is a transistor, and this first switch, first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of first switch is connected in the output terminal of second partial pressure unit, and the control utmost point of first switch is imported second control signal; The 3rd switch is a transistor, first utmost point of the 3rd switch is connected in second end of the 4th resistance, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
Alternatively, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is imported described first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized grid, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is a transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, described first switch is a transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of first switch is connected in the output terminal of second partial pressure unit, and the control utmost point of first switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
Alternatively, described second partial pressure unit comprises first electric capacity and second electric capacity of serial connection, first end of first electric capacity is imported described second voltage, second end of first electric capacity connects first end of second electric capacity, the second end ground connection of second electric capacity, the node between described first electric capacity and second electric capacity is exported described second reference voltage.
Alternatively, described second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is imported described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described second reference voltage.
Alternatively, also comprise decoupling capacitance, this moves back lotus root electric capacity and is connected between the output terminal and ground of driver element.
A kind of generating circuit from reference voltage of voltage regulator, described voltage regulator is used for output voltage to load unit, this generating circuit from reference voltage comprises first partial pressure unit and second partial pressure unit, and described first partial pressure unit produces first reference voltage to the first voltage dividing potential drop under the mode of operation of described load unit; Described second partial pressure unit produces second reference voltage to the second voltage dividing potential drop under the standby mode of load unit, described second reference voltage is greater than first reference voltage.
Alternatively, also comprise compensating circuit and second switch, conducting when second switch drops to preset value at described second reference voltage, described compensating circuit is connected with second partial pressure unit by second switch, compensates second reference voltage of described second partial pressure unit output when described second switch conducting.
Alternatively, described compensating circuit comprises first resistance, second resistance and the 4th switch, first end input tertiary voltage of first resistance, and second end is connected with first end of second resistance; The 4th switch is a transistor, and first utmost point of the 4th switch is connected in second end of second resistance, second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is imported first control signal; Described second switch is a transistor, and first utmost point of this second switch is connected between first resistance and second resistance, and second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described first control signal when described second reference voltage drops to preset value effectively and described the 4th switch of conducting and second switch.
Alternatively, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, first utmost point input tertiary voltage of the first transistor, and the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is a transistor, first utmost point of the 4th switch connects the grid of transistor seconds, second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects first control signal, described second switch is a transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described second switch of conducting and the 4th switch when described first control signal drops to preset value at described second reference voltage.
Alternatively, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, first end of the 3rd electric capacity is imported the output voltage of described driver element, second end of described the 3rd electric capacity connects first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized first utmost point is imported the 4th voltage, the 7th transistorized second utmost point connects the described the 8th transistorized first utmost point, the 8th transistorized second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, and when the output voltage of driver element was lower than preset value, the node between the 7th transistorized second utmost point and the 8th transistor first order was exported described first control signal.
Alternatively, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, first end of the 3rd resistance is imported described first voltage, second end of the 3rd resistance is connected with first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described first reference voltage; Described first switch is a transistor, and this first switch, first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of first switch is connected in the output terminal of second partial pressure unit, and the control utmost point of first switch is imported second control signal; The 3rd switch is a transistor, first utmost point of the 3rd switch is connected in second end of the 4th resistance, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
Alternatively, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is imported described first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized grid, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is a transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, described first switch is a transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of first switch is connected in the output terminal of second partial pressure unit, and the control utmost point of first switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
Alternatively, described second partial pressure unit comprises first electric capacity and second electric capacity of serial connection, first end of first electric capacity is imported described second voltage, second end of first electric capacity connects first end of second electric capacity, the second end ground connection of second electric capacity, the node between described first electric capacity and second electric capacity is exported described second reference voltage.
Alternatively, described second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is imported described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described second reference voltage.
Compared with prior art, the invention has the beneficial effects as follows:
1, the present invention produces first reference voltage by generating circuit from reference voltage under mode of operation, under standby mode, produce second reference voltage and make second reference voltage greater than first reference voltage, thereby at load unit when standby mode transfers mode of operation to, can reduce the influence of the output voltage amplitude shake of voltage regulator to load unit work, and, under the less situation of load unit, can cancel decoupling capacitance, reduced cost.
2, because second reference voltage greater than first reference voltage, like this, can slowly compensate the voltage of voltage regulator by decoupling capacitance, at this moment, it is less that decoupling capacitance can be done.Thereby the electric capacity area occupied is little, and cost is low.
3, compensating circuit of the present invention compensates second reference voltage when second reference voltage is lower than preset value, thereby, not only can guarantee that second reference voltage is greater than first reference voltage, and, second partial pressure unit is combined by electric capacity, there is not electric current to flow through, so second partial pressure unit does not produce power consumption under standby mode, and compensating circuit is only just worked when the output voltage of driver element is lower than preset value, therefore, generating circuit from reference voltage low in energy consumption, and then, voltage regulator low in energy consumption.
Description of drawings
Fig. 1 is the structural representation of existing first kind of voltage regulator;
Fig. 2 is the physical circuit figure of the voltage regulator of Fig. 1;
Fig. 3 is the synoptic diagram that inserts load unit reference voltage under different working modes of Fig. 1;
Fig. 4 is the structural representation of existing second kind of voltage regulator;
Fig. 5 is the theory diagram of voltage regulator of the present invention;
Fig. 6 is the physical circuit figure of generating circuit from reference voltage first embodiment of voltage regulator of the present invention;
Fig. 7 is the synoptic diagram that load unit inserts voltage regulator of the present invention reference voltage under different working modes;
Fig. 8 is the structural representation that produces the voltage detection circuit of first control signal shown in Figure 6;
Fig. 9 is the physical circuit figure of generating circuit from reference voltage second embodiment of voltage regulator of the present invention.
Embodiment
The present inventor is in the process of design voltage regulator, find because the value of reference voltage is fixed, when the load unit that inserts voltage regulator when a kind of mode of operation switches to another mode of operation, transfer mode of operation (when carrying out read operation) such as storer to from standby mode, load unit can produce shunting effect, and fix by the transient current of PMOS transistor M1, the electric current of resistance R 1 and R2 of causing like this flowing through diminishes, thereby, the output voltage V out of voltage regulator reduces, simultaneously, the feedback voltage vfb that feedback unit produces also reduces, because the magnitude of voltage of comparer and driver element will pass through certain feedback delay, could recover, therefore, feedback delay during this period of time in, can make the voltage Vout of voltage regulator output that amplitude dither takes place and influence the work of load unit, such as, influence storer and read speed.And when decoupling capacitance being set eliminating this phenomenon, described decoupling capacitance area occupied is big, the power consumption height.
For this reason, the invention provides a kind of voltage regulator, this voltage regulator can be exported corresponding reference voltage according to the variation of load unit mode of operation, such as, when mode of operation, export first reference voltage, export second reference voltage at standby mode, and first reference voltage exported during greater than mode of operation of second reference voltage of when standby mode, exporting.
See also Fig. 5, the voltage regulator of present embodiment comprises generating circuit from reference voltage 6, comparer 2, driver element 3, feedback unit 4.Comparer 2 has first input end, second input end and output terminal, the output terminal of feedback unit 4 is connected in the first input end of comparer 2, the input end of driver element 3 is connected in the output terminal of comparer 2, and the output terminal of driver element 3 is to load unit 5 output voltage V out and be connected in the input end of feedback unit 4.In the present embodiment, described driver element 3, feedback unit 4 are identical with the structure of background technology, but, it will be appreciated by those skilled in the art that, the driver element of other types and feedback unit can be used for the present invention under the condition of the identical functions of driver element 3 that possesses present embodiment and feedback unit 4.
Please continue to consult Fig. 5 and Fig. 6, Fig. 6 is first embodiment of generating circuit from reference voltage 6 of the present invention, and the generating circuit from reference voltage 6 of this embodiment comprises first partial pressure unit 61, first switch 62, second partial pressure unit 63, compensating circuit 64 and second switch 65.
First partial pressure unit 61 is resistance pressure-dividing network in the present embodiment.This resistance pressure-dividing network comprises the 3rd resistance R 3, the 4th resistance R 4 and the 3rd switch T3.First end of the 3rd resistance R 3 is imported first voltage (such as VDD), and second end of the 3rd resistance R 3 is connected with first end of the 4th resistance R 4, and the node between the 3rd resistance R 3 and the 4th resistance R 4 is the output terminal of described first partial pressure unit 61.The 3rd switch T3 is nmos pass transistor in the present embodiment, first utmost point of the 3rd switch T3 (such as drain electrode) is connected in second end of the 4th resistance R 4, second utmost point (such as the source electrode) ground connection of the 3rd switch T3, the control utmost point (such as grid) the input second control signal act of the 3rd switch T3.The described second control signal act is effective when the mode of operation of load unit 5, thereby, conducting the 3rd switch T3.
Second partial pressure unit 63 comprises first capacitor C 2 and second capacitor C 3, node between this first capacitor C 2 and second capacitor C 3 is the output terminal of second partial pressure unit 63, export described second reference voltage, also be the output terminal vref of generating circuit from reference voltage 6, first end of first capacitor C 2 is imported second voltage (such as VDD), second end of first capacitor C 2 is connected with first end of second capacitor C 3, the second end ground connection of second capacitor C 3.
Described compensating circuit 64 comprises first resistance R 5, second resistance R 6 and the 4th switch T4, first end of first resistance R 5 connects tertiary voltage (such as VDD), second end of first resistance R 5 connects first end of second resistance R 6, in the present embodiment, first voltage, second voltage and tertiary voltage are VDD, certainly, also can regulate first voltage, second voltage and tertiary voltage, make the voltage of winning, second voltage and tertiary voltage unequal according to the dividing potential drop needs.The 4th switch T4 is a nmos pass transistor, and first utmost point of the 4th switch T4 (such as drain electrode) is connected in second end of second resistance R 6, second utmost point ground connection of the 4th switch T4, the control utmost point (such as grid) the input first control signal bleed of the 4th switch T4.The first control signal bleed is effective when the output voltage V out of driver element 3 drops to preset value, thereby, conducting the 4th switch T4.
See also Fig. 8, the first control signal bleed is produced by voltage detection circuit 7, and as shown in Figure 8, voltage detection circuit 7 comprises the 3rd capacitor C 4 and the 4th capacitor C 5, the 7th transistor T 13 and the 8th transistor T 14 of serial connection.The 3rd capacitor C 4 and the 4th capacitor C 5 serial connections, first end of the 3rd capacitor C 4 is imported the output voltage V out of described driver element 3, and second end of described the 3rd capacitor C 4 connects first end of the 4th capacitor C 5.The second end ground connection of the 4th capacitor C 5.The 7th transistor T 13 is the PMOS transistor, the control utmost point (as grid) of the 7th transistor T 13 is connected between the 3rd capacitor C 4 and the 4th capacitor C 5, first utmost point of the 7th transistor T 13 is imported the 4th voltage VDD, and second utmost point of the 7th transistor T 13 connects first utmost point of described the 8th transistor T 14.The 8th transistor T 14 is a nmos pass transistor, second utmost point ground connection of the 8th transistor T 14, and the control utmost point (as grid) of the 8th transistor T 14 connects the 5th voltage VDD.Node between second utmost point of the 7th transistor T 13 and the 8th transistor T 14 first utmost points is exported the described first control signal bleed.
Need to prove, voltage detection circuit 7 is not limited to circuit structure shown in Figure 8, as long as can have voltage when dropping to preset value, the voltage detecting voltage that can export a control signal can both be applied to the present invention, such as, adopt the difference comparator circuit to realize the circuit of voltage detecting.Voltage detecting circuit shown in Figure 8 is compared with adopting difference comparator circuit realization voltage detecting, when the 7th transistor T 13 (PMOS transistor) turn-offs, and can current sinking.
Seeing also Fig. 5, Fig. 6, Fig. 7 and Fig. 8, is that storer is that the course of work of voltage regulator of example explanation present embodiment is as follows with load unit 5:
When originate mode (Initial mode), load unit 5 and voltage regulator powered on and produce the first control signal act make win switch 62 and the 3rd switch T3 conducting, at this moment, second switch 65 disconnects, because the first voltage VDD is output as direct current, like this, second partial pressure unit 63 lost efficacy, the first partial pressure unit 61 couples first voltage VDD dividing potential drop of generating circuit from reference voltage 6 and export the first reference voltage vref1=VDD/ (1+R3/R4), this reference voltage vref1 inputs to second input end of comparer 2.2 couples first reference voltage vref1 of comparer and feedback voltage vfb compare until output voltage V out then, and how output voltage V out belongs to prior art for comparer 2, driver element 3 and feedback unit 4, does not repeat them here.
At standby mode (Standby mode), first switch 62 and second switch 65 all disconnect, and at this moment, the second reference voltage vref2 that generating circuit from reference voltage 6 produces is the dividing potential drop of 63 couples second voltage VDD of second partial pressure unit.Describe the partial pressure value of second partial pressure unit 63 below in detail, make C2=KC3 by technology controlling and process, according to the CHARGE DISTRIBUTION principle, the first capacitor C 2=VDD-vref2, the second capacitor C 3=vref2 thus, can solve
Reference voltage vref2 inputs to second input end of comparer 1.Under standby mode, the electric charge of first capacitor C 2 and second capacitor C 3 can tail off gradually and make the value of the second reference voltage vref2 reduce gradually, thereby when making the output voltage V out of driver element 3 be lower than preset value (as the little triangle among Fig. 7), because the output voltage V out of the 3rd capacitor C 4 and 5 pairs of driver elements 3 of the 4th capacitor C carries out dividing potential drop, therefore, the voltage of the node between the 3rd capacitor C 4 and the 4th capacitor C 5 reduces, thereby make the voltage of VSET reduce, 13 conductings of the 7th transistor T, thereby, export the first control signal bleed, and, be in conducting state because the grid of nmos pass transistor T14 meets VDD, the voltage of the second control signal bleed that produces can be dragged down, thereby, second switch 65 and the 4th switch T4 conducting, 64 couples second reference voltage vref2 compensate by compensating circuit, at this moment, bucking voltage vb=VDDR6/ (R5+R6) makes the value of the second reference voltage vref2 rise to when 63 chargings of 64 pairs second partial pressure unit of compensating circuit
The time, stop charging.Described preset value hangs down 0.3V or 0.4V than the output voltage V out of driver element 3 usually, such as, when the output voltage V out of driver element 3 was 2.5V, preset value can be made as 2.2V.In this generating circuit from reference voltage 6, when as long as the value of the output voltage V out of driver element 3 is lower than preset value, compensating circuit 64 is started working, like this, the first reference voltage vref1 of the second reference voltage vref2 under the standby mode during all the time greater than mode of operation, after adopting this mode, not only can guarantee that second reference voltage is greater than first reference voltage, and, second partial pressure unit 63 is combined by first capacitor C 2 and second capacitor C 3, do not have electric current to flow through, so second partial pressure unit 63 does not produce power consumption under standby mode, and compensating circuit 64 is only just worked when the output voltage V out of driver element 3 is lower than preset value, therefore, generating circuit from reference voltage 6 low in energy consumption, and then, voltage regulator low in energy consumption.
Above-mentioned voltage regulator is when work, and the 3rd switch T3 and the 4th switch T4 be conducting in the time of first partial pressure unit 61 and compensating circuit 64 work respectively, disconnects constantly at other, like this, can prevent to leak electricity and influence the work of voltage regulator, thereby, the performance of storer influenced.
At mode of operation (Active mode), owing to do not produce the first control signal bleed, so the second switch 65 of generating circuit from reference voltage 6 disconnects, 62 conductings of first switch, at this moment, the principle that produces reference voltage is identical with the principle of the reference voltage that produces when the originate mode, does not repeat them here.Because
Vref1=VDD/ (1+R3/R4), the value of adjusting R3, R4 and K can be so that vref2＞vref1.
Because second reference voltage vref2＞vref1, corresponding vout2＞vout1, like this, the magnitude of voltage that voltage regulator is exported when the standby mode of load unit 5 is greater than the magnitude of voltage of the output of originate mode or mode of operation, the amplitude dither variable quantity of carrying out read operation when described load unit 5 is T, then, by regulating K, the value of R3 and R4, can be so that vout2-T＞vout1, that is to say, the magnitude of voltage the when value after the amplitude dither can be higher than mode of operation a little, in such cases, can avoid the influence of amplitude dither to load unit 5 work, in addition, because vout2＞vout1 makes the reference point of amplitude dither improve with respect to vout1, like this, can be slowly output terminal by being connected driver element 3 and the decoupling capacitance C6 between the ground voltage of node vout1 is compensated, also can reduce the influence of amplitude dither to load unit 5 work, and, even under the bigger situation of load unit 5, it is less that decoupling capacitance C6 also can do.Thereby the decoupling capacitance area occupied is little, and cost is low.
In the foregoing description, under mode of operation, the conducting by first switch 62 makes when winning the partial pressure unit 61 outputs first reference voltage vref1, and second partial pressure unit 63 is invalid; Under standby mode, disconnection by first switch 62 makes second partial pressure unit 63 export the second reference voltage vref2, based on this kind thinking, in other embodiment, can make the partial pressure unit 61 of winning selected and export the first reference voltage vref1 second input end of comparer under mode of operation by gating switch, under standby mode, select second partial pressure unit 63 the second reference voltage vref2 to be exported to second input end of comparer.
See also Fig. 9, Fig. 9 is second embodiment of the generating circuit from reference voltage 6 of voltage regulator of the present invention, among this embodiment, first partial pressure unit 66, second partial pressure unit 67 and compensating circuit 68 are different with the structure of first partial pressure unit 61, second partial pressure unit 63 and the compensating circuit 64 of first embodiment.
See also Fig. 9, described first partial pressure unit 66 comprises the 3rd transistor T 5, the 4th transistor T 6 and the 3rd switch T7.The 3rd transistor T 5 is the PMOS transistor, and first utmost point of the 3rd transistor T 5 connects first voltage (such as VDD), and the control utmost point (such as grid) of the 3rd transistor T 5 is connected with second utmost point of the 3rd transistor T 5.The 4th transistor T 6 is the PMOS transistor, and first utmost point of the 4th transistor T 6 is connected in the control utmost point of the 3rd transistor T 5, and the control utmost point (such as grid) of the 4th transistor T 6 is connected with second utmost point of the 4th transistor T 6.The 3rd switch T7 is a nmos pass transistor, and first utmost point of the 3rd switch T7 is connected in the control utmost point (such as grid) of the 4th transistor T 6, second utmost point ground connection of the 3rd switch T7, the control utmost point (such as grid) the input second control signal act of the 3rd switch.
See also Fig. 9, second partial pressure unit 67 comprises the 5th transistor T 8 and the 6th transistor T 9.The 5th transistor T 8 is the PMOS transistor, first utmost point of the 5th transistor T 8 connects second voltage (such as VDD), the control utmost point (such as grid) of the 5th transistor T 8 is connected with second utmost point of the 5th transistor T 8, and the substrate of the 5th transistor T 8 connects substrate bias voltage VB.The 6th transistor T 9 is the PMOS transistor, and first utmost point of the 6th transistor T 9 is connected in the control utmost point (such as grid) of the 5th transistor T 8, the control utmost point (such as grid) of the 6th transistor T 9 and second utmost point ground connection of the 6th transistor T 9.
See also Fig. 9, compensating circuit 68 comprises the first transistor T10, transistor seconds T11 and the 4th switch T12.The first transistor T10 is the PMOS transistor, first utmost point of the first transistor T10 connects tertiary voltage (such as VDD), the control utmost point (such as grid) of the first transistor T10 is connected with second utmost point of the first transistor T10, and the substrate of the first transistor T10 connects substrate bias voltage VB.Transistor seconds T11 is the PMOS transistor, and first utmost point of transistor seconds T11 is connected in the control utmost point (such as grid) of the first transistor T10, the control utmost point (such as grid) of transistor seconds T11 and second utmost point ground connection of transistor seconds T11.Described the 4th switch T12 is a nmos pass transistor, first utmost point of the 4th switch T12 connects the control utmost point (such as grid) of transistor seconds T11, second utmost point ground connection of the 4th switch T12, the control utmost point (such as grid) the input first control signal bleed of the 4th switch T12, described first control signal bleed conducting second switch 65 when described second reference voltage drops to preset value.
Among this embodiment, the effect of the 3rd transistor T 5 and the 4th transistor T 6 is identical with the effect of the 4th resistance R 4 with the 3rd resistance R 3, the effect of the 5th transistor T 8 and the 6th transistor T 9 is identical with the effect of second capacitor C 3 with first capacitor C 2, the effect of the first transistor T10 and transistor seconds T11 is identical with the effect of first resistance R 5 and R6, therefore, the principle of work of present embodiment is the same with first embodiment, does not repeat them here.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.
Claims (19)
1. a voltage regulator is used for output voltage to load unit, comprising:
Generating circuit from reference voltage;
Comparer has first input end, second input end and output terminal;
Driver element, the input end of this driver element is connected with the output terminal of comparer, and the output terminal of this driver element is the output terminal of voltage regulator;
Feedback unit, the input end of this feedback unit is connected with the output terminal of driver element, and the output terminal of feedback unit is connected with the first input end of comparer, it is characterized in that, and described generating circuit from reference voltage comprises:
First partial pressure unit produces first reference voltage of second input end that inputs to described comparer to the first voltage dividing potential drop under the mode of operation of described load unit;
Second partial pressure unit produces second reference voltage of second input end that inputs to described comparer to the second voltage dividing potential drop under the standby mode of described load unit, described second reference voltage is greater than first reference voltage.
2. voltage regulator as claimed in claim 1, it is characterized in that, also comprise compensating circuit and second switch, conducting when second switch drops to preset value at described second reference voltage, described compensating circuit is connected with second partial pressure unit by second switch, compensates second reference voltage of described second partial pressure unit output when described second switch conducting.
3. voltage regulator as claimed in claim 2 is characterized in that, described compensating circuit comprises first resistance, second resistance and the 4th switch, first end input tertiary voltage of first resistance, and second end is connected with first end of second resistance; The 4th switch is a transistor, and first utmost point of the 4th switch is connected in second end of second resistance, second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is imported first control signal; Described second switch is a transistor, and first utmost point of this second switch is connected between first resistance and second resistance, and second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described first control signal when described second reference voltage drops to preset value effectively and described the 4th switch of conducting and second switch.
4. voltage regulator as claimed in claim 2, it is characterized in that, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, first utmost point input tertiary voltage of the first transistor, and the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is a transistor, first utmost point of the 4th switch connects the grid of transistor seconds, second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects first control signal, described second switch is a transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described second switch of conducting and the 4th switch when described first control signal drops to preset value at described second reference voltage.
5. as claim 3 or 4 described voltage regulators, it is characterized in that, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, first end of the 3rd electric capacity is imported the output voltage of described driver element, second end of described the 3rd electric capacity connects first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized first utmost point is imported the 4th voltage, the 7th transistorized second utmost point connects the described the 8th transistorized first utmost point, the 8th transistorized second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, when the output voltage of driver element was lower than preset value, the node between the 7th transistorized second utmost point and the 8th transistor first order was exported described first control signal.
6. voltage regulator as claimed in claim 1, it is characterized in that, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, first end of the 3rd resistance is imported described first voltage, second end of the 3rd resistance is connected with first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described first reference voltage; Described first switch is a transistor, and this first switch, first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of first switch is connected in the output terminal of second partial pressure unit, and the control utmost point of first switch is imported second control signal; The 3rd switch is a transistor, first utmost point of the 3rd switch is connected in second end of the 4th resistance, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
7. voltage regulator as claimed in claim 1, it is characterized in that, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is imported described first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized grid, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is a transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, described first switch is a transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of first switch is connected in the output terminal of second partial pressure unit, the control utmost point of first switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
8. voltage regulator as claimed in claim 1, it is characterized in that, described second partial pressure unit comprises first electric capacity and second electric capacity of serial connection, first end of first electric capacity is imported described second voltage, second end of first electric capacity connects first end of second electric capacity, the second end ground connection of second electric capacity, the node between described first electric capacity and second electric capacity is exported described second reference voltage.
9. voltage regulator as claimed in claim 1, it is characterized in that, described second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is imported described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described second reference voltage.
10. voltage regulator as claimed in claim 1 is characterized in that, also comprises decoupling capacitance, and this moves back lotus root electric capacity and is connected between the output terminal and ground of driver element.
11. the generating circuit from reference voltage of a voltage regulator, described voltage regulator is used for output voltage to load unit, it is characterized in that, comprise first partial pressure unit and second partial pressure unit, described first partial pressure unit produces first reference voltage to the first voltage dividing potential drop under the mode of operation of described load unit; Described second partial pressure unit produces second reference voltage to the second voltage dividing potential drop under the standby mode of load unit, described second reference voltage is greater than first reference voltage.
12. the generating circuit from reference voltage of voltage regulator as claimed in claim 11, it is characterized in that, also comprise compensating circuit and second switch, conducting when second switch drops to preset value at described second reference voltage, described compensating circuit is connected with second partial pressure unit by second switch, compensates second reference voltage of described second partial pressure unit output when described second switch conducting.
13. the generating circuit from reference voltage of voltage regulator as claimed in claim 12, it is characterized in that, described compensating circuit comprises first resistance, second resistance and the 4th switch, first end input tertiary voltage of first resistance, and second end is connected with first end of second resistance; The 4th switch is a transistor, and first utmost point of the 4th switch is connected in second end of second resistance, second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is imported first control signal; Described second switch is a transistor, and first utmost point of this second switch is connected between first resistance and second resistance, and second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described first control signal when described second reference voltage drops to preset value effectively and described the 4th switch of conducting and second switch.
14. the generating circuit from reference voltage of voltage regulator as claimed in claim 12, it is characterized in that, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, first utmost point input tertiary voltage of the first transistor, the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is a transistor, first utmost point of the 4th switch connects the grid of transistor seconds, second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects first control signal, described second switch is a transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected the output terminal of second partial pressure unit, and the control utmost point of second switch is imported first control signal; Under the standby mode of load unit, described second switch of conducting and the 4th switch when described first control signal drops to preset value at described second reference voltage.
15. generating circuit from reference voltage as claim 13 or 14 described voltage regulators, it is characterized in that, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, first end of the 3rd electric capacity is imported the output voltage of described driver element, second end of described the 3rd electric capacity connects first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized first utmost point is imported the 4th voltage, the 7th transistorized second utmost point connects the described the 8th transistorized first utmost point, the 8th transistorized second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, when the output voltage of driver element was lower than preset value, the node between the 7th transistorized second utmost point and the 8th transistor first order was exported described first control signal.
16. the generating circuit from reference voltage of voltage regulator as claimed in claim 11, it is characterized in that, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, first end of the 3rd resistance is imported described first voltage, second end of the 3rd resistance is connected with first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described first reference voltage; Described first switch is a transistor, and this first switch, first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of first switch is connected in the output terminal of second partial pressure unit, and the control utmost point of first switch is imported second control signal; The 3rd switch is a transistor, first utmost point of the 3rd switch is connected in second end of the 4th resistance, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
17. the generating circuit from reference voltage of voltage regulator as claimed in claim 11, it is characterized in that, described generating circuit from reference voltage also comprises first switch, described first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is imported described first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized grid, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is a transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is imported second control signal, described first switch is a transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of first switch is connected in the output terminal of second partial pressure unit, the control utmost point of first switch is imported second control signal, and second control signal is described first switch of conducting and the 3rd switch when the mode of operation of load unit.
18. the generating circuit from reference voltage of voltage regulator as claimed in claim 11, it is characterized in that, described second partial pressure unit comprises first electric capacity and second electric capacity of serial connection, first end of first electric capacity is imported described second voltage, second end of first electric capacity connects first end of second electric capacity, the second end ground connection of second electric capacity, the node between described first electric capacity and second electric capacity is exported described second reference voltage.
19. the generating circuit from reference voltage of voltage regulator as claimed in claim 11, it is characterized in that, described second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is imported described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described second reference voltage.
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