CN102148168B - 制造具有改进抬升的半导体封装的方法 - Google Patents

制造具有改进抬升的半导体封装的方法 Download PDF

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CN102148168B
CN102148168B CN201010141754.0A CN201010141754A CN102148168B CN 102148168 B CN102148168 B CN 102148168B CN 201010141754 A CN201010141754 A CN 201010141754A CN 102148168 B CN102148168 B CN 102148168B
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骆军华
庞兴收
姚晋钟
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NXP USA Inc
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Abstract

通过将管芯附着于引线框架的标记物的上表面，然后对引线框架的标记物和引线的底表面进行带，来形成一种无引线型半导体封装。利用导线将管芯接合焊盘连接到引线，随后将该组件放入模具中，并利用塑料材料来密封。模具在引线框架的标记物和引线之间，以及在引线之间，具有凸起，这引起引线之间及标记物和引线之间形成的凹口。这种方法尤其有利于制造方形扁平无引线(QFN)器件和功率-QFN类型的器件。

Description

制造具有改进抬升的半导体封装的方法
技术领域
本发明涉及半导体封装，更具体地涉及制造具有改进抬升(standoff)的半导体封装的方法。
背景技术
半导体管芯包括形成在硅中的集成电路，所述集成电路通常在与其他电子器件或电路连接之前被封装。这样的封装通常必需将管芯附着于引线框架或衬底，然后使用制模化合物将管芯和电气连接进行密封。有多种类型的可用封装，一些具有延伸出制模化合物侧面的引线，并且其它具有在封装底表面上的焊点或传导球的阵列。
期望降低半导体封装的尺寸和外形。薄器件被称为低外形封装。一种已知的低外形封装被称为QFN(方形扁平无引线)。在QFN型封装中，在封装的侧表面和/或底表面处封装引线是暴露的，并且引线通常与制模化合物齐平。因而，由于其低的抬升高度，将QFN器件附着到衬底或印刷电路板(PCB)是困难的。抬升高度指的是PCB与半导体器件之间的距离。
图1示出了一种附着于PCB 12的常规QFN器件10。可以利用回流焊接工艺将QFN器件10附着到PCB 12。在回流焊接时，QFN器件10通过焊膏附着到PCB 12，并且然后诸如通过用于熔融焊料的回流炉进行加热，从而将器件10和PCB 12连接，更具体地，在焊接接点16处，将器件10暴露引线14与PCB 12上的对应连接点相连接。从图1明显看出，器件10与PCB 12之间具有非常低的抬升高度。低的抬升高度可以增加由管芯和PCB的热膨胀系数(CTE)之间的差所引起的焊接接点16处的应力水平，这意味着焊接接点16中的一些可能非常弱。另外，低的抬升高度使得更加难于在器件10与PCB 12之间***底部填充材料(未示出)，因为许多底部填充材料阻止在具有低抬升高度的衬底和器件之间的流动。
一种用于增加抬升高度以实现将更牢固的焊接接点的方法是将焊球附着于器件底面上的暴露引线，例如球栅阵列(BGA)。然而，必需形成BGA就增加了封装工艺的时间和耗费。而且，在将器件焊接到PCB之前，由于误操作，焊球有时会被移位(dislodge)。因而，在不增加生产成本的情况下增加QFN或类似类型封装的抬升高度是有利的。
附图说明
本发明通过示例阐明，并且不限于附图，其中相同附图标记表示类似的元素。附图中的元素是为了清楚简要而示出的，并且不需要按比例绘出。
图1为附着于衬底或印刷电路板的常规QFN器件的放大侧视图；
图2为附着于PCB的根据本发明方法组装的QFN器件的放大侧视图；
图3为根据本发明实施例组装QFN器件时的步骤的图解；
图4为根据图3所示的步骤组装的QFN器件的底视平面图。
图5A和5B分别为沿着图4中的A-A和B-B线的模具剖视图。
图5C为根据本发明实施例，附着于并电连接到模具内部的衬底的半导体管芯的示意图。
具体实施方式
本发明涉及一种组装电子器件的全面工艺，其具有改进的抬升高度，使得器件与衬底或PCB之间的焊接接点(电气连接)牢固和可靠。由于一些步骤和材料是公知的，随后不再对其进行详细描述，以便不模糊或偏离本发明的教导。例如，此处所描述的半导体管芯可以是任何的半导体材料或材料的组合，例如砷化镓、硅锗、绝缘体上硅(SOI)、硅、单晶硅等及上述材料的组合。
另外，在说明书和权利要求中的术语“前部”，“后部”，“顶部”，“底部”，“在......上面”，“在......下面”等，如果有的话，用于描述的目的，不必描述不变的相对位置。可以理解，所使用的术语在适当的情况下是可以互换的，使得此处所描述的发明实施例在除了那些在此处被描述或者另外示出的方位中能够实施。此外，除非另有规定，诸如“第一”和“第二”的术语被用来任何地区分上述术语所描述的元素。因而，这些术语不必用来指示这些元素的时间或其他优先次序。
此外，使用“一”限定的术语可以定义为一个或多于一个。而且，在权利要求中使用诸如“至少一个”和“一个或多个”的引用短语不应解释为暗示被不定冠词“一”引用的另一权利要求要素将仅包含一个这样的元素的发明的引用权利要求元素的任何特定的权利要求限制为包含仅一个这样元素的发明，即便当相同的权利要求包括引用冠词“一个或多个”或者“至少一个”和不定冠词“一”或“一个”时。对定冠词的用法是一样的。
在一个实施例中，本发明提供了一种用于封装半导体管芯的方法，包括以下步骤：
将管芯的第一侧附着于引线框架标记物的第一侧，并且将带附着于引线框架的第二侧；
利用导线将与管芯的第一侧相对的管芯的第二侧上的接合焊盘电连接到引线框架的引线；
通过模制工艺，利用制模化合物密封至少管芯的第二侧、导线及引线框架的第一侧，其中模制工艺包括：将附着有带的引线框架放入模具套的第一部分内，模具套的第一部分在表面上具有第一凸起，所述第一凸起被安排成在引线框架的引线之间突出；以及
从引线框架的第二侧移除带。
在另一实施例中，本发明提供了一种用于封装半导体管芯的方法，包括以下步骤：
将管芯的第一侧附着于引线框架的标记物的第一侧，以及将带附着于引线框架的第二侧；
利用导线将与管芯的第一侧相对的管芯的第二侧上的接合焊盘电连接到引线框架的引线；
通过模制工艺，利用制模化合物密封至少管芯的第二侧、导线及引线框架的第一侧，其中模制工艺包括：将附着有带的引线框架放入模具套的第一部分内，模具套的第一部分在表面上具有第一凸起，所述第一凸起被安排成在引线框架的引线之间突出；以及，固化制模化合物；
从引线框架的第二侧移除带；以及
执行分割操作，以将引线框架与任何相邻的引线框架分离。
现在参见图2，示出了根据本发明方法形成的、附着于PCB 22的半导体封装20。半导体封装20包括电连接于引线框架的管芯，管芯和引线框架至少部分被制模化合物24密封。在所示的实施例中，封装20是通过回流焊接而附着于PCB 22的QFN型封装。封装20的暴露引线26在焊接接点28处与PCB 22上的对应连接点连接。封装20具有低的抬升高度。然而，如图2所示，封装20具有凹口30，凹口30沿着封装20的底表面位于引线26的相邻引线之间。因而，尽管在封装20和PCB 12之间具有低的抬升高度，但在引线26之间仍旧具有足够的空间来形成牢固的焊接接点。在引线26之间也仍旧具有足够的空间以允许在封装20与PCB 22之间注入底部填充材料(underfill material)。
现在参考图3，示出了根据本发明实施例的用于封装半导体管芯的方法。从附图的顶部开始，半导体管芯32附着于引线框架34。引线框架包括标记物36和多个引线38。更具体地，管芯32的第一侧附着于引线框架34的标记物36的第一侧。管芯32和引线框架34均是本领域已知的。可采用通常商业上可用的诸如环氧树脂或金属基的管芯附着材料之类的粘合剂将管芯32附着于标记物36。在接下来的图示步骤中，带40附着于引线框架34的第二侧。带(tape)40可以是本领域公知的压敏粘合带或热熔粘合带。带40用于帮助阻止模制期间的树脂溢出。
下一图示的步骤包括利用导线42将与管芯的第一侧相对的管芯32的第二侧上的接合焊盘电连接到引线框架34的引线38。这些电气连接可以使用可商业获取的导线接合设备来完成。导线42由诸如金或铜的传导金属制成。
在导线接合步骤后，管芯32和附着有带的引线框架34被置于模具套(mold chase)(未示出)中并由制模化合物来密封。模具套包括两个部分。附着有带的引线框架34被置于模具套的第一部分中。模具套的第一部分具有设置在其表面上的第一凸起，以使所述第一凸起在引线框架34的引线38之间突出。在本发明的一个实施例中，模具套的第一部分还包括在其表面上的第二凸起，第二凸起被安排为在标记物36和引线38之间突出。第二凸起使得在标记物36和引线38之间形成凹口46。制模化合物44可以包括本领域已知的塑料或树脂材料。制模化合物44至少覆盖管芯32的第二侧、导线42及引线框架34的第一侧。
在最后图示的步骤中，从引线框架34的第二侧移除带40，从而暴露出引线38的第二侧。通过使用商业可用的去带(detaping)设备来手动或自动地移除带40。在本发明的一个实施例中，在移除带40之前将制模化合物44固化。如此，形成了实现改进抬升的QFN型封装48。
如本领域公知的，如果使用引线框架阵列以使得可以同时形成多个封装，则可以在从引线框架阵列移除带之前或之后执行分割(singulation)操作。分割操作将引线框架与任何相邻的引线框架分离。
现在参见附图4，示出了包括标记物36和围绕标记物36的引线38的引线框架34的示例。可以通过本领域公知的切割或冲压铜箔片来形成引线框架34。
图5A示出模具套50的剖视图，该模具套50包括第一或下部模具套52和第二或上部模具套54。所示的模具套50的剖视图是沿着图4中的引线框架34的A-A线获取的。因此，示出了被安排在标记物36与引线38之间的第二突出58中的两个。图5B示出的模具套50的剖视图是沿着图4中示出的引线框架34的B-B线获取的。因而，示出被安排在引线框架34的引线38之间的第一突出56。图5C示出了模具套50，其具有管芯32、包含标记物36和引线38的引线框架34、带40、导线42及制模化合物44。附图5C还示出了安排在标记物36和引线38之间的第二突出58。
至此，应当理解，提供了一种电子器件(封装的半导体管芯)，其具有可容易地被焊接到衬底或PCB的低外形。尽管此处参考特定的实施例描述了本发明，但在不脱离所附权利要求阐述的本发明的范围的情况下，可以进行各种修改和变化，说明书和附图是被看作例证性的而不是限制意义的，且所有此类修改被包含在本发明的范围内。此处关于特定实施例所描述的任何好处、优点或是问题的解决方式都不能被理解为任何或所有权利要求的关键的、必须的或基本的特征或元素。

Claims (8)

1.一种用于封装半导体管芯的方法，所述方法包括：
将所述管芯的第一侧附着于引线框架的标记物的第一侧；
使带附着于所述引线框架的第二侧；
利用导线将与所述管芯的所述第一侧相对的所述管芯的第二侧上的接合焊盘电连接到所述引线框架的引线；
通过模制工艺，利用制模化合物密封至少所述管芯的所述第二侧、所述导线及所述引线框架的所述第一侧，其中所述模制工艺包括：将附着有带的引线框架放入模具套的第一部分内，所述模具套的第一部分在表面上具有第一凸起，所述第一凸起被安排成在所述引线框架的引线之间突出；以及
从所述引线框架的所述第二侧移除所述带，使得以上述方式形成的封装在相邻引线之间具有凹口，
其中所述模具套的第一部分在表面上包括第二凸起，所述第二凸起被安排成在所述标记物与所述引线之间突出。
2.如权利要求1所述的用于封装半导体管芯的方法，进一步包括以下步骤：在移除所述带之前固化所述制模化合物。
3.如权利要求2所述的用于封装半导体管芯的方法，进一步包括以下步骤：执行分割操作，以将所述引线框架与任何相邻的引线框架分离。
4.如权利要求1所述的用于封装半导体管芯的方法，其中利用粘合剂将所述管芯附着于所述引线框架的所述标记物。
5.如权利要求4所述的用于封装半导体管芯的方法，其中通过导线接合将所述管芯接合焊盘电连接到所述引线。
6.一种用于封装半导体管芯的方法，所述方法包括：
将所述管芯的第一侧附着于引线框架的标记物的第一侧；
将带附着于所述引线框架的第二侧；
利用导线将与所述管芯的所述第一侧相对的所述管芯的第二侧上的接合焊盘电连接到所述引线框架的引线；
通过模制工艺，利用制模化合物密封至少所述管芯的所述第二侧、所述导线及所述引线框架的所述第一侧，其中所述模制工艺包括：将附着有带的引线框架放入模具套的第一部分内，所述模具套的第一部分在表面上具有第一凸起，所述第一凸起被安排成在所述引线框架的所述引线之间突出；
固化所述制模化合物；
从所述引线框架的所述第二侧移除所述带，从而暴露所述引线的第二侧；
执行分割操作，以将所述引线框架与任何相邻的引线框架分离，使得以上述方式形成的封装在相邻引线之间具有凹口，
其中所述模具套的所述第一部分在表面上包括第二凸起，所述第二凸起被安排成在所述标记物与所述引线之间突出。
7.如权利要求6所述的用于封装半导体管芯的方法，其中利用粘合剂将所述管芯附着于所述引线框架的所述标记物。
8.如权利要求7所述的用于封装半导体管芯的方法，其中通过导线接合将所述管芯接合焊盘电连接到所述引线。
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