CN102006072B - Low-voltage and low-consumption folding and interpolating analog/digital (A/D) converter adopting grouping type T/H switch - Google Patents
Low-voltage and low-consumption folding and interpolating analog/digital (A/D) converter adopting grouping type T/H switch Download PDFInfo
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Abstract
The invention belongs to the technical field of integrated circuits, in particular to a low-voltage and low-consumption folding and interpolating analog/digital (A/D) converter adopting a grouping type T/H switch. The folding and interpolating A/D converter comprises a folding unit analog pretreating module or an interpolating analog pretreating module; the grouping type T/H switch is provided with at least two backward stage pre-amplifying circuits processed by each T/H switch. The whole structure of the A/D converter is composed of the grouping T/H circuit, a reference voltage resistor string, a pre-amplifying circuit assay, an N-cascaded fold circuit, an interpolating circuit, a comparator and a coding circuit. The fold A/D converter can improve, track and maintain the high linearity design of the switch, can omit the voltage driver for isolation between the T/H switch and pre-amplifying circuit in the traditional structure, and reduce the power dissipation of the A/D converter.
Description
Technical field
The invention belongs to technical field of integrated circuits, be specifically related to a kind of low-voltage, low power consumption folded interpolating analog to digital converter that adopts packet type T/H switch.
Background technology
The folded interpolating A/D converter structural representation of the single track and hold circuit of Traditional use is as shown in Figure 1, mainly by single track and hold circuit 7, Voltag driving circuit 8, resistance string generating circuit from reference voltage 1, thin son in advance amplifying circuit 2, thick son amplifying circuit 9, folding electric circuit 3, interpolating circuit 4, thin sub-comparator circuit 5, thick sub-comparator circuit 10 and coding circuit 6 constitute in advance.The folded interpolating A/D converter structural representation of Traditional use distributed tracking holding circuit is as shown in Figure 2, mainly by resistance string generating circuit from reference voltage 11, thin son in advance zero crossing produce circuit 12 distributed tracking holding circuits 13, thick son amplifying circuit 18, folding electric circuit 14, interpolating circuit 15, thin sub-comparator circuit 16, thick sub-comparator circuit 19 and coding circuit constitute in advance.
Generally adopt the purpose of track and hold circuit to be to eliminate owing to the frequency-doubled effect that folding electric circuit brought in the folded interpolating A/D converter, the performance of the track and hold circuit of same front end has determined the performance of whole folded interpolating A/D converter.Therefore particularly important for the design of front end track and hold circuit.The equivalent model of traditional single track and hold circuit is as shown in Figure 4; This illustraton of model comprises single track and hold circuit 35, Voltag driving circuit 41 and input amplifier equivalent parasitic capacitances 42 in advance, and single track and hold circuit 35 comprises that grid voltage boostrap circuit 38, perfect switch 37, equivalent simulation signal input 36, switch equivalence conducting resistance 39 and sampling keep electric capacity 40.According to the relevant knowledge of signal processing, can get
, signal f that thus can proper input
InOne regularly, and the gain of the input signal that sampling keeps is with conducting resistance and keeps electric capacity to be inversely proportional to.Adopt the method for grid voltage boostrap circuit 38 to guarantee the irrelevant of conducting resistance and input signal amplitude during tradition realizes, the method that adopts Voltag driving circuit 39 to isolate realize holding circuit and in advance amplifying circuit import irrelevant between the parasitic capacitance.This has wherein proposed very high requirement for the design of Voltag driving circuit; Should guarantee that the very high linearity also will guarantee high bandwidth in the ultra-high speed applications; This just makes that this drive circuit power consumed is very big; Even the employing high power supply voltage, this be unfavorable for very much the chip of folded interpolating A/D converter integrated with low-power consumption, high precision design.
Equally; As shown in Figure 5 for the distributed tracking holding circuit; This circuit comprises analog signal input 43, zero crossing produces circuit 44 and distributed tracking maintained switch 49 in advance, and wherein distributed tracking maintained switch 49 comprises grid voltage boostrap circuit 45, perfect switch 46, switch equivalence conducting resistance 47 and preparatory input amplifier parasitic capacitance 48.Distributed tracking holding circuit 49 with the parasitic capacitance 48 of preparatory input amplifier as keeping electric capacity, but because the input parasitic capacitance of preparatory amplifying circuit is a difference along with the input pipe operating state changes.As shown in Figure 6, comprise preparatory amplifying circuit equivalent differential input pipe M1 54, grid source parasitic capacitance 50, grid leak parasitic capacitance 51, load resistance 52, drain-substrate capacitance 53 and tail current source 55 among this figure.Input parasitic capacitance 48 mainly is made up of grid source parasitic capacitance 50 and grid leak parasitic capacitance 51 Miller equivalent capacitys; Variation with the input pipe operating state changes; Thereby the difference of sampled value gain when having caused different amplitudes to be imported, thereby introduce the non-linear folded interpolating A/D converter performance decrease that causes.Though the parasitic capacitance 48 of distributed tracking maintained switch rear end is the (1/N of the parasitic capacitance 42 of single tracking maintained switch rear end
P).But, in high-precision design still be not enough.In addition, the area of distributed tracking holding circuit will be very big, especially adopts the distributed sample switch of grid voltage bootstrapping, and this is not suitable for low pressure, low-power consumption and insertion type design equally.
Summary of the invention
The objective of the invention is under the prerequisite that reduces by 40 influences of 42 pairs of maintenances of input parasitic capacitance electric capacity; Omit Voltag driving circuit 41 in the single track and hold circuit; Reduce power consumption and abandon the big defective of distributed tracking maintained switch area simultaneously, thereby a kind of low-voltage, low-power consumption and high-precision folded interpolating A/D converter are provided.
The present invention proposes a kind of packet type that is applied in the folded interpolating A/D converter and follow the tracks of maintained switch, at first preparatory amplifying circuit is divided into N
PGroup, N
PThe prerequisite of confirming is to guarantee that the input parasitic capacitance can be ignored the influence that keeps electric capacity in the scope that precision allows; Saved Voltag driving circuit 41; Reduced power consumption; Relatively the distributed tracking holding circuit adopts fixing maintenance electric capacity and less sub-switch simultaneously, is from power consumption area aspect or from the switch performance aspect very big raising to be arranged all.
The framework of the foldable integral interpolating A/D converter that the present invention proposes is as shown in Figure 3, comprises resistance string generating circuit from reference voltage 20, packet type track and hold circuit 27, preparatory amplifying circuit 28, N level cascade folding interpolation electric circuit 22～24, comparator circuit 25 and coding circuit 26.Wherein:
(1) analog input signal is through packet type track and hold circuit 27 signal that is maintained.
(2) reference level of inhibit signal and reference voltage resistance string 20 generations is as the input signal of preparatory amplifying circuit 28; Amplifying circuit is output as the difference amplifying signal between inhibit signal and the reference level in advance; The output signal of amplifying circuit is the input signal of first order folding electric circuit 29 in advance; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
0Individual output signal directly becomes the input signal of comparator 25.
(3) input signal of first order folding electric circuit 29 is the output signal of preparatory amplifying circuit 28; The output signal of first order folding electric circuit is as the input signal of first order interpolating circuit 30; The output signal of the interpolating circuit of the first order is as the input signal of second level folding electric circuit 31; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
1Individual output signal directly becomes the input signal of comparator 25.
(4) input signal of second level folding electric circuit 31 is the output signal of first order interpolating circuit 30; The output signal of second level folding electric circuit 31 is as the input signal of second level interpolating circuit 32; The output signal of partial interpolating circuit 32 is as the input signal of third level folding electric circuit 33; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
2Individual output signal directly becomes the input signal of comparator 25.
(5) the rest may be inferred, and the output signal of N-1 level interpolating circuit is as the input signal of N level folding electric circuit 33, and is wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
N-1Individual output signal directly becomes the input signal of comparator 25.
The output signal of (6) N level folding electric circuits 33 is as the input signal of N level interpolating circuit 34, and the output signal of N level interpolating circuit 34 is connected to comparator 25.
(7) the output signal of comparator 25 obtains the binary system output code of analog to digital converter through behind the coding of coding circuit 26.
The packet type track and hold circuit 27 that the present invention proposes has fixing sampling and keeps electric capacity, has omitted the Voltag driving circuit 8 in the single tracking maintained switch simultaneously, greatly reduces system power dissipation, simultaneously N
P<<(N
P* X), abandoned the big defective of distributed tracking maintained switch area.
In the folded interpolating A/D converter that the present invention proposes, the packet type track and hold circuit adopts packet type to follow the tracks of maintained switch.The sub-switch that packet type is followed the tracks of maintained switch is N
PIndividual, N
PBe preparatory amplifying circuit group number.Preparatory amplifying circuit is divided into N
PGroup, N
PThe prerequisite of confirming is to guarantee that the input parasitic capacitance can be ignored the influence that keeps electric capacity in the scope that precision allows; Saved Voltag driving circuit 41; Reduced power consumption; Relatively the distributed tracking holding circuit adopts fixing maintenance electric capacity and less sub-switch simultaneously, is from power consumption area aspect or from the switch performance aspect very big raising to be arranged all.
Among the present invention, adopt the packet type track and hold circuit to be responsible for N
P* X preparatory amplifying circuit module, wherein each is followed the tracks of maintained switch and is responsible for X amplifying circuit in advance.
In the packet type track and hold circuit:
(1) each sub-track and hold circuit each has independently sampling maintenance electric capacity 66 C
Hi, i=1 ~ X;
(2) each sub-track and hold circuit is responsible for X amplifying circuit in advance, X>1;
(3) connected mode is the preparatory amplifying circuit positive input of first group of forward output termination of first group grid voltage bootstrapped switch, and its negative sense output termination N
PThe negative input of the preparatory amplifying circuit of group; N in like manner
PThe negative input of the preparatory amplifying circuit that the negative sense output termination of the grid voltage bootstrapped switch of group is first group;
The preparatory amplifying circuit positive input that the forward output termination of (4) second groups grid voltage bootstrapped switch is second group, and its negative sense output termination N
PThe negative input of-1 group preparatory amplifying circuit, in like manner N
PThe negative input of the preparatory amplifying circuit that the negative sense output termination of-1 group grid voltage bootstrapped switch is second group;
(5) the rest may be inferred, is directed to N
P/ 2 groups grid voltage bootstrapped switch then is not carry out interconnection.
Being characterized as of folded interpolating A/D converter of the present invention: analog input signal under identical clock phase respectively by N
PIndividual sub-switch with signal sampling to fixing maintenance electric capacity; The reference level that inhibit signal and reference voltage resistance string produce is as the input signal of preparatory amplifying circuit, and amplifying circuit is output as the difference amplifying signal between inhibit signal and the reference level in advance; The output signal of amplifying circuit selects a first order folding electric circuit signal path as its input signal through the inter-stage switch in advance, and some of them output signal directly becomes the input signal of comparator; The output signal of first order folding electric circuit is as the input signal of first order interpolating circuit; The output signal of first order interpolating circuit is as the input signal of second level folding electric circuit signal, and some of them output signal directly becomes the input signal of comparator; The output signal of second level folding electric circuit is as the input signal of second level interpolating circuit; The output signal of second level interpolating circuit is as the input signal of third level folding electric circuit, and some of them output signal directly becomes the input signal of comparator; The rest may be inferred, and the output signal of N-1 level interpolating circuit is as the input signal of N level folding electric circuit, and some of them output signal directly becomes the input signal of comparator; The output signal of N level folding electric circuit is as the input signal of N level interpolating circuit, and the output signal of N level interpolating circuit is as the input signal of comparator; The output signal of comparator obtains the binary system output code of analog to digital converter through behind the coding of coding circuit.
For N (N>1) level cascade folding electric circuit, the collapse factors of each grade folding electric circuit is F, and interpolation coefficient is F, and amplifying circuit has (N in advance
P* X), each grade folding amplifier number is that ((Np * X)/F), plugging in the amplifier number in each level is (N
P* X).
Suppose that packet type T/H number of switches is N
TH, amplifying circuit array number is N in advance
P, the quantification range ability with reality is reduced into original N like this
P/ N
THThis will reduce the linearity designing requirement of amplifying array in advance, and equivalence simultaneously keeps capacitor C to each T/H switch
HOn the parasitic capacitance C of preparatory amplification array input
PBe reduced to original N
P/ N
THThereby, guaranteed that switch in the T/H switch adopts the constant of RC constant, improve the high linearity design of following the tracks of maintained switch, omit in the traditional structure T/H switch and in advance the isolation between the amplifying circuit use voltage driver, reduced the power consumption of analog to digital converter.
Description of drawings
Fig. 1 is the Organization Chart that tradition adopts single track and hold circuit folded interpolating A/D converter.
Fig. 2 is the Organization Chart that tradition adopts distributed tracking holding circuit folded interpolating A/D converter.
Fig. 3 is for adopting the Organization Chart of the out of order analog to digital converter of packet type track and hold circuit and folded interpolating inter-stage switch.
Fig. 4 is single track and hold circuit equivalent model.
Fig. 5 is a distributed tracking holding circuit equivalent model.
Fig. 6 is preparatory input amplifier parasitic capacitance equivalent model.
Fig. 7 is packet type track and hold circuit and preparatory amplifying circuit connected mode.
Label among the figure: 1 is resistance string generating circuit from reference voltage in the folded interpolating A/D converter, and 2～5 is thin sub-quantizer in the folded interpolating A/D converter, and 6 is coding circuit in the folded interpolating A/D converter; 7～8 is the single track and hold circuit of driver with voltage in the folded interpolating A/D converter, and 9～10 is thick sub-quantizer in the folded interpolating A/D converter, and 11 is resistance string generating circuit from reference voltage in the folded interpolating A/D converter; 12 is that preparatory zero crossing produces circuit in the folded interpolating A/D converter, and 13 is distributed tracking holding circuit in the folded interpolating A/D converter, and 14～16 is thin sub-quantizer in the folded interpolating A/D converter; 17 is coding circuit in the folded interpolating A/D converter, and 18～19 is thick sub-quantizer in the folded interpolating A/D converter, and 20 is resistance string generating circuit from reference voltage in the folded interpolating A/D converter; 21,27～28 is packet type track and hold circuit in the folded interpolating A/D converter; 66 is independently to sample in the packet type track and hold circuit to keep electric capacity, and 22-24,29-34 are folded interpolating A/D converter cascade folding interpolation electric circuit, and 25 is comparator circuit in the folded interpolating A/D converter; 26 is coding circuit in the folded interpolating A/D converter; 35,36～40 is single track and hold circuit equivalent model, and 41 is Voltag driving circuit, and 42 is preparatory input amplifier parasitic capacitance; 43 are the analog signal input; 44 is that preparatory zero crossing produces circuit, and 49,45～48 is distributed tracking holding circuit equivalent model, and 50～55 is preparatory input amplifier parasitic capacitance equivalent model; 56～60,61 are packet type tracking maintained switch; 62 are that packet type follows the tracks of maintained switch and amplifying circuit annexation in advance, and 63～65 import preparatory amplifying circuit for difference, and 67 is independently to keep electric capacity in the packet type track and hold circuit.
Embodiment
Below in conjunction with accompanying drawing the packet type tracking maintained switch structure that the present invention proposes is elaborated.
Be directed to packet type and follow the tracks of the maintained switch circuit, as shown in Figure 7, suppose that preparatory amplifying circuit divides for N
PGroup; Include a grid voltage bootstrapped switch 61 in every group, independently sampling keeps electric capacity 67 and X the preparatory amplifying circuit 63 that difference is imported; This packet type is followed the tracks of and is kept in (T/H) circuit, and each is organized sub-switch and includes a fixing sampling maintenance electric capacity, offsets the corresponding influence of input amplifier parasitic capacitance in advance; Stable corresponding sampling gain, the linearity and the performance of raising track and hold circuit.Because with (N
P* X) individual preparatory amplifying circuit is divided into N
PGroup is given N respectively
PIndividual grid voltage bootstrapped switch 61 is handled, so each group equivalence is to keeping the variable parasitic capacitance on the electric capacity to be reduced to original (1/N
P), thereby the RC constant that has guaranteed sampling switch is approximately steady state value, has guaranteed corresponding sampling gain constant.Connected mode shown among Fig. 7 62 supposes that zero crossing is v1～v
(NP * X), when the forward end of input signal made that the pairing preparatory amplifying circuit input pipe of v1 is in the saturation region, the negative end of respective input signals can make v
(NP * X)Pairing preparatory amplifying circuit input pipe also is in the saturation region, yet the negative end of respective input signals makes the pairing preparatory amplifying circuit input pipe of v1 be in linear zone on the contrary; The same forward end when input signal makes v
(NP * X)When pairing preparatory amplifying circuit input pipe was in the saturation region, the negative end of respective input signals can make the pairing preparatory amplifying circuit input pipe of v1 also be in the saturation region, yet the negative end of respective input signals makes v
(NP * X)Pairing preparatory amplifying circuit input pipe is in linear zone on the contrary; The rest may be inferred; Connected mode shown in 62; Identical in order to guarantee the parasitic capacitance of seeing at the differential signal two ends; Therefore the connected mode that packet type is followed the tracks of maintained switch among the present invention is the preparatory amplifying circuit positive input of first group of forward output termination of first group grid voltage bootstrapped switch, and its negative sense output termination N
PThe negative input of the preparatory amplifying circuit of group, in like manner N
PThe negative input of the preparatory amplifying circuit that the negative sense output termination of the grid voltage bootstrapped switch of group is first group; The preparatory amplifying circuit positive input that the forward output termination of second group grid voltage bootstrapped switch is second group, and its negative sense output termination N
PThe negative input of-1 group preparatory amplifying circuit, in like manner N
PThe negative input of the preparatory amplifying circuit that the negative sense output termination of-1 group grid voltage bootstrapped switch is second group; The rest may be inferred.Be directed to (N
P/ 2) the grid voltage bootstrapped switch of group then is not carry out interconnection.
The framework of the foldable integral interpolating A/D converter that the present invention proposes is as shown in Figure 3, and framework comprises resistance string generating circuit from reference voltage 20, packet type track and hold circuit 27, preparatory amplifying circuit 28, N level cascade folding interpolation electric circuit 22～24, comparator circuit 25 and coding circuit 26.Wherein:
(1) analog input signal is through packet type track and hold circuit 27 signal that is maintained.
(2) reference level of inhibit signal and reference voltage resistance string 20 generations is as the input signal of preparatory amplifying circuit 28; Amplifying circuit is output as the difference amplifying signal between inhibit signal and the reference level in advance; The output signal of amplifying circuit is the input signal of first order folding electric circuit 29 in advance; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
0Individual output signal directly becomes the input signal of comparator 25.
(3) input signal of first order folding electric circuit 29 is the output signal of preparatory amplifying circuit 28; The output signal of first order folding electric circuit is as the input signal of first order interpolating circuit 30; The output signal of the interpolating circuit of the first order is as the input signal of second level folding electric circuit 31; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
1Individual output signal directly becomes the input signal of comparator 25.
(4) input signal of second level folding electric circuit 31 is the output signal of first order interpolating circuit 30; The output signal of second level folding electric circuit 31 is as the input signal of second level interpolating circuit 32; The output signal of partial interpolating circuit 32 is as the input signal of third level folding electric circuit 33; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
2Individual output signal directly becomes the input signal of comparator 25.
(5) the rest may be inferred, and the output signal of N-1 level interpolating circuit is as the input signal of N level folding electric circuit 33, and is wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator 25, QC altogether
N-1Individual output signal directly becomes the input signal of comparator 25.
The output signal of (6) N level folding electric circuits 33 is as the input signal of N level interpolating circuit 34, and the output signal of N level interpolating circuit 34 is connected to comparator 25.
(7) the output signal of comparator 25 obtains the binary system output code of analog to digital converter through behind the coding of coding circuit 26.
The packet type track and hold circuit that the present invention proposes has fixing sampling and keeps electric capacity, has omitted the Voltag driving circuit 8 in the single tracking maintained switch simultaneously, greatly reduces system power dissipation, simultaneously N
P<<(N
P* X), abandoned the big defective of distributed tracking maintained switch area.
In addition those skilled in the art can be according to the present invention in the block switch theory adopt the switch distortion of other similar type; Be applied to folded interpolating A/D converter; If therefore of the present invention these are revised with modification belong within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (3)
1. a Low-voltage Low-power folded interpolating A/D converter that adopts the packet type track and hold circuit is characterized in that being formed by connecting resistance string generating circuit from reference voltage (20), packet type track and hold circuit (27), preparatory amplifying circuit (28), N level cascade folding interpolation electric circuit (22～24), comparator (25) and coding circuit (26); Wherein:
(1) analog input signal is through packet type track and hold circuit (27) signal that is maintained;
(2) reference level of inhibit signal and resistance string generating circuit from reference voltage (20) generation is as the input signal of preparatory amplifying circuit (28); Amplifying circuit (28) is output as the difference amplifying signal between inhibit signal and the reference level in advance; The output signal of amplifying circuit (28) is the input signal of first order folding electric circuit (29) in advance; Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator (25), QC altogether
0Individual output signal directly becomes the input signal of comparator (25); QC
0Number for the output signal;
(3) input signal of first order folding electric circuit (29) is the output signal of preparatory amplifying circuit (28); The output signal of first order folding electric circuit is as the input signal of first order interpolating circuit (30), and the output signal of the interpolating circuit of the first order is as the input signal of second level folding electric circuit (31); Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator (25), QC altogether
1Individual output signal directly becomes the input signal of comparator (25); QC
1Number for the output signal;
(4) input signal of second level folding electric circuit (31) is the output signal of first order interpolating circuit (30); The output signal of second level folding electric circuit (31) is as the input signal of second level interpolating circuit (32), and the output signal of partial interpolating circuit (32) is as the input signal of third level folding electric circuit (33); Wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator (25), QC altogether
2Individual output signal directly becomes the input signal of comparator (25); QC
2Number for the output signal;
(5) the rest may be inferred, and the output signal of N-1 level interpolating circuit is as the input signal of N level folding electric circuit (33), and is wherein, every at a distance from ((N
P* X)/F)-1 an output is got an output and is connected to comparator (25), QC altogether
N-1Individual output signal directly becomes the input signal of comparator (25); QC
N-1Number for the output signal;
The output signal of (6) N level folding electric circuits (33) is as the input signal of N level interpolating circuit (34), and the output signal of N level interpolating circuit (34) is connected to comparator (25);
(7) behind the coding of the output signal of comparator (25) through coding circuit (26), obtain the binary system output code of analog to digital converter;
N is the progression of cascade folding electric circuit, N>1, F is the collapse factors of each grade folding electric circuit, N
PBe preparatory amplifying circuit group number, X is every group a preparatory amplifying circuit number, X>1; (Np * X)/F is each grade folding amplifier number, N
P* X plugs in the amplifier number in each level.
2. folded interpolating A/D converter according to claim 1 is characterized in that adopting the packet type track and hold circuit to be responsible for N
P* X preparatory amplifying circuit, wherein each track and hold circuit is responsible for X amplifying circuit in advance.
3. folded interpolating A/D converter according to claim 1 is characterized in that in the packet type track and hold circuit:
(1) each sub-track and hold circuit each has independently sampling maintenance capacitor C
Hi(66), the i value is 1 to X;
(2) each sub-track and hold circuit is responsible for X amplifying circuit in advance, X>1;
(3) connected mode is the preparatory amplifying circuit positive input of first group of forward output termination of first group grid voltage bootstrapped switch, and its negative sense output termination N
PThe negative input of the preparatory amplifying circuit of group; N in like manner
PThe negative input of the preparatory amplifying circuit that the negative sense output termination of the grid voltage bootstrapped switch of group is first group;
The preparatory amplifying circuit positive input that the forward output termination of (4) second groups grid voltage bootstrapped switch is second group, and its negative sense output termination N
PThe negative input of-1 group preparatory amplifying circuit, in like manner N
PThe negative input of the preparatory amplifying circuit that the negative sense output termination of-1 group grid voltage bootstrapped switch is second group;
(5) the rest may be inferred, is directed to N
P/ 2 groups grid voltage bootstrapped switch then is not carry out interconnection.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010105571129A CN102006072B (en) | 2010-11-24 | 2010-11-24 | Low-voltage and low-consumption folding and interpolating analog/digital (A/D) converter adopting grouping type T/H switch |
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|---|---|---|---|
| CN2010105571129A CN102006072B (en) | 2010-11-24 | 2010-11-24 | Low-voltage and low-consumption folding and interpolating analog/digital (A/D) converter adopting grouping type T/H switch |
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| CN102006072B true CN102006072B (en) | 2012-06-13 |
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| CN101980447B (en) * | 2010-11-29 | 2012-08-01 | 复旦大学 | High SFDR folding interpolation analog-to-digital converter |
| US8674863B2 (en) * | 2011-06-07 | 2014-03-18 | Microchip Technology Incorporated | Distributed bootstrap switch |
| EP2963811B1 (en) * | 2014-06-30 | 2018-11-14 | Nxp B.V. | Driver for switched capacitor circuits |
| CN106656184B (en) * | 2016-12-26 | 2020-05-19 | 中国科学院微电子研究所 | Folding interpolation type analog-digital converter with folding rate of 3 and error correction method thereof |
| CN108880545B (en) * | 2018-07-06 | 2022-05-13 | 北京时代民芯科技有限公司 | Offset foreground calibration circuit and method for comparator of pipeline analog-to-digital converter |
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