CN101984505A - Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist - Google Patents
Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist Download PDFInfo
- Publication number
- CN101984505A CN101984505A CN 201010121368 CN201010121368A CN101984505A CN 101984505 A CN101984505 A CN 101984505A CN 201010121368 CN201010121368 CN 201010121368 CN 201010121368 A CN201010121368 A CN 201010121368A CN 101984505 A CN101984505 A CN 101984505A
- Authority
- CN
- China
- Prior art keywords
- cathode
- layer
- negative photoresist
- substrate
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention relates to a method for manufacturing a bottom-bar type FED (field emission display) lower board graph by negative photoresist, comprising the following steps: 1) preparing photosilver slurry; 2) manufacturing a grid layer (5) graph on a cleaned cathode glass substrate (4) by photolithography; 3) manufacturing an insulation material graph on the grid layer (5), and sintering to obtain a cathode resistive layer (6); 4) manufacturing a cathode layer (7) graph by the photosilver slurry by photolithography; 5) filling one layer of negative photoresist (p), and carrying out exposure and development under an ultraviolet lamp after dried to obtain a cathode line gap filling graph p; (6) manufacturing a cathode emitter (8) by electrophoresis, printing and photoetching; and 7) removing photoresist (p) to obtain the integral bottom-bar type FED lower substrate structure. The substrate structure obtained by the method causes the surface of the grid electrode to thoroughly insolate from the surface of the cathode and the problem of grid electrode and cathode surface short circuit is solved.
Description
Technical field
The present invention relates to the technical field that Field Emission Display is made, be specifically related to a kind of Field Emission Display (Field Emission Display; FED) manufacture method of the FED lower plate figure of grid layer, dielectric layer, cathode pattern and protection gate surface making emitter.
Background technology
Field Emission Display among the present invention is to bombard fluorescent material on the screen by the emitter ejected electron on electric field spontaneous emission negative electrode (cathode emitter) material, thereby activated phosphor is luminous.Be characterized in light, thin, brightness is high, the visual angle is wide, reaction is fast.
Consulting shown in Figure 1ly, is prior art Field Emission Display modular construction schematic diagram.The Field Emission Display of bottom gate type, its structure comprises anode and negative electrode at least, is provided with separaant 9 between this anode and the negative electrode, so that the interval of vacuum area between anode and the negative electrode to be provided, and as the support between the upper and lower base plate.
As shown in Figure 1, this anode comprises an anode glass substrate 1 and anode conductive layer 2 and a fluorescent powder coating 3 at least; And this negative electrode comprises a cathode glass substrate 4, grid layer 5, cathodic electricity resistance layer 6, cathode layer 7 and cathode emitter 8 (being carbon nano-tube CNT) at least; Wherein this anode and negative electrode are to keep vacuum area by separaant 9, and by the electric field that has a voltage difference to form between grid and the negative electrode, make the emitter 8 on the negative electrode disengage electronics, make it the impact fluorescence powder through the high voltage electric field accelerated electron between anode and the negative electrode again and luminous.
When existing FED lower plate is made cathode emitter 8 (carbon nano-tube CNT), 4,5,6,7 figures have been made and have been finished in the lower plate, generally adopt electrical methods such as electrophoresis, plating to make the method that cathode emitter 8 (carbon nano-tube CNT) or print process, photoetching process etc. are directly made emitter.In these methods, because lower plate grid layer 5 surfaces expose, when making cathode emitter 8 (carbon nano-tube CNT), be difficult to avoid cathode emitter 8 (carbon nano-tube CNT) accumulation (as Fig. 2) of on grid layer 5 surfaces, being scattered, occur the situation of cathode layer 7 and grid layer 5 short circuits when three electrodes add voltage after encapsulation.
Summary of the invention
In order to overcome above-mentioned deficiency, the invention provides a kind of method of utilizing negative photoresist to make bottom-gate FED lower plate graphics, the method by before making emitter gate surface being protected makes gate surface thoroughly be insulated with cathode surface; And will attach in the carbon nano-tube on photoresist surface and remove in the lump, thoroughly solve the grid and the cathode surface problem of short-circuit that cause easily when emitter is made with photoresist.
The objective of the invention is to be achieved through the following technical solutions, a kind of method of utilizing negative photoresist to make bottom-gate FED lower plate graphics is characterized in that this method realizes by following steps:
1) preparation photosensitive silver slurry;
2) on the cathode glass substrate after the clean, adopt photosensitive silver slurry making grid layer figure in the step 1) by photoetching process;
3) on the grid layer figure of making, one or more layers insulating barrier figure is made in printing, and at 530～590 ℃, sintering 20～30min obtains the cathodic electricity resistance layer;
4) on above-mentioned cathodic electricity resistance layer, adopt the photosensitive silver slurry to make one deck cathode layer figure by photoetching process;
5) in above-mentioned steps 4) fill one deck photoresist p on the substrate finished,
When adopting negative photoresist to fill the negative electrode gap, directly use the through printing forme of respective graphical to print to the substrate with print process after, in 90～130 ℃ of drying 10～30min;
6) make cathode emitter, adopt electrophoresis, printing, photoetching method to make cathode emitter;
7) remove photoresist p;
Filler is a negative photoresist, directly uses 0.2～1% Na
2CO
3Developing liquid developing 10～200s removes;
Can obtain complete bottom gate type FED lower substrate structure.
Described photosensitive silver slurry is prepared from by following materials based on weight:
Silver monomer 50～80;
Methacrylic resin 10～30;
Light trigger 1～5;
2,2,4-trimethyl-1,3 pentanediol list isobutyl 5～15;
Macromolecule dispersing agent 0.5～1.
The preparation method of described photosensitive silver slurry is: with step 2) silver-colored monomer, methacrylic resin, light trigger, the macromolecule dispersing agent mixed grinding of described parts by weight be even.
Negative photoresist is filled in described cathode pattern gap, and this negative photoresist is mixed formulated by following materials based on weight:
Methacrylic resin 80～90;
Light trigger 1～5;
2,2,4-trimethyl-1,3 pentanediol mono isobutyrate 5～15;
Macromolecule dispersing agent 0.5～1.
Described light trigger is 2,4,6-trimethylbenzoyl phenyl-phosphonic acid ethyl ester or 2-methyl isophthalic acid-[4-methyl mercapto phenyl]-2-morpholinyl-1-acetone.
Described macromolecule dispersing agent is a high-molecular block copolymer; Be specially BYK410, BYK140, BYK2025, BYK180 or BYK171.
Described making step 2) gate patterns or making step 4) cathode pattern comprises the steps:
A) on the cathode glass substrate after the clean, by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
B) place baking oven to toast substrate in the step a), baking temperature is that 80～120 ℃, stoving time are 10～40min, natural cooling then;
C) adopt the mask of required grid layer or cathode layer figure to do mask, the substrate behind the above-mentioned mask is placed exposure under the uviol lamp, exposure is 100～800mJ/cm
2
D) substrate of above-mentioned exposure employing mass percent concentration is 0.2～1% Na
2CO
3Solution develops, and development pressure is 1.5kgf/cm
2, developing time is 10～50S, obtains required grid layer or cathode layer figure;
E) with grid after the above-mentioned processing or cathode pattern sintering: be incubated 10～30min down at 500～590 ℃.
The invention has the beneficial effects as follows, by making cathode emitter 8 is coating one deck photoresist P (as Fig. 3) between the negative electrode gap before on grid layer 5 surfaces, avoid cathode emitter 8 (being carbon nano-tube) directly to contact grid layer 5 surfaces, after a negative electrode beam 8 completes (as Fig. 4), when grid layer 5 photomask surface glue p being removed with developer solution, the carbon nano-tube that its surface may occur is also removed simultaneously, and greatly degree has reduced the deposition of carbon nano-tube on grid layer 5 surfaces.
Bottom-gate FED lower plate structure by the above-mentioned steps making; by the method for before making emitter, gate surface being protected; make gate surface thoroughly insulate with cathode surface; after removing photoresist; attach in the carbon nano-tube on photoresist surface and also remove thereupon, thoroughly solved the grid layer 7 and the cathode layer 5 surperficial problem of short-circuit that cause easily when emitter is made.
Description of drawings
Fig. 1 is a Field Emission Display modular construction schematic diagram;
Fig. 2 causes short circuit schematic diagram between the negative electrode grid easily for not adopting the gate protection method directly to make emitter;
Fig. 3 is for making one deck gate surface protective layer schematic diagram before making cathode emitter described in the present invention;
Fig. 4 makes the emitter schematic diagram after adopting the present invention to make the gate surface protective layer.
Wherein: 1, anode glass substrate; 2, anode conductive layer; 3, fluorescent powder coating; 4, cathode glass substrate; 5, grid layer; 6, cathodic electricity resistance layer; 7, cathode layer; 8, cathode emitter; 9, separaant; P, photoresist.
Embodiment
The present invention will be further described below in conjunction with specific embodiment.Need to prove, below provide preferred embodiment and only be used for the present invention is described in detail, but be not to be used to limit practical range of the present invention that every parameter in the technical solution of the present invention scope selects all to belong to the scope of protection of the invention.
Embodiment 1
1) preparation photosensitive silver slurry:
This photosensitive silver slurry is by the silver-colored monomer of 60 weight portions, the methacrylic resin of 30 weight portions, the light trigger 2 of 4 weight portions, 4,2 of 6-trimethylbenzoyl phenyl-phosphonic acid ethyl ester, 5 weight portions, 2, the macromolecule dispersing agent BYK410 mixed grinding of 4-trimethyl-1,3 pentanediol mono isobutyrate and 1 weight portion evenly constitutes;
2) on the cathode glass substrate after the clean 4, adopt above-mentioned steps 1 by photoetching process) described in the photosensitive silver slurry make the figure of grid layer 5;
The step of making grid layer 5 figures specifically comprises:
A). on the cathode glass substrate 4 after the clean, the photosensitive silver slurry in printing one deck step 1), preparation silver electrode layer;
B). place baking oven to toast substrate in the step a), baking temperature is that 95 ℃, stoving time are 30min, natural cooling then;
C). the mask by required grid layer 5 figures is done mask, and the above-mentioned substrate of doing behind the mask is placed exposure under the uviol lamp, and exposure is 800mJ/cm
2
D). the substrate employing mass percent concentration of above-mentioned exposure is 0.4% Na
2CO
3Solution develops, and development pressure is 1.5kgf/cm
2, developing time is 20S, obtains required grid layer 5 figures;
E). with the sintering in sintering furnace of the substrate after the above-mentioned processing, be incubated 30min down at 500 ℃;
3) on grid layer 5 figures of making, the two layers of insulation material figure is made in printing, and at 570 ℃ of insulation 20min sintering, as cathodic electricity resistance layer 6;
4) on the substrate that step 3) is finished, adopt the described photosensitive silver slurry of step 1) to make one deck cathode layer 7 figures, its making step and parameter synchronization rapid 2) by photoetching process;
5) on the substrate that step 4) is finished, fill one deck negative photoresist p (as shown in Figure 3);
Negative photoresist is by the methacrylic resin of 80 weight portions, the light trigger 2 of 4 weight portions, 4,2 of 6-trimethylbenzoyl phenyl-phosphonic acid ethyl ester, 15 weight portions, 2,4-trimethyl-1, the macromolecule dispersing agent BYK410 of 3 pentanediol mono isobutyrates and 1 weight portion mixes formulated, adopt corresponding through printing forme graphic printing to make the negative photoresist pattern, then this negative photoresist is filled, printed the back and adopt 90 ℃ of baking 20min, can obtain filling in the cathode layer 7 lines gaps lower plate figure of photoresist p;
6) making cathode emitter 8 (is carbon nano-tube, as shown in Figure 4): adopt methods such as electrophoresis, printing, photoetching to make cathode emitter 8;
7) on the substrate that step 6) is finished, remove photoresist p, directly use 0.2% Na
2CO
3Developer solution solution development 200s removes;
Can obtain complete bottom gate type FED lower substrate structure.
In the present embodiment step 5),, can avoid cathode emitter 8 (being carbon nano-tube) directly to contact grid layer 5 surfaces in the mode of cathode layer 7 inter-pattern spaces filling one deck photoresist.
In the present embodiment step 6), when with developer solution grid layer 5 photomask surface glue p being removed, the carbon nano-tube that its surface may occur is also removed simultaneously, and greatly degree has reduced the deposition of carbon nano-tube on grid layer 5 surfaces.
The bottom-gate FED lower plate structure that the present invention is made by above-mentioned steps; by the method for before making emitter, gate surface being protected; make gate surface thoroughly insulate with cathode surface; after removing photoresist; attach in the carbon nano-tube on photoresist surface and also remove thereupon, thoroughly solved the grid layer 7 and the cathode layer 5 surperficial problem of short-circuit that cause easily when emitter is made.
Embodiment 2
1) preparation photosensitive silver slurry:
This photosensitive silver is starched by 2 of light trigger 2-methyl isophthalic acid-[4-methyl mercapto the phenyl]-2-morpholinyl-1-acetone of the methacrylic resin of the silver-colored monomer of 80 weight portions, 10 weight portions, 1 weight portion, 8.5 weight portions, 2, the macromolecule dispersing agent BYK180 of 4-trimethyl-1,3 pentanediol mono isobutyrate and 0.5 weight portion forms;
2) on the cathode glass substrate after the clean 4, adopt above-mentioned steps 1 by photoetching process) described in the photosensitive silver slurry make the figure of grid layer 5;
Make the step 2 of grid layer 5 figures) specifically comprise:
A). on the cathode glass substrate 4 after the clean, the photosensitive silver slurry in printing one deck step 1), preparation silver electrode layer;
B). place baking oven to toast substrate in the step a), baking temperature is that 80 ℃, stoving time are 40min, natural cooling then;
C) adopt the mask of required grid layer 5 figures to do mask, the above-mentioned substrate of doing behind the mask is placed uviol lamp under expose, exposure is 500mJ/cm
2
D). the substrate employing mass percent concentration of above-mentioned exposure is 0.2% Na
2CO
3Solution develops, and development pressure is 1.5kgf/cm
2, developing time is 50S, obtains required grid layer 5 figures;
E). with the sintering in sintering furnace of the substrate after the above-mentioned processing, be incubated 10min down at 590 ℃;
3) on grid layer 5 figures of making, three-layer insulated material figure is made in printing and at 590 ℃ of insulation 30min, sintering is as cathodic electricity resistance layer 6;
4) on the substrate that step 3) is finished, adopt the described photosensitive silver slurry of step 1) to make one deck cathode layer 7 figures, its making step and parameter synchronization rapid 2) by photoetching process;
5) on the substrate that step 4) is finished, fill one deck photoresist p (as shown in Figure 3);
Negative photoresist is by the methacrylic resin of 90 weight portions, the light trigger 2-methyl isophthalic acid of 1 weight portion-[4-methyl mercapto phenyl]-2-morpholinyl-1-acetone, 8.5 2 of weight portion, 2,4-trimethyl-1, the macromolecule dispersing agent BYK140 of 3 pentanediol mono isobutyrates and 0.5 weight portion mixes formulated, adopt the respective graphical through printing forme that negative photoresist directly is printed on the described substrate of step 4) and make pattern filling, then this negative photoresist is filled, 130 ℃ of baking 10min are adopted in the printing back, can obtain filling in the cathode layer 7 lines gaps lower plate figure of photoresist p;
6) making cathode emitter 8 (is carbon nano-tube, as shown in Figure 4): adopt methods such as electrophoresis, printing, photoetching to make cathode emitter;
7) on the substrate that step 6) is finished, remove photoresist p; Directly with 0.3% Na
2CO
3Developer solution solution development 120s removes;
Can obtain complete bottom gate type FED lower substrate structure.
1) preparation photosensitive silver slurry:
This photosensitive silver slurry is by the silver-colored monomer of 50 weight portions, the methacrylic resin of 29 weight portions, the light trigger 2 of 5 weight portions, 4,2 of 6-trimethylbenzoyl phenyl-phosphonic acid ethyl ester, 15 weight portions, 2, the macromolecule dispersing agent BYK410 of 4-trimethyl-1,3 pentanediol mono isobutyrate and 1 weight portion mixes formation;
2) on the cathode glass substrate after the clean 4, adopt above-mentioned steps 1 by photoetching process) described in the photosensitive silver slurry make grid layer 5 figures;
The step of making grid layer 5 figures specifically comprises:
A). on the cathode glass substrate 4 after the clean, the photosensitive silver slurry in printing one deck step 1), preparation silver electrode layer;
B). place baking oven to toast substrate in the step a), baking temperature is that 120 ℃, stoving time are 10min, natural cooling then;
C). adopt the mask of required grid layer 5 figures to do mask, the above-mentioned substrate of doing behind the mask is placed exposure under the uviol lamp, exposure is 100mJ/cm
2
D). the substrate employing mass percent concentration of above-mentioned exposure is 1% Na
2CO
3Solution develops, and development pressure is 1.5kgf/cm
2, developing time is 10S, obtains required grid layer 5 figures;
E). with the sintering in sintering furnace of the substrate after the above-mentioned processing, be incubated 20min down at 550 ℃;
3) on grid layer 5 figures of making, printing is made one deck insulating material figure and is incubated the 25min sintering as cathodic electricity resistance layer 6 at 530 ℃;
4) on the substrate that step 3) is finished, adopt the described photosensitive silver slurry of step 1) to make one deck cathode layer 7 figures, its making step and parameter synchronization rapid 2) by photoetching process;
5) on the substrate that step 4) is finished, fill one deck photoresist p (as shown in Figure 3);
Negative photoresist is by the methacrylic resin of 86 weight portions, the light trigger 2 of 5 weight portions, 4,6 (trimethylbenzoyl) phosphinic acid ethyl ester, 8.2 2 of weight portion, 2,4-trimethyl-1, the macromolecule dispersing agent BYK2025 of 3 pentanediol mono isobutyrates and 0.8 weight portion mixes formulated, adopt the respective graphical through printing forme that negative photoresist directly is printed on the described substrate of step 4) and make pattern filling, then this negative photoresist is filled, 100 ℃ of baking 30min are adopted in the printing back, can obtain filling in the cathode layer 7 lines gaps lower plate figure of photoresist p;
6) making cathode emitter 8 (is carbon nano-tube, as shown in Figure 4): adopt methods such as electrophoresis, printing, photoetching to make cathode emitter;
7) on the substrate that step 6) is finished, remove photoresist p; Directly with 0.4% Na
2CO
3Developer solution solution development 30s removes;
Can obtain complete bottom gate type FED lower substrate structure.
Embodiment 4
1) preparation photosensitive silver slurry:
This photosensitive silver is starched by 2 of light trigger 2-methyl isophthalic acid-[4-methyl mercapto the phenyl]-2-morpholinyl-1-acetone of the methacrylic resin of the silver-colored monomer of 60 weight portions, 30 weight portions, 4 weight portions, 5 weight portions, 2, the macromolecule dispersing agent BYK410 mixed grinding of 4-trimethyl-1,3 pentanediol mono isobutyrate and 1 weight portion evenly constitutes;
Above-mentioned macromolecule dispersing agent or employing BYK180 or BYK171.
2) on the cathode glass substrate after the clean 4, adopt above-mentioned steps 1 by photoetching process) described in the photosensitive silver slurry make grid layer 5 figures;
The step of making gate patterns 5 specifically comprises:
A). on the cathode glass substrate 4 after the clean, the photosensitive silver slurry in printing one deck step 1), preparation silver electrode layer;
B). place baking oven to toast substrate in the step a), baking temperature is that 120 ℃, stoving time are 10min, natural cooling then;
C). adopt the mask of required grid layer 5 figures to do mask, the above-mentioned substrate of doing behind the mask is placed exposure under the uviol lamp, exposure is 100mJ/cm
2
D). the substrate employing mass percent concentration of above-mentioned exposure is 0.2% Na
2CO
3Solution develops, and development pressure is 1.5kgf/cm
2, developing time is 10S, obtains required grid layer 5 figures;
E). with the sintering in sintering furnace of the substrate after the above-mentioned processing, be incubated 30min down at 530 ℃;
3) on grid layer 5 figures of making, printing is made the two layers of insulation material figure and is incubated 20 sintering as cathodic electricity resistance layer 6 at 570 ℃;
4) on the substrate that step 3) is finished, adopt the described photosensitive silver slurry of step 1) to make one deck cathode layer 7 figures, its making step parameter synchronization rapid 2) by photoetching process;
5) on the substrate that step 4) is finished, fill one deck photoresist p (as shown in Figure 3);
Wherein, negative photoresist is by the methacrylic resin of 89 weight portions, the light trigger 2 of 5 weight portions, 4,6 (trimethylbenzoyl) phosphinic acid ethyl ester, 2 of 5 weight portions, 2,4-trimethyl-1, the macromolecule dispersing agent BYK180 of 3 pentanediol mono isobutyrates and 1 weight portion mixes formulated, adopt the respective graphical through printing forme that negative photoresist directly is printed on the described substrate of step 4) and make pattern filling, then this negative photoresist is filled, 90 ℃ of baking 20min are adopted in the printing back, can obtain filling in the cathode layer 7 lines gaps lower plate figure of photoresist p;
6) making cathode emitter 8 (is carbon nano-tube, as shown in Figure 4): adopt methods such as electrophoresis, printing, photoetching to make cathode emitter;
7) on the substrate that step 6) is finished, remove photoresist p; Directly with 1% Na
2CO
3Developer solution solution development 10s removes;
Can obtain complete bottom gate type FED lower substrate structure.
Claims (6)
1. method of utilizing negative photoresist to make bottom-gate FED lower plate graphics is characterized in that this method realizes by following steps:
1) preparation photosensitive silver slurry; Silver-colored monomer, methacrylic resin, light trigger, the macromolecule dispersing agent mixed grinding of parts by weight is even;
2) on the cathode glass substrate after the clean (4), adopt the figure of photosensitive silver slurry making grid layer (5) in the step 1) by photoetching process;
3) on the grid layer of making (5), one or more layers insulating barrier figure is made in printing, and at 530～590 ℃, sintering 20～30min obtains cathodic electricity resistance layer (6);
4) go up the figure that adopts photosensitive silver slurry making one deck cathode layer (7) by photoetching process in above-mentioned cathodic electricity resistance layer (6);
5) in above-mentioned steps 4) fill one deck photoresist (p) on the substrate finished,
When adopting negative photoresist to fill the negative electrode gap, directly use the through printing forme of respective graphical to print to the substrate with print process after, in 90～130 ℃ of drying 10～30min;
6) make cathode emitter (8), promptly carbon nano-tube adopts electrophoresis, printing, photoetching method to make cathode emitter (8);
7) remove photoresist (p): filler is a negative photoresist, directly uses 0.2～1% Na
2CO
3Developing liquid developing 10～200s removes;
Can obtain complete bottom gate type FED lower substrate structure.
2. a kind of method of utilizing negative photoresist to make bottom-gate FED lower plate graphics according to claim 1 is characterized in that, described photosensitive silver slurry is prepared from by following materials based on weight:
Silver monomer 50～80;
Methacrylic resin 10～30;
Light trigger 1～5;
2,2,4-trimethyl-1,3 pentanediol mono isobutyrate 5～15;
Macromolecule dispersing agent 0.5～1.
3. a kind of method of utilizing negative photoresist to make bottom-gate FED lower plate graphics according to claim 1 is characterized in that, described filling negative photoresist, and this negative photoresist is mixed formulated by following materials based on weight:
Methacrylic resin 80～90;
Light trigger 1～5;
2,2,4-trimethyl-1,3 pentanediol mono isobutyrate 5～15;
Macromolecule dispersing agent 0.5～1.
4. according to claim 2 or 3 described a kind of methods of utilizing negative photoresist to make bottom-gate FED lower plate graphics; it is characterized in that; described light trigger is 2,4,6-trimethylbenzoyl phenyl-phosphonic acid ethyl ester or 2-methyl isophthalic acid-[4-methyl mercapto phenyl]-2-morpholinyl-1-acetone.
5. according to claim 2 or 3 described a kind of methods of utilizing negative photoresist to make bottom-gate FED lower plate graphics, it is characterized in that described macromolecule dispersing agent is a high-molecular block copolymer; Be specially BYK410, BYK140, BYK2025, BYK180 or BYK171.
6. a kind of method of utilizing negative photoresist to make bottom-gate FED lower plate graphics according to claim 1 is characterized in that, described making grid layer (5) figure or making cathode layer (7) figure comprise the steps:
A) on the cathode glass substrate after the clean (4), by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
B) place baking oven to toast substrate in the step a), baking temperature is that 80～120 ℃, stoving time are 10～40min, natural cooling then;
C) adopt the mask of required grid layer (5) or cathode layer (7) figure to do mask, the above-mentioned substrate of doing behind the mask is placed exposure under the uviol lamp, exposure is 100～800mJ/cm
2
D) substrate of above-mentioned exposure employing mass percent concentration is 0.2～1% Na
2CO
3Solution develops, and development pressure is 1.5kgf/cm
2, developing time is 10～50S, obtains required grid layer (5) or cathode layer (7) figure;
E) with grid after the above-mentioned processing or cathode pattern sintering: be incubated 10～30min down at 500～590 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101213685A CN101984505B (en) | 2010-03-10 | 2010-03-10 | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101213685A CN101984505B (en) | 2010-03-10 | 2010-03-10 | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101984505A true CN101984505A (en) | 2011-03-09 |
| CN101984505B CN101984505B (en) | 2012-05-23 |
Family
ID=43641675
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010101213685A Expired - Fee Related CN101984505B (en) | 2010-03-10 | 2010-03-10 | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101984505B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101794695A (en) * | 2010-03-10 | 2010-08-04 | 彩虹集团公司 | Production method of bottom-gate type FED lower substrate patterns |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1661753A (en) * | 2004-02-23 | 2005-08-31 | 东元奈米应材股份有限公司 | Method for forming totem of Nano carbon tubes |
| CN101515525A (en) * | 2009-03-24 | 2009-08-26 | 彩虹集团公司 | Manufacture method for bottom-gate FED lower plate graphics |
| CN101620969A (en) * | 2009-05-22 | 2010-01-06 | 彩虹集团公司 | Lower base plate for printed type field emission display (FED) and manufacturing method thereof |
-
2010
- 2010-03-10 CN CN2010101213685A patent/CN101984505B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1661753A (en) * | 2004-02-23 | 2005-08-31 | 东元奈米应材股份有限公司 | Method for forming totem of Nano carbon tubes |
| CN101515525A (en) * | 2009-03-24 | 2009-08-26 | 彩虹集团公司 | Manufacture method for bottom-gate FED lower plate graphics |
| CN101620969A (en) * | 2009-05-22 | 2010-01-06 | 彩虹集团公司 | Lower base plate for printed type field emission display (FED) and manufacturing method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101794695A (en) * | 2010-03-10 | 2010-08-04 | 彩虹集团公司 | Production method of bottom-gate type FED lower substrate patterns |
| CN101794695B (en) * | 2010-03-10 | 2012-07-04 | 彩虹集团公司 | Production method of bottom-gate type FED lower substrate patterns |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101984505B (en) | 2012-05-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101667515A (en) | Conductive paste agent and electrode using the conductive paste agent | |
| JP2012513624A (en) | Photosensitive paste and pattern production method using the same | |
| CN101984505B (en) | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist | |
| CN101794695B (en) | Production method of bottom-gate type FED lower substrate patterns | |
| CN101783273B (en) | Method for manufacturing bottom gate type FED lower plate pattern by adopting positive photoresist | |
| CN1932643A (en) | Photocuring composition and plasma display panel produced by using the same | |
| KR20080047769A (en) | Composition for preparing bus-electrode of plasma display panel, and plasma display panel comprising bus-electrode prepared from same | |
| CN101515525B (en) | Manufacture method for bottom-gate FED lower plate graphics | |
| JP4411940B2 (en) | Inorganic material paste, plasma display member and plasma display | |
| CN102881836A (en) | Cathode isolating device for organic light emitting device and manufacturing method for cathode isolating device | |
| KR100829704B1 (en) | Plasma display panel dielectric substance composition, plasma display panel and method of manufacturing comprising the same | |
| JP2009104949A (en) | Address electrode forming conductor paste and plasma display panel | |
| JP2005209637A (en) | Plasma display component and plasma display | |
| TW201042664A (en) | Photosensitive conductive paste, method for producing display using the same and display | |
| KR20140147409A (en) | Composition forming electrode, electrode fabricated using the same and plasma display panel comprising the same | |
| US20110198986A1 (en) | Plasma display panel and method for producing the same | |
| KR20130018619A (en) | Solvent for printing and paste composition | |
| CN101548355A (en) | Plasma display panel | |
| KR100698127B1 (en) | Method for Making Electrode of Plasma Display Panel | |
| JP2010135084A (en) | Plasma display panel, and manufacturing method thereof | |
| KR100833713B1 (en) | Display panel and the composites for electrode of display panel | |
| JP2009117360A (en) | Boron nitride nanotube paste composition, electron emitting source manufactured using the same, electron emitting element including the same, and backlight device and electron emitting display device applying the same | |
| KR101608120B1 (en) | Method for manufacturing electrode for display apparatus, electrode for display apparatus manufactured using the same and display apparatus comprising the same | |
| KR100877417B1 (en) | Black matrix, display apparatus including the black matrix and manufacturing method for the same | |
| US9005879B2 (en) | Method for manufacturing electrode for display apparatus, electrode for display apparatus manufactured using the same, and display apparatus including the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120523 Termination date: 20150310 |
|
| EXPY | Termination of patent right or utility model |