CN101515525A - Manufacture method for bottom-gate FED lower plate graphics - Google Patents
Manufacture method for bottom-gate FED lower plate graphics Download PDFInfo
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- CN101515525A CN101515525A CNA2009100216698A CN200910021669A CN101515525A CN 101515525 A CN101515525 A CN 101515525A CN A2009100216698 A CNA2009100216698 A CN A2009100216698A CN 200910021669 A CN200910021669 A CN 200910021669A CN 101515525 A CN101515525 A CN 101515525A
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Abstract
The invention discloses a manufacturing method for bottom-gate FED lower plate, a method is employed in which a photosensitive medium is not developed subsequent to printing and exposure, instead, a photosensitive cathode layer is directly printed and after the cathode is exposed, a cathode resistance layer and the cathode layer are developed simultaneously, therefore, the developing times are reduced, and as the medium layer is positioned above cathode graphics, excessive development of the medium layer is unlikely to be caused during developing, in the meantime, the requirement for alignment accuracy during exposure is lowered, so that the problem that short circuit often occurs quite between the gate and the cathode during manufacture of the bottom-gate FED lower plate is solved.
Description
(1) technical field:
The present invention relates to a kind of Field Emission Display (Field Emission Display; FED) manufacture method of lower plate grid layer, dielectric layer and cathode pattern.
(2) background technology:
Field Emission Display among the present invention is that the most advanced and sophisticated ejected electron by electric field spontaneous emission negative electrode (cathode emitter) material bombards the fluorescent material on the screen, thereby activated phosphor is luminous.Be characterized in light, thin, brightness is high, the visual angle is wide, reaction is fast.
Seeing also shown in Figure 1ly, is Field Emission Display modular construction schematic diagram.The Field Emission Display of bottom gate type, its structure comprises anode and negative electrode at least, is provided with separaant 4 between this anode and the negative electrode, so that the interval of vacuum area between anode and the negative electrode to be provided, and as the support between the upper and lower base plate.
As shown in Figure 1, this anode comprises an anode glass substrate 1 and anode conductive layer 2 and a fluorescent powder coating 3 at least; And this negative electrode comprises a cathode glass substrate 8, grid layer 7, cathodic electricity resistance layer 6 and cathode layer 5 at least; Wherein this anode and negative electrode are to keep vacuum area by separaant 4, and by the electric field that has a voltage difference to form between grid and the negative electrode, make negative electrode disengage electronics, make it the impact fluorescence powder through the high voltage electric field accelerated electron between anode and the negative electrode again and luminous.
Existing FED lower plate generally is to adopt grid, medium, negative electrode three layer patterns making is finished in exposure imaging or printing process successively.Because dielectric layer is positioned under the cathode layer, when making cathode pattern, medium and negative electrode contraposition inaccuracy can cause cathode pattern to cause negative electrode directly to contact with bottom grid with the dislocation of medium figure, thereby cause short circuit; Perhaps when the exposure imaging legal system is made medium and cathode pattern, when the development cathode pattern, cause the dielectric layer overdevelop to narrow down easily and be prone to the situation of negative electrode and gate short.
(3) summary of the invention:
In order to overcome above-mentioned deficiency, the invention provides a kind of manufacture method of bottom-gate FED lower plate graphics, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 50-80 weight portion, the polymethacrylate resin of 10-30 weight portion, the light trigger of 1-5 weight portion, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 5-15 weight portion and the macromolecule dispersing agent (as BYK410 or BYK140 or BYK2025 or BYK180 or BYK171) of 0.5-1 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate 8 by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate 8, baking temperature is that 90-120 ℃, stoving time are 20-30 minute, then natural cooling;
(4) by the mask of required grid layer 7 figures, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 600-1000mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 4-6m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer 7 figures;
(6) above 7 figures of the grid layer after development, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer 6;
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 90-100 ℃, stoving time are 20-30 minute, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer 6 figures, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 80mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer 5;
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 90-120 ℃, stoving time are 20-30 minute, then natural cooling;
(11) by the mask of required cathode layer 5 figures, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 600-1000mJ/cm2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5-6.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer 5 and the figure of cathodic electricity resistance layer 6 simultaneously.
Baking temperature in described step (3), step (7) and the step (10) is 90 ℃, 95 ℃, 105 ℃ or 120 ℃, and stoving time is 20 minutes, 25 minutes or 30 minutes.
Exposure in described step (4) and the step (11) is 600mJ/cm
2, 800mJ/cm
2Or 1000mJ/cm
2
Developing powder in described step (5) and the step (12) is 4m/min, 5m/min or 6m/min.
Macromolecule dispersing agent BYK is high-molecular block copolymer by German Bi Ke chemical company (BYK Chemie).Adopt common light trigger can realize purpose of the present invention, for example: 2,4,6 (trimethylbenzoyls), 2,4,6-trimethylbenzoyl phosphinic acid ethyl ester or 2-methyl isophthalic acid-[4-methyl mercapto phenyl]-2-morpholinyl-1-acetone or the like.
Do not develop after adopting light-sensitive medium layer print exposure, directly print the sensitization cathode layer, the method that cathodic electricity resistance layer 6 and cathode layer 5 develop simultaneously behind the exposure negative electrode, reduced the development number of times, and because dielectric layer side on cathode pattern, be difficult for causing the overdevelop of dielectric layer during development, when having reduced exposure simultaneously to the aligning accuracy requirement, problem of short-circuit easily between grid and negative electrode when having solved bottom-gate FED lower plate and making.
(4) description of drawings:
Fig. 1 is a Field Emission Display modular construction schematic diagram;
Wherein: 1 is that anode glass substrate, 2 is that anode conductive layer, 3 is that fluorescent powder coating, 4 is that separaant, 5 is that cathode layer, 6 is that cathodic electricity resistance layer, 7 is that grid layer, 8 is a cathode glass substrate.
(5) embodiment:
Embodiment 1:
Referring to Fig. 1, a kind of bottom-gate FED lower plate manufacture method is characterized in that, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 50 weight portions, the polymethacrylate resin of 10 weight portions, the light trigger of 1 weight portion, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 5 weight portions and the macromolecule dispersing agent BYK410 of 0.5 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate 8 by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate 8, baking temperature is that 95 ℃, stoving time are 30 minutes, then natural cooling;
(4) by the mask of required grid layer 7 figures, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 800mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer 7 figures;
(6) above 7 figures of the grid layer after development, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer 6;
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 95 ℃, stoving time are 30 minutes, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer 6 figures, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 80mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer 5;
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 95 ℃, stoving time are 30 minutes, then natural cooling;
(11) by the mask of required cathode layer 5 figures, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 800mJ/cm
2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer 5 and the figure of cathodic electricity resistance layer 6 simultaneously.
Embodiment 2:
Referring to Fig. 1, a kind of bottom-gate FED lower plate manufacture method is characterized in that, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 80 weight portions, the polymethacrylate resin of 30 weight portions, the light trigger of 5 weight portions, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 15 weight portions and the macromolecule dispersing agent BYK140 of 1 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate 8 by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate 8, baking temperature is that 105 ℃, stoving time are 30 minutes, then natural cooling;
(4) by the mask of required grid layer 7 figures, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 800mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer 7 figures;
(6) above 7 figures of the grid layer after development, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer 6;
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 95 ℃, stoving time are 25 minutes, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer 6 figures, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 100mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer 5;
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 95 ℃, stoving time are 30 minutes, then natural cooling;
(11) by the mask of required cathode layer 5 figures, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 800mJ/cm
2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer 5 and the figure of cathodic electricity resistance layer 6 simultaneously.
Embodiment 3:
Referring to Fig. 1, a kind of bottom-gate FED lower plate manufacture method, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 60 weight portions, the polymethacrylate resin of 20 weight portions, the light trigger of 3 weight portions, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 10 weight portions and the macromolecule dispersing agent BYK180 of 0.75 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate 8 by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate 8, baking temperature is that 95 ℃, stoving time are 30 minutes, then natural cooling;
(4) by the mask of required grid layer 7 figures, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 800mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer 7 figures;
(6) above 7 figures of the grid layer after development, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer 6;
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 95 ℃, stoving time are 30 minutes, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer 6 figures, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 80mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer 5;
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 95 ℃, stoving time are 30 minutes, then natural cooling;
(11) by the mask of required cathode layer 5 figures, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 800mJ/cm
2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer 5 and the figure of cathodic electricity resistance layer 6 simultaneously.
Embodiment 4:
Referring to Fig. 1, a kind of bottom-gate FED lower plate manufacture method, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 70 weight portions, the polymethacrylate resin of 15 weight portions, the light trigger of 2 weight portions, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 10 weight portions and the macromolecule dispersing agent BYK171 of 0.5 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate 8 by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate 8, baking temperature is that 120 ℃, stoving time are 20 minutes, then natural cooling;
(4) by the mask of required grid layer 7 figures, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 600mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer 7 figures;
(6) above 7 figures of the grid layer after development, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer 6;
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 100 ℃, stoving time are 25 minutes, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer 6 figures, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 100mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer 5;
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 95 ℃, stoving time are 30 minutes, then natural cooling;
(11) by the mask of required cathode layer 5 figures, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 800mJ/cm
2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer 5 and the figure of cathodic electricity resistance layer 6 simultaneously.
Embodiment 5:
Referring to Fig. 1, a kind of bottom-gate FED lower plate manufacture method, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 75 weight portions, the polymethacrylate resin of 25 weight portions, the light trigger of 3 weight portions, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 8 weight portions and the macromolecule dispersing agent BYK2025 of 0.5 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate 8 by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate 8, baking temperature is that 90 ℃, stoving time are 25 minutes, then natural cooling;
(4) by the mask of required grid layer 7 figures, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 1000mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 6m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer 7 figures;
(6) above 7 figures of the grid layer after development, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer 6;
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 95 ℃, stoving time are 30 minutes, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer 6 figures, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 100mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer 5;
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 120 ℃, stoving time are 30 minutes, then natural cooling;
(11) by the mask of required cathode layer 5 figures, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 800mJ/cm
2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer 5 and the figure of cathodic electricity resistance layer 6 simultaneously.
Above content is to further describing that the present invention did in conjunction with concrete preferred implementation; can not assert that the specific embodiment of the present invention only limits to this; for the general technical staff of the technical field of the invention; without departing from the inventive concept of the premise; can also make some simple deduction or replace, all should be considered as belonging to the present invention and determine scope of patent protection by claims of being submitted to.
Claims (7)
1, a kind of bottom-gate FED lower plate manufacture method is characterized in that, this method realizes by following steps:
(1) preparation photosensitive silver slurry: this photosensitive silver slurry is made up of the silver-colored monomer of 50-80 weight portion, the polymethacrylate resin of 10-30 weight portion, the light trigger of 1-5 weight portion, 2.2.4-trimethyl-1.3 pentanediol mono isobutyrate of 5-15 weight portion and the macromolecule dispersing agent BYK of 0.5-1 weight portion;
(2) on the plate glass substrate after the clean,, obtain cathode glass substrate (8) by printing one or more layers photosensitive silver slurry preparation silver electrode layer;
(3) place baking oven to toast cathode glass substrate (8), baking temperature is that 90-120 ℃, stoving time are 20-30 minute, then natural cooling;
(4) by the mask of required grid layer (7) figure, will place exposure under the uviol lamp through the substrate that handled step (3), exposure is 600-1000mJ/cm
2, obtain the substrate that exposes for the first time;
(5) will expose for the first time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 4-6m/min, and development pressure is 1.5kgf/cm
2, obtain required grid layer (7) figure;
(6) grid layer after development (7) is above the figure, by printing one or more layers photosensitive silver slurry preparation one deck cathodic electricity resistance layer (6);
(7) will toast to baking oven through the substrate that handled step (6), baking temperature is that 90-100 ℃, stoving time are 20-30 minute, then natural cooling;
(8) by the mask of required cathodic electricity resistance layer (6) figure, will place exposure under the uviol lamp through the substrate that handled step (7), exposure adopts 80mJ/cm
2, obtain the substrate that exposes for the second time;
(9) one or more layers photosensitive silver slurry of printing on the substrate that exposes for the second time obtains cathode layer (5);
(10) will place baking oven to toast through the substrate that handled step (9), baking temperature be that 90-120 ℃, stoving time are 20-30 minute, then natural cooling;
(11) by the mask of required cathode layer (5) figure, will place exposure under the uviol lamp through the substrate that handled step (10), exposure is 600-1000mJ/cm
2, substrate is for the third time exposed;
(12) will expose for the third time that to adopt mass percent concentration be 0.4% Na to substrate
2CO
3Solution develops, and developing powder is 5-6.5m/min, and development pressure is 1.5kgf/cm
2, obtain the figure of required cathode layer (5) and the figure of cathodic electricity resistance layer (6) simultaneously.
2, a kind of bottom-gate FED lower plate manufacture method according to claim 1, it is characterized in that: described macromolecule dispersing agent BYK is BYK410, BYK140, BYK2025, BYK180 or BYK171.
3, a kind of bottom-gate FED lower plate manufacture method according to claim 1 is characterized in that: the baking temperature in described step (3) and the step (10) is 90 ℃, 95 ℃, 105 ℃ or 120 ℃, and stoving time is 20 minutes, 25 minutes or 30 minutes.
4, a kind of bottom-gate FED lower plate manufacture method according to claim 1 is characterized in that: the exposure in described step (4) and the step (11) is 600mJ/cm
2, 800mJ/cm
2Or 1000mJ/cm
2
5, a kind of bottom-gate FED lower plate manufacture method according to claim 1 is characterized in that: the developing powder in described step (5) and the step (12) is 4m/min, 5m/min or 6m/min.
6, a kind of bottom-gate FED lower plate manufacture method according to claim 1, it is characterized in that: the exposure in the described step (8) is 80mJ/cm
2, 90mJ/cm
2Or 100mJ/cm
2
7, a kind of bottom-gate FED lower plate manufacture method according to claim 1 is characterized in that: the baking temperature in described rapid (7) step by step is 90 ℃, 95 ℃ or 100 ℃, and stoving time is 20 minutes, 25 minutes or 30 minutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100216698A CN101515525B (en) | 2009-03-24 | 2009-03-24 | Manufacture method for bottom-gate FED lower plate graphics |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100216698A CN101515525B (en) | 2009-03-24 | 2009-03-24 | Manufacture method for bottom-gate FED lower plate graphics |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101515525A true CN101515525A (en) | 2009-08-26 |
| CN101515525B CN101515525B (en) | 2010-09-08 |
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ID=41039927
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009100216698A Expired - Fee Related CN101515525B (en) | 2009-03-24 | 2009-03-24 | Manufacture method for bottom-gate FED lower plate graphics |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101984505A (en) * | 2010-03-10 | 2011-03-09 | 彩虹集团公司 | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist |
| CN104505152A (en) * | 2014-12-16 | 2015-04-08 | 安徽凤阳德诚科技有限公司 | Photosensitive conductive sliver paste |
-
2009
- 2009-03-24 CN CN2009100216698A patent/CN101515525B/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101984505A (en) * | 2010-03-10 | 2011-03-09 | 彩虹集团公司 | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist |
| CN101984505B (en) * | 2010-03-10 | 2012-05-23 | 彩虹集团公司 | Method for manufacturing bottom-bar type FED (field emission display) lower board graph by negative photoresist |
| CN104505152A (en) * | 2014-12-16 | 2015-04-08 | 安徽凤阳德诚科技有限公司 | Photosensitive conductive sliver paste |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101515525B (en) | 2010-09-08 |
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Granted publication date: 20100908 Termination date: 20140324 |