CN101866897B - 具有贯通电极的固体摄像器件 - Google Patents
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Abstract
固体摄像器件包括:摄像元件、外部端子、绝缘膜、贯通电极、以及第1电极。摄像元件,形成在半导体基板的第1主面上。外部端子,形成于上述半导体基板的与上述第1主面相对的第2主面上。绝缘膜,形成于开孔在上述半导体基板中的贯通孔内。贯通电极,形成在上述贯通孔内的上述绝缘膜上,与上述外部端子电连接。第1电极,形成于上述半导体基板的上述第1主面的上述贯通电极上。从与上述半导体基板的第1主面垂直的方向看时,上述绝缘膜和上述半导体基板相连接的外形比上述第1电极的外形大。
Description
本申请主张2009年4月16日提交的日本专利申请No.2009-100068的优先权利益,其整个内容以引用的方式包含于此。
技术领域
本发明涉及具有在半导体基板上形成的贯通电极的固体摄像器件,例如涉及摄像模块。
背景技术
伴随着电子设备的小型化,所装载的半导体器件也需要小型化、高集成化。在九十年代(1990年代)后半期,开始晶片级芯片规模封装体(WaferLevel Chip Scale Package)的实用化研究(例如,参照日经Micro Devices1998年4月号P28、P164、P176)。是在废除引线的倒装焊芯片方式中,将半导体芯片表面朝下,利用凸块使基板和半导体芯片接合的方法。
另一方面,从九十年代后半期还开始开发将多个半导体芯片三维层叠,可大幅地实现小型化的层叠型封装体(多芯片封装体),提出使用贯通电极的封装体(参照(日本)特开平10-223833号公报)。在2000年前后开始研究以光学元件进行晶片级CSP(芯片规模封装体)。
另外,在International Electron Devices Meeting 1999 TechnicalDigest(国际电子器件会议1999技术摘要)pp.879-882中,记载了摘自小柳他们的玻璃+粘接剂+摄像传感器+贯通电极的构造和实际制作的剖面照片。另外,同样地,在美国专利第6489675号说明书以及(日本)特开2007-53149号公报中,也揭示了具备贯通电极、透光性支持基板的光学元件的剖面构造。
但是,在全部这些文献中,所提出的贯通电极都形成在硅半导体基板内,因此由于贯通电极和硅半导体基板的耦合、或贯通电极周边的接地电阻高等而产生以下问题:由焊盘通过贯通电极供给的电源劣化,或者反过来,从硅半导体基板侧产生电源噪音,而不能形成所希望的良好电压波形。
发明内容
从第1侧面看本发明的固体摄像器件,其特征在于,包括:摄像元件,形成在半导体基板的第1主面上;外部端子,形成于上述半导体基板的与上述第1主面相对的第2主面上;绝缘膜,形成于开孔在上述半导体基板中的贯通孔内;贯通电极,形成在上述贯通孔内的上述绝缘膜上,与上述外部端子电连接;以及第1电极,形成于上述半导体基板的上述第1主面的上述贯通电极上。从与上述半导体基板的第1主面垂直的方向看时,上述绝缘膜和上述半导体基板相连接的外形比上述第1电极的外形大。
从第2侧面看本发明的固体摄像器件,其特征在于,包括:摄像元件,形成在半导体基板的第1主面上;外部端子,形成于上述半导体基板的与上述第1主面相对的第2主面上;贯通电极,形成于开孔在上述半导体基板中的贯通孔内,与上述外部端子电连接;第1电极,形成于上述半导体基板的上述第1主面的上述贯通电极上;半导体区域,以包围上述贯通电极的外周的至少一部分的方式,形成于上述半导体基板上;以及布线,形成在上述半导体区域上,与上述半导体区域电连接。对上述半导体区域,通过上述布线供给接地电位。
从第3侧面看本发明的摄像模块,其特征在于,包括:固体摄像器件;透光性基板,配置在上述固体摄像器件上;红外线截止滤光片,配置在上述透光性基板上;以及摄像透镜,配置在上述红外线截止滤光片上。其中,上述固体摄像器件,具有:摄像元件,形成在半导体基板的第1主面上;外部端子,形成于上述半导体基板的与上述第1主面相对的第2主面上;绝缘膜,形成于开孔在上述半导体基板中的贯通孔内;贯通电极,形成在上述贯通孔内的上述绝缘膜上,与上述外部端子电连接;以及第1电极,形成于上述半导体基板的上述第1主面的上述贯通电极上。从与上述半导体基板的第1主面垂直的方向看时,上述绝缘膜和上述半导体基板相连接的外形比上述第1电极的外形大。
附图说明
图1是示出本发明的第1实施方式的摄像模块的结构的剖面图。
图2是将第1实施方式的摄像模块中的硅半导体基板和玻璃基板部分放大后的剖面图。
图3是从焊盘开口部侧看图2中的周边电路部的图。
图4是示出第1实施方式的照相机中的贯通电极的制造方法的图。
图5是示出第1实施方式的照相机中的贯通电极的制造方法的图。
图6是示出本发明的第2实施方式的摄像模块的结构的剖面图。
图7是从焊盘开口部侧看图6中的周边电路部的图。
图8是示出本发明的第3实施方式的摄像模块的结构的剖面图。
图9是从焊盘开口部侧看图8中的周边电路部的图。
具体实施方式
以下,参照附图,对于本发明的实施方式进行说明。在此,作为固体摄像器件,采用摄像模块为例。说明时,在整个附图中,对于共有的部分赋予共有的参照符号。
(第1实施方式)
首先,对本发明的第1实施方式的摄像模块进行说明。
图1是示出第1实施方式的摄像模块的结构的剖面图。在形成了摄像元件(未图示)的硅半导体基板(摄像元件芯片)10的第1主面上,间隔着粘接剂11形成透光性支持基板,例如玻璃基板12。在玻璃基板12上,通过粘接剂13配置IR(红外线)截止滤光片14。进而,在IR截止滤光片(IR Cut Filter)14上,通过粘接剂15配置包含摄像透镜16的透镜支架17。
另外,在硅半导体基板10的、与第1主面相对的第2主面上,形成外部端子(电极),例如焊锡球18。在硅半导体基板10以及玻璃基板12的周围,配置遮光兼电磁屏蔽19。该遮光兼电磁屏蔽19通过粘接剂20与透镜支架17粘接。通过这样的构造形成摄像模块100。
摄像模块100通过焊锡球18直接安装(板上芯片封装COB:Chip OnBoard)在例如由树脂或陶瓷组成的安装基板200上。
接着,对图1中的硅半导体基板10和玻璃基板12的剖面构造进行详细说明。
图2是将第1实施方式的摄像模块中的硅半导体基板和玻璃基板部分放大后的剖面图。摄像模块具有形成了摄像元件21的摄像像素部、和处理从该摄像像素部输出的信号的周边电路部。
摄像模块的摄像像素部具有以下那样的结构。
在硅半导体基板10的第1主面上,配置元件分离绝缘层(例如,浅沟槽隔离(STI:Shallow Trench Isolation))22、和被元件分离绝缘层22分离的元件区域。在元件区域上,形成包含光电二极管以及晶体管的摄像元件21。
在形成了摄像元件21的第1主面上形成层间绝缘膜23,在层间绝缘膜23上形成层间绝缘膜24。进而,在层间绝缘膜24中形成布线25。
在层间绝缘膜24上,形成钝化膜26,在钝化膜26上形成基底层27。在基底层27上,与摄像元件21对应地分别配置彩色滤光片28。
在彩色滤光片28上形成涂覆层29,在涂覆层29上与摄像元件21(或彩色滤光片28)对应地分别形成微透镜30。进而,在微透镜30上成为空洞31,在该空洞31上配置透光性支持基板(透明基板),例如玻璃基板12。
在摄像模块的周边电路部上,形成以下那样的贯通电极以及电极焊盘。在硅半导体基板10的第1主面上形成层间绝缘膜23,在层间绝缘膜23上形成内部电极(第1电极)32。
贯通孔从硅半导体基板10的第2主面经过第1主面到达层间绝缘膜23。在贯通孔的侧面上以及底面上,形成绝缘膜35。在硅半导体基板10的第2主面上,形成绝缘膜36。
在贯通孔的内面上(绝缘膜35上以及内部电极32的贯通孔侧的面上)、以及绝缘膜36上,形成贯通电极(导电体层)37。内部电极32与摄像元件21或者形成在周边电路部上的周边电路(未图示)电连接。
另外,在贯通电极37上、以及第2主面上的绝缘膜36上形成保护膜,例如阻焊层38。进而,在第2主面上,将贯通电极37上的阻焊层38的一部分开口,在露出的贯通电极37上,形成焊锡球18。形成于贯通孔的贯通电极37与焊锡球18、以及摄像元件21或者周边电路电连接。
而且,阻焊层38例如由酚醛类树脂、或者聚酰亚胺类树脂、胺类树脂等组成。在焊锡球18中,例如使用Sn-Pb(共晶)、或者95Pb-Sn(高铅高熔点焊锡)、无铅焊锡,作为无铅焊锡使用Sn-Ag、Sn-Cu、Su-Ag-Cu等。
另外,在内部电极32上,间隔着层间绝缘膜24形成元件面电极(第2电极)33。在内部电极32和元件面电极33之间的层间绝缘膜24内,形成将这些电极间电连接的接触插头(contact plug)34。元件面电极33用于例如通过接触插头34以及内部电极32,施加电压以及读取信号等。特别在芯片筛选测试时,测试用针触碰元件面电极33。
进而,在元件面电极33上,形成钝化膜26。在钝化膜26上形成基底层27,在基底层27上形成涂覆层29。进而,在涂覆层29上,形成苯乙烯类树脂层39。
将配置在元件面电极33上的、这些钝化膜26、基底层27、涂覆层29、以及苯乙烯类树脂层39开口,形成焊盘开口部40。在苯乙烯类树脂层39上以及元件面电极33上,间隔着粘接剂11形成玻璃基板12。图形化粘接剂11,使其不在摄像元件21上(或者微透镜30上)配置。
图3是从焊盘开口部侧看图2中的周边电路部的图,是示出绝缘膜35、内部电极32、以及贯通电极37的布局的俯视图。如图所示,在绝缘膜35的内侧配置内部电极32,在内部电极32的内侧配置贯通电极37。
在贯通孔内,配置在贯通电极37和硅半导体基板10之间的绝缘膜35,是将贯通电极37和硅半导体基板10绝缘的构件。如图2以及图3所示,在与硅半导体基板10的第1主面平行的方向上,绝缘膜35的膜厚在300~1000nm的范围,其外形位于内部电极32的外形的外侧。
在如图2所示的剖面看时,存在于硅半导体基板10的第1主面上的绝缘膜35比内部电极32大。而且,在如图3所示的平面看时,绝缘膜35比内部电极32的矩形大,包围内部电极32。在图3所示的例子中,内部电极32是矩形,但不限于矩形,也可以是圆形或多边形。
利用这样的构造,相比在贯通电极和硅半导体基板之间配置膜厚薄的绝缘膜的以往例,能够减少贯通电极37和硅半导体基板10间的电容,能够减小贯通电极37的时间常数。由此,可以防止从焊锡球18提供的电源的劣化,进而能够降低从硅半导体基板10侧产生的电源噪声所造成的影响。由此,能够将所希望的良好的电源电压供给到摄像元件21以及周边电路上。
接着,在下面陈述第1实施方式中的贯通电极37的制造方法。
图4以及图5是示出第1实施方式的摄像模块中的贯通电极的制造方法的图。
首先,如图4所示,在硅半导体基板10上加工贯通孔,接着,在贯通孔内形成绝缘膜35。进而,在硅半导体基板10的第2主面上形成绝缘膜36。
接着,如图5所示,在绝缘膜36、35、23内开孔而形成到达内部电极32的贯通孔41。进而,如图2所示,在贯通孔41的侧面上以及底面上、以及基板10的第2主面上,形成贯通电极37。由此,内部电极32和贯通电极37电连接。其后,形成阻焊层38以及焊锡球18。
若采用以上说明那样的第1实施方式,由于在贯通电极和硅半导体基板之间,形成膜厚厚的绝缘膜,因此能够降低贯通电极和硅半导体基板间的电容。由此,能够减小贯通电极的时间常数,且能够显著降低由外部端子供给的电源电压的劣化,或者反而降低从半导体基板侧产生的电源噪音所造成的影响。由此,能够提供可靠性高的固体摄像器件。
(第2实施方式)
对本发明的第2实施方式的摄像模块进行说明。在第2实施方式中,以包围贯通电极37的外周的方式,在硅半导体基板10上形成与接地电位连接的半导体区域。
图6是示出第2实施方式的摄像模块的结构的剖面图。图7是从焊盘开口部侧看图6中的周边电路部的图,是示出接地区域(半导体区域)42、内部电极32、以及贯通电极37的布局的俯视图。
摄像模块的摄像像素部与第1实施方式相同。以下,说明周边电路部的构造。
如图6所示,在硅半导体基板10的第1主面上形成层间绝缘膜23,在层间绝缘膜23上形成内部电极(第1电极)32。从硅半导体基板10的第2主面经过第1主面到达层间绝缘膜23开孔而形成贯通孔。在贯通孔的侧面上、以及硅半导体基板10的第2主面上形成绝缘膜45。
进而,在贯通孔的内面上(绝缘膜45上以及内部电极32的贯通孔侧的面上)、以及第2主面的绝缘膜45上,形成贯通电极(导电体层)37。内部电极32与摄像元件21或者在周边电路部上所形成的周边电路(未图示)电连接。
另外,在硅半导体基板10的第1主面上,以包围贯通电极37的外周的方式,形成接地区域42。接地区域42由杂质浓度高的扩散层组成,配置在贯通电极37的附近,例如距离贯通电极37的几μm~几十μm的位置。在图7中示出以包围贯通电极37的整个外周的方式形成接地区域42的例子,但也能够以只包围贯通电极37的外周的一部分的方式来形成接地区域42。
进而,在接地区域42上的层间绝缘膜23、24内,形成与接地区域42连接的布线43、接触插头44。在接地区域42上,供给着接地电位等基准电位。因此,接地区域42通过例如布线43以及接触插头44,与具有接地电位的焊锡球18连接。
在不具有接地区域42的以往构造中,贯通电极37周边的硅半导体基板具有高的接地电阻,即以高电阻接地,在第2实施方式中,贯通电极37周边的硅半导体基板具有低的接地电阻,电位稳定。
由此,与第1实施方式相同,能够防止从焊锡球18供给的电源的劣化,进而能够降低从硅半导体基板10侧产生的电源噪音所造成的影响。由此,能够将所希望的良好的电源电压供给到摄像元件21以及周边电路上。
若采用以上说明那样的第2实施方式,由于降低了贯通电极的周边的接地电阻,因此减小了贯通电极的时间常数,且能够显著降低由外部端子供给的电源电压的劣化,或者反过来降低从半导体基板侧产生的电源噪音所造成的影响。由此,能够提供可靠性高的固体摄像器件。
(第3实施方式)
对本发明的第3实施方式的摄像模块进行说明。第3实施方式是将第1实施方式以及第2实施方式的特征部组合而成。在第3实施方式中,在贯通电极37和硅半导体基板10之间,形成膜厚厚的绝缘膜,而且以包围贯通电极37的方式,形成与接地电位连接的接地区域42。
图8是示出第3实施方式的摄像模块的结构的剖面图。图9是从焊盘开口部侧看图8中的周边电路部的图,是示出接地区域42、绝缘膜35、内部电极32、以及贯通电极37的布局的俯视图。
如图所示,在贯通电极37和硅半导体基板10之间,形成膜厚厚的绝缘膜35。进而,在硅半导体基板10的第1主面,以包围贯通电极37的方式,形成与接地电位连接的接地区域42。其他结构与第1以及第2实施方式相同。
若采用第3实施方式,具有比第1以及第2实施方式还大的效果,相比第1以及第2实施方式能够进一步提供可靠性高的固体摄像器件。
本发明的实施方式提供固体摄像器件,能够减少从具有贯通电极的半导体基板的电极供给的电源的劣化、或者降低从半导体基板侧产生的电源噪音所造成的影响。
另外,上述各实施方式,不仅能够单独实施,而且可以适当地组合来实施。进而,在上述各实施方式中包含有各种阶段的发明,通过适当地组合在各实施方式中揭示了的多个构成要件,也可以将各种阶段的发明提取出来。
对于相关领域的技术人员可以容易地发现其额外的优点,并进行修改,因此,本发明在广义上并不仅限于在此所述的具体情况和实施方式。因此,依照上述内容进行的各种修改都不脱离本主旨或者在附属的权力要求所定义的发明范围内。
Claims (8)
1.一种固体摄像器件,其特征在于,包括:
摄像元件,形成在半导体基板的第1主面上;
外部端子,形成于上述半导体基板的与上述第1主面相对的第2主面上;
绝缘膜,埋入于开孔在上述半导体基板中的贯通孔内;
贯通电极,形成在被埋入在上述贯通孔内的上述绝缘膜内,与上述外部端子电连接;以及
第1电极,形成于上述半导体基板的上述第1主面的上述贯通电极上;
从与上述半导体基板的第1主面垂直的方向看时,上述绝缘膜和上述半导体基板相连接的外形比上述第1电极的外形大,在与上述半导体基板的上述第1主面平行的方向上,在上述贯通电极和上述半导体基板之间的上述绝缘膜的膜厚是300~1000nm。
2.如权利要求1所述的固体摄像器件,其特征在于,还包括:
杂质浓度高的半导体区域,以包围上述贯通电极的外周的至少一部分的方式,形成于上述半导体基板;以及
布线,形成在上述半导体区域上,与上述半导体区域电连接;
经由上述布线而向上述半导体区域供给接地电位。
3.如权利要求1所述的固体摄像器件,其特征在于,还包括:
层间绝缘膜,形成在上述第1电极上及上述半导体基板的上述第1主面上;
第2电极,形成在上述层间绝缘膜上;
钝化膜,形成在上述第2电极上及上述层间绝缘膜上,具有露出了上述第2电极的一部分的开口部;以及
接触插头,连接形成在上述第2电极和上述第1电极之间。
4.如权利要求1所述的固体摄像器件,其特征在于,还包括:
彩色滤光片,与上述摄像元件对应地配置在上述摄像元件上;以及
微透镜,配置在上述彩色滤光片上。
5.一种摄像模块,其特征在于,包括:
固体摄像器件;
透光性基板,配置在上述固体摄像器件上;
红外线截止滤光片,配置在上述透光性基板上;以及
摄像透镜,配置在上述红外线截止滤光片上;
其中,上述固体摄像器件具有:
摄像元件,形成在半导体基板的第1主面上;
外部端子,形成于上述半导体基板的与上述第1主面相对的第2主面上;
绝缘膜,埋入在贯通孔内,上述贯通孔开孔在上述半导体基板;
贯通电极,形成在被埋入在上述贯通孔内的上述绝缘膜内,与上述外部端子电连接;以及
第1电极,形成于上述半导体基板的上述第1主面的上述贯通电极上;
从与上述半导体基板的第1主面垂直的方向看时,上述绝缘膜和上述半导体基板相连接的外形比上述第1电极的外形大,在与上述半导体基板的上述第1主面平行的方向上,在上述贯通电极和上述半导体基板之间的上述绝缘膜的膜厚是300~1000nm。
6.如权利要求5所述的摄像模块,其特征在于,
上述固体摄像器件还包括:
杂质浓度高的半导体区域,以包围上述贯通电极的外周的至少一部分的方式,形成于上述半导体基板;以及
布线,形成在上述半导体区域上,与上述半导体区域电连接;
经由上述布线而向上述半导体区域供给接地电位。
7.如权利要求5所述的摄像模块,其特征在于,
上述固体摄像器件还包括:
层间绝缘膜,形成在上述第1电极上及上述半导体基板的上述第1主面上;
第2电极,形成在上述层间绝缘膜上;
钝化膜,形成在上述第2电极上及上述层间绝缘膜上,具有露出了上述第2电极的一部分的开口部;以及
接触插头,连接形成在上述第2电极和上述第1电极之间。
8.如权利要求5所述的摄像模块,其特征在于,
上述固体摄像器件还包括:
彩色滤光片,与上述摄像元件对应地配置在上述摄像元件上;以及
微透镜,配置在上述彩色滤光片上。
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JP2009100068A JP2010251558A (ja) | 2009-04-16 | 2009-04-16 | 固体撮像装置 |
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CN101866897A CN101866897A (zh) | 2010-10-20 |
CN101866897B true CN101866897B (zh) | 2012-11-14 |
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JP (1) | JP2010251558A (zh) |
CN (1) | CN101866897B (zh) |
TW (1) | TWI437699B (zh) |
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JP2011009645A (ja) * | 2009-06-29 | 2011-01-13 | Toshiba Corp | 半導体装置及びその製造方法 |
US8532449B2 (en) * | 2010-05-06 | 2013-09-10 | Intel Corporation | Wafer integrated optical sub-modules |
JP2012018993A (ja) * | 2010-07-06 | 2012-01-26 | Toshiba Corp | カメラモジュールおよびその製造方法 |
JP5832852B2 (ja) | 2011-10-21 | 2015-12-16 | 浜松ホトニクス株式会社 | 光検出装置 |
JP5791461B2 (ja) | 2011-10-21 | 2015-10-07 | 浜松ホトニクス株式会社 | 光検出装置 |
KR20130106619A (ko) * | 2012-03-20 | 2013-09-30 | 삼성전자주식회사 | 이미지 센서 및 그 제조 방법 |
US9570398B2 (en) * | 2012-05-18 | 2017-02-14 | Xintec Inc. | Chip package and method for forming the same |
JP2014022402A (ja) * | 2012-07-12 | 2014-02-03 | Toshiba Corp | 固体撮像装置 |
EP2889901B1 (en) | 2013-12-27 | 2021-02-03 | ams AG | Semiconductor device with through-substrate via and corresponding method |
TWI616692B (zh) * | 2014-12-29 | 2018-03-01 | 鴻海精密工業股份有限公司 | 光纖連接器及光耦合透鏡 |
WO2016143288A1 (en) * | 2015-03-12 | 2016-09-15 | Sony Corporation | Imaging device, manufacturing method, and electronic device |
JP6693068B2 (ja) * | 2015-03-12 | 2020-05-13 | ソニー株式会社 | 固体撮像装置および製造方法、並びに電子機器 |
TWI600125B (zh) | 2015-05-01 | 2017-09-21 | 精材科技股份有限公司 | 晶片封裝體及其製造方法 |
US10986281B2 (en) | 2015-07-31 | 2021-04-20 | Sony Corporation | Pinhole camera, electronic apparatus and manufacturing method |
JP6743035B2 (ja) * | 2015-10-05 | 2020-08-19 | ソニーセミコンダクタソリューションズ株式会社 | 撮像装置、製造方法 |
TWI698963B (zh) * | 2016-06-03 | 2020-07-11 | 日商大日本印刷股份有限公司 | 貫通電極基板及其製造方法、以及安裝基板 |
JP7378923B2 (ja) | 2018-10-31 | 2023-11-14 | キヤノン株式会社 | 半導体装置、モジュール、カメラおよび機器 |
WO2023074233A1 (ja) | 2021-10-26 | 2023-05-04 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置及びその製造方法並びに電子機器 |
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- 2010-03-09 CN CN2010101274833A patent/CN101866897B/zh not_active Expired - Fee Related
- 2010-03-19 US US12/727,564 patent/US8476729B2/en not_active Expired - Fee Related
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TW201101471A (en) | 2011-01-01 |
CN101866897A (zh) | 2010-10-20 |
US20100264503A1 (en) | 2010-10-21 |
JP2010251558A (ja) | 2010-11-04 |
US8476729B2 (en) | 2013-07-02 |
TWI437699B (zh) | 2014-05-11 |
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