CN101256996B - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
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- CN101256996B CN101256996B CN2008100823643A CN200810082364A CN101256996B CN 101256996 B CN101256996 B CN 101256996B CN 2008100823643 A CN2008100823643 A CN 2008100823643A CN 200810082364 A CN200810082364 A CN 200810082364A CN 101256996 B CN101256996 B CN 101256996B
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- Prior art keywords
- electroconductive binder
- semiconductor element
- semiconductor device
- wiring plate
- splicing ear
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
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Abstract
一种半导体器件及其制造方法,在该半导体器件中,半导体元件的外侧连接端子与布线板的电极通过导电粘合剂互相连接,所述导电粘合剂包括:第一导电粘合剂;以及第二导电粘合剂,覆盖所述第一导电粘合剂;其中,所述第一导电粘合剂包含导电填充物,所述导电填充物包括银(Ag);以及所述第二导电粘合剂包含导电填充物,所述导电填充物包括从锡(Sn)、锌(Zn)、钴(Co)、铁(Fe)、钯(Pd)、铂(Pt)组成的群组中选择的金属。本发明能够保证半导体器件的高可靠性。
Description
技术领域
本发明一般地涉及半导体器件及其制造方法。
背景技术
像移动电话或数码相机这样的电子器件功能性强、体积小,因此要求设置在这些电子器件中的半导体器件有更强的功能和更高的集成度。因此近年来提出,将半导体元件例如集成电路芯片直接安装在布线板上,以缩小安装面积、实现高效使用。
具体而言,在半导体器件中,用称为导线凸点的突起(突出)外侧连接端子,将半导体集成电路元件(以下称为“半导体元件”)安装在布线板上。将绝缘树脂(例如玻璃环氧树脂)用于布线板的基底部分。在布线板的主表面上选择性地设置由铜(Cu)等材料制成的导电层。将设置在半导体元件主表面上的突起(突出)外侧连接端子连接到布线板的导电层。在布线板的另一主表面上选择性形成的电极表面设置外侧连接端子(例如球形电极端子)。在上述半导体器件中,以所谓的倒装芯片(面朝下,face-down)方式将半导体元件安装在布线板上。上述倒装芯片安装结构通过以下方法形成。
在第一方法中,将半导体元件安装在布线板上时,预先在布线板的主表面上提供底部填充材料(underfill material),例如热固性粘合剂。当通过施加高负荷将半导体元件隔着底部填充材料安装在布线板上以使底部填充材料展开时,通过毛细管作用使底部填充材料流过半导体元件的整个表面区域。同时,通过在安装半导体元件时施加的热将底部填充材料固化。
在第一方法中,因为在固化底部填充材料的同时向半导体元件施加高负荷,所以半导体元件的突起形外侧连接端子与布线板的电极相互挤压而相互连接。
在这种压力连接式的第一方法中,利用通过热固化底部填充材料的收缩力和挤压半导体元件的突起形外侧连接端子时的排斥力,来维持半导体元件的突起形外侧连接端子与布线板的电极之间的连接,从而在半导体元件的突起形外侧连接端子与布线板的电极之间电连接。
在第二方法中,将例如由银(Ag)膏制成的导电粘合剂传送到突起形外侧连接端子的顶端。通过导电粘合剂将半导体元件的突起形外侧连接端子与布线板的电极相互连接。然后,在布线板上半导体元件的外周附近涂上底部填充材料。通过毛细管作用使底部填充材料流过半导体元件的整个表面区域,并通过加热将底部填充材料固化。
通常使用银(Ag)、主要成分为银(Ag)的混合物或者合金作为上述导电粘合剂。银(Ag)的体积电阻率低,与形成半导体元件的突起形外侧连接端子的金(Au)之间的接触电阻低。
日本专利No.3409957描述了将两种导电粘合剂用于布线板的电极与半导体元件的电极的连接部分的实例。具体而言,在日本专利No.3409957中提出以面朝下的方式将IC芯片的突出电极安装在布线板上的结构。将由银钯(AgPd)导电填充物制成的第一导电粘合剂传送到突出电极上,将由银(Ag)导电填充物制成的第二导电粘合剂传送到第一导电粘合剂的外侧。通过使用这种方法的倒装芯片安装方式能够容易地形成具有良好电特性的薄半导体器件。
但是,由于半导体器件具有高级功能,因此突起形外侧连接端子的间距变窄,使得突起形外侧连接端子的尺寸变小。
在这种压力连接式的第一方法中,当固化底部填充材料时向半导体元件施加高负荷,使得半导体元件的突起形外侧连接端子受挤压。但是,因为半导体元件比布线板更坚固,所以在布线板上以倒装芯片方式安装了半导体元件的地方会形成顶部基本上位于布线板中央的曲面。结果,在除了通过电极与突起形外侧连接端子变窄而形成半导体元件与布线板的电连接的区域之外的区域中,半导体元件与布线板之间的垂直方向上的间隙变窄。
因此,在半导体器件制造工艺中产生的颗粒进入位于半导体元件与布线板之间垂直方向上的间隙中的底部填充材料中,从而使半导体元件的电路受到破坏。
如果当半导体元件与布线板相互连接时施加的负荷使得在半导体元件与布线板之间的垂直方向上的间隙变宽,则用于连接半导体元件的突起形外侧连接端子与布线板的电极的力会减弱,从而使半导体元件与布线板之间产生短路。换而言之,如果将压力连接式的第一方法应用于在布线板上以窄间距形成突起形外侧连接端子的半导体元件的倒装芯片式安装,则在半导体元件与布线板之间的连接松开的地方会产生连接限制。
此外,当进行包括加热历程(heat history)的测试(例如回流测试或者温度循环测试)时,因为基于半导体元件、布线板、底部填充材料、导电粘合剂以及其它部分的热膨胀系数的差异而使热膨胀引起的应力,所以半导体元件与布线板之间的连接会松动,在半导体元件与布线板之间会产生短路。
在上述第二方法中,将半导体元件安装在布线板上,在该半导体元件中将由银(Ag)膏制成的导电粘合剂传送到半导体元件的突起形外侧连接端子的顶端,使得半导体元件的突起形外侧连接端子与布线板的电极相互连接。因此,半导体元件的突起形外侧连接端子与布线板的电极相互连接的连接部分为低弹性体。
因此,当进行包括加热历程的测试(例如回流测试或者温度循环测试)时,虽然半导体元件与布线板之间的连接没有松动,但是也容易产生离子迁移,即导电粘合剂中包含的银(Ag)由于电场或环境而被电离,并在外部被洗提(elute)。特别地,如果突起形外侧连接端子的间距变窄,并且在半导体元件的突起形外侧连接端子与布线板的电极相互连接的连接部分中存在大量的银(Ag),则由于半导体元件与布线板之间的离子迁移而容易产生短路。
此外,在日本专利No.3409957所讨论的实例中,因为是在突出电极的最外周部分形成由银(Ag)导电填充物制成的第二导电粘合剂,所以难以避免上述银离子迁移的产生。
发明内容
本发明的一个方案可提供一种半导体器件,其中半导体元件的外侧连接端子与布线板的电极通过导电粘合剂互相连接,所述导电粘合剂包括:第一导电粘合剂;以及第二导电粘合剂,覆盖所述第一导电粘合剂;其中,所述第一导电粘合剂包含导电填充物,所述导电填充物包括银(Ag);以及所述第二导电粘合剂包含导电填充物,所述导电填充物包括从锡(Sn)、锌(Zn)、钴(Co)、铁(Fe)、钯(Pd)、铂(Pt)组成的群组中选择的金属。
本发明的另一方案可提供一种半导体器件的制造方法,所述半导体器件包括半导体元件的外侧连接端子和布线板的电极,它们通过导电粘合剂互相连接,所述制造方法包括步骤:在半导体元件的外侧连接端子上形成包含导电填充物的第一导电粘合剂,所述导电填充物包括银(Ag);在所述第一导电粘合剂的表面上形成第二导电粘合剂,所述第二导电粘合剂包含导电填充物,所述导电填充物包括从锡(Sn)、锌(Zn)、钴(Co)、铁(Fe)、钯(Pd)、铂(Pt)组成的群组中选择的金属;以及将所述半导体元件的所述外侧连接端子连接到在布线板上形成的电极。
本发明能够保证半导体器件的高可靠性。
附图说明
图1为本发明实施例的半导体器件的横截面视图;
图2为图1中虚线A所包围的部分的放大示意图;
图3为从接合电极的上表面侧观察时导电粘合剂(图2所示)的示意图;
图4A至图4C为本发明实施例的半导体器件的第一制造方法的第一示意图;
图5D至图5F为本发明实施例的半导体器件的第一制造方法的第二示意图;
图6G至图6I为本发明实施例的半导体器件的第一制造方法的第三示意图;
图7J至图7K为本发明实施例的半导体器件的第一制造方法的第四示意图;
图8A至图8C为本发明实施例的半导体器件的第二制造方法的第一示意图;
图9D至图9F为本发明实施例的半导体器件的第二制造方法的第二示意图;以及
图10G至图10I为本发明实施例的半导体器件的第二制造方法的第三示意图。
具体实施方式
下面参照图1至图10描述本发明的实施例。
为方便起见,首先讨论本发明实施例的半导体器件的结构,然后讨论半导体器件的制造方法。
半导体器件
图1为本发明实施例的半导体器件的横截面视图。
参照图1,在半导体器件10中,以所谓的倒装芯片(面朝下)方式将半导体集成电路元件(以下称为“半导体元件”)12安装、固定在布线板11的一个主表面上。
布线板11由例如玻璃环氧树脂、玻璃-BT(双马来酰亚胺三嗪)、聚酰亚胺的有机树脂材料或者例如陶瓷、玻璃的无机材料制成。在布线板11上选择性地设置由铜(Cu)等材料制成的布线图案(图1中未示出)。布线板11可称为插线板或支撑板。
在布线板11安装半导体元件12的主表面上形成接合电极14,安装在布线板11上的半导体元件12的突起(突出)形外侧连接端子13连接接合电极14。接合电极14例如由铜(Cu)、镍(Ni)或金(Au)制成。
在布线板11的另一主表面(位于与安装了半导体元件12的表面相对的一侧)上设置导电层(图1中未示出)。在导电层上以栅格图案的形式设置多个外侧连接端子15(例如由焊料等材料制成的球形电极端子)。
半导体元件12包括硅(Si)半导体衬底,通过已知的半导体制造工艺形成。本发明可应用于具有由化学半导体(例如砷化镓(GaAs))制成的半导体元件的半导体器件。
在半导体元件12的主表面上以直线形式选择性地设置外侧连接端子焊盘16。例如,沿着半导体衬底12主表面的四条边附近的四条边设置外侧连接端子焊盘16,或者沿着半导体衬底12主表面的相对的两条边附近的两条边设置外侧连接端子焊盘16。在外侧连接端子焊盘16上设置称为导线凸点的突起(突出)形外侧连接端子13。
外侧连接端子焊盘16由铝(Al)、铜(Cu)或者这些金属的合金制成。可通过电镀法、气相沉积法等方法在外侧连接端子焊盘16的暴露表面(顶层)上形成金(Au)层。
此外,例如通过使用导线接合技术的所谓球焊方法,形成设置在各个外侧连接端子焊盘16上的突起(突出)形外侧连接端子13。具体而言,通过压力固定或连接一个金(Au)球来形成底座部分,从底座部分突出来一个突出部分,从而形成突起(突出)形外侧连接端子13。
突起(突出)形外侧连接端子13不限于上述实例。例如,突起(突出)形外侧连接端子13可由铜(Cu)、铜(Cu)与金(Au)的合金、焊料等材料制成。
如上所述,在将半导体元件12的突起形外侧连接端子13与布线板11对应的接合电极14连接时,在突起形外侧连接端子13上设置导电粘合剂20。至少将半导体元件12的突起形外侧连接端子13的突出部分和与之对应的接合电极14都覆盖上导电粘合剂20,从而使突起形外侧连接端子13与接合电极14相互机械连接并电连接。
这里,参照图2讨论导电粘合剂20的配置结构。图2为图1中虚线A所包围的部分的放大示意图。
如图2所示,导电粘合剂20包括由第一导电粘合剂20-1和第二导电粘合剂20-2形成的双层结构。具体而言,在位于突起形外侧连接端子13底座部分13-a上的突出部分13-b周围设置由第一导电粘合剂20-1制成的层。在第一导电粘合剂20-1外侧形成第二导电粘合剂20-2以覆盖第一导电粘合剂20-1的外表面。
第一导电粘合剂20-1和第二导电粘合剂20-2是含有作为分散在粘合剂树脂(binder resin)和有机溶剂中的导电填充物的金属颗粒的粘合剂。粘合剂树脂的实例包括:环氧化合物(epoxy composition)、丙烯酸化合物、乙烯基化合物、热固性化合物(例如末端为羟氢氧基的化合物)、可溶于溶剂的树脂化合物、上述物质的混合物等等。在作为粘合剂树脂的环氧树脂中,基本成分是作为环氧固化剂的环氧基化合物,还可采用表面活性剂或者助熔剂(flux)。
作为第一导电粘合剂20-1,可使用将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在上述粘合剂树脂中的粘合剂。银(Ag)的体积电阻率低,与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。例如可使用银钯(AgPd)作为主要成分为银(Ag)的混合物(金属互化物)或合金。例如可使用将、重量百分比在30%以上的具有1μm以下平均颗粒直径的银(Ag)颗粒分散在粘合剂树脂中的粘合剂作为第一导电粘合剂20-1。
作为第二导电粘合剂20-2,可使用将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在上述粘合剂树脂中的粘合剂。例如可使用将重量百分比在30%以上的具有0.1μm以下平均颗粒直径的锡(Sn)颗粒分散在粘合剂树脂中的粘合剂作为第二导电粘合剂20-2。
由于在第二导电粘合剂20-2中,即在将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在上述粘合剂树脂中的粘合剂中,因为在将半导体元件12的突起形外侧连接端子13连接到布线板11的接合电极14时施加的热,使第二导电粘合剂20-2从环境中吸收氧气(O2),从而在第二导电粘合剂20-2的外表面上形成薄氧化物膜。
换而言之,配置为将半导体元件12的突起形外侧连接端子13与布线板11的接合电极14连接的导电粘合剂20包括由第一导电粘合剂20-1和第二导电粘合剂20-2形成的双层结构。因此,即使银(Ag)或者包含在主要成分为银(Ag)的混合物(金属互化物)或合金中的银作为离子被洗提,通过第二导电粘合剂20-2外表面上形成的薄氧化物膜,也能防止布线板11或底部填充材料17提供的氢氧根离子(OH-)被大量吸收到第一导电粘合剂20-1中。
因此,在本实例中,例如与日本专利No.3409957中所讨论的在半导体元件的突起形外侧连接端子的最外周部分形成银(Ag)的情况相比,能降低银离子(Ag+)与氢氧根离子(OH-)相结合的情况的比率。因此,能防止由于枝状晶体(dendrite)的形成造成离子迁移,并防止由于银(Ag)的离子迁移造成半导体元件12与布线板11之间的短路。
在上述实例中,将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂用作第二导电粘合剂20-2。但是本发明不限于此。
例如不用锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金,而是可将重量百分比在30%以上的锌(Zn)、钴(Co)、铁(Fe)、钯(Pd)、铂(Pt)或者包括这些金属的合金分散在粘合剂树脂中的粘合剂用作第二导电粘合剂20-2。在这种情况下,能够实现与上述实例所描述的同样的效果。
同时,在包括由第一导电粘合剂20-1和第二导电粘合剂20-2形成的双层结构的导电粘合剂20中,第二导电粘合剂20-2形成在第一导电粘合剂20-1外侧以覆盖第一导电粘合剂20-1的外周表面。第一导电粘合剂20-1在导电粘合剂20连接布线板11的接合电极14的表面上暴露。
参照图3说明该结构。这里,图3为从接合电极14的上表面侧,即从接合电极14连接导电粘合剂20的表面一侧观察时导电粘合剂20(图2所示)的示意图。
如图3所示,在第一导电粘合剂20-1被第二导电粘合剂20-2包围的状态下,将第一导电粘合剂20-1基本上暴露在导电粘合剂20连接布线板11的接合电极14的表面的中央。
通过这种结构,即使将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的第二导电粘合剂20-2的体积电阻率高,由于第一导电粘合剂20-1基本上暴露在连接布线板11的接合电极14的表面的中央,所以也能可靠地实现布线板11的接合电极14与半导体元件12的突起形外侧连接端子13之间的传导性。这里,在第一导电粘合剂20-1中,将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在上述粘合剂树脂中。银(Ag)的体积电阻率低,与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。
再参照图1,通过分配(dispensing)方法、印刷(printing)方法、传送方法等方法,在半导体元件12与布线板11的上表面之间提供底部填充材料17,例如由环氧树脂、聚酰亚胺树脂、丙烯酸树脂、硅树脂或者其它热固性绝缘树脂制成的粘合剂。在底部填充材料17中可包括银(Ag)、焊料或镍(Ni)的导电颗粒。
如上所述,本发明实施例的半导体器件10具有参照图2和图3所示的导电粘合剂20的配置结构。此外,在半导体器件10中,半导体元件12以倒装芯片(面朝下)的方式安装并固定在布线板11的主表面上。
此外,本实例中的导电粘合剂20包括由第一导电粘合剂20-1和第二导电粘合剂20-2形成的双层结构。导电粘合剂20将半导体元件12的突起形外侧连接端子13与布线板11的接合电极14相互连接。第二导电粘合剂20-2形成在第一导电粘合剂20-1外侧以覆盖第一导电粘合剂20-1的外周表面。第一导电粘合剂20-1暴露在导电粘合剂20连接布线板11的接合电极14的表面。
在第一导电粘合剂20-1中,将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中。银(Ag)与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。这样的第一导电粘合剂20-1基本上暴露在与布线板11的接合电极14连接的表面的中央。因此,能可靠地实现半导体元件12的突起形外侧连接端子13与布线板11的接合电极14之间的传导性。
此外,通过在第二导电粘合剂20-2的外表面形成的锡(Sn)的氧化物膜,能防止布线板11或底部填充材料17提供的氢氧根离子(OH-)被大量吸收到第一导电粘合剂20-1中。
因此,即使不能避免半导体元件12的突起形外侧连接端子13的窄间距连接这样的情况,也能保证半导体器件的高可靠性。因此,本发明实施例有助于安装了半导体器件的电子设备的高功能性。
半导体器件的制造方法
接着讨论本发明实施例的半导体器件的制造方法。这里讨论了两种方法。
1、半导体器件的第一制造方法
图4A至图7K为本发明实施例半导体器件的第一制造方法的第一至第四示意图。
在本发明实施例半导体器件的第一制造方法中,使用图4A所示的倒装芯片接合器(flip chip bonder)30。倒装芯片接合器30包括接合台31、吸附器(absorbing tool)32、传送台33(33-1、33-2)、调整台(leveling stage)34等。将布线板11安装在接合台31上。吸附器32通过施加吸引力将半导体元件12吸住,并在图4A中箭头所示方向运送半导体元件12。调整台34例如由涂覆了氟树脂的玻璃制成。
本发明的发明人用Panasonic Factory Engineering制造的FCB2M作为倒装芯片接合器30对本发明实施例的半导体器件的制造方法进行了测试。
图4B是被吸附器32吸住的半导体元件12的放大示意图。半导体元件12包括用已知的半导体制造工艺形成的硅(Si)半导体衬底。在半导体元件12的外侧连接端子焊盘16上形成突起形外侧连接端子13。
例如通过使用导线接合技术的所谓球焊方法,形成突起形外侧连接端子13。具体而言,通过压力固定或连接一个金(Au)球来形成底座部分,从底座部分突出来一个突出部分,从而形成突起(突出)形外侧连接端子13。必要的话,对突起形外侧连接端子13的突出部分的顶部采用整平工艺。
本发明的发明人用具有6.5mm×6.5mm矩形平面结构的半导体元件对本发明实施例的半导体器件的制造方法进行了测试,其中在半导体元件12上以50μm的间距形成了360个用金(Au)制成的30μm高的突起形外侧连接端子13。
半导体元件12被吸附器32吸住,从而使半导体元件12的形成有突起形外侧连接端子13的表面朝下,并在第一传送台33-1的上方移动,如图4C所示。
将第一导电粘合剂20-1涂覆在第一传送台33-1上。用橡胶扫帚(squeegee)(叶片)35-1调节第一导电粘合剂20-1的厚度,橡胶扫帚35-1能够在图4C中白色箭头所示的方向上移动,以获得指定的厚度,例如大约10μm。
作为第一导电粘合剂20-1,使用将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂。银(Ag)的体积电阻率低,并且与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。例如可使用银钯(AgPd)作为主要成分为银(Ag)的混合物(金属互化物)或合金。作为粘合剂树脂,可使用环氧化合物、丙烯酸化合物、乙烯基化合物、热固性化合物(例如末端为羟氢氧基的化合物)、可溶于溶剂的树脂化合物、上述物质的混合物等等。在作为粘合剂树脂的环氧树脂中,基本成分是作为环氧固化剂的环氧基化合物,还可采用表面活性剂或者助熔剂。
本发明的发明人使用将平均颗粒直径为100nm的银(Ag)颗粒分散在环氧树脂(例如ADEKA制造的ADEKA HARDNER EH系列)中的粘合剂作为第一导电粘合剂20-1。本发明的发明人将第一导电粘合剂20-1涂覆在第一传送台33-1上,并使用橡胶扫帚(叶片)35-1调节第一导电粘合剂20-1的厚度,使得第一导电粘合剂20-1的厚度大约为10μm。
在此阶段,降低吸住半导体元件12的吸附器32,以大约4.9N的负荷(力)将半导体元件12推向第一传送台33-1,使半导体元件12浸入第一导电粘合剂20-1。结果,将第一导电粘合剂20-1传送到半导体元件12的突起形外侧连接端子13。
在将第一导电粘合剂20-1传送到半导体元件12的突起形外侧连接端子13之后,用吸附器32吸住半导体元件12,以大约70到240℃的温度加热第一导电粘合剂20-1,将其暂时固化。
本发明的发明人在此步骤使用吸附器32,以180℃的温度将第一导电粘合剂20-1加热90秒。
在将第一导电粘合剂20-1短时间地暂时固化后,为了提高产量,如图5D所示,将包括突起形外侧连接端子13(设置了暂时固化的第一导电粘合剂20-1)的半导体元件12取下,而放入氮气(N2)环境下的炉子36中。在炉子36中,以大约200℃的温度将半导体元件12加热60分钟,从而将第一导电粘合剂20-1固化。
本发明的发明人使用Yamato Sciemific Co.,Ltd制造的惰性气体炉子(inert oven),在氮气(N2)环境下的炉子36中进行该加热工艺60分钟。例如,在使用导电粘合剂84-1LMISR$作为第一导电粘合剂20-1的情况下,经固化后弹性模量(elastic modulus)为大约4GPa。
为方便起见,在图5D中以放大的方式示出上述半导体元件12。
接着,用吸附器32吸住包括突起形外侧连接端子13(设置了固化的第一导电粘合剂20-1)的半导体元件12,以半导体元件12的形成有突起形外侧连接端子13的表面朝下的方式在第二传送台33-2上方移动。如图5E所示。为方便起见,图5E中未示出形成在突起形外侧连接端子13上的第一导电粘合剂20-1。
将第二导电粘合剂20-2涂覆在第二传送台33-2上。用橡胶扫帚(叶片)35-2调节第二导电粘合剂20-2的厚度,橡胶扫帚35-2能够在图5E中白色箭头所示的方向上移动,以获得指定的厚度,例如大约15μm。
作为第二导电粘合剂20-2,可使用将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂。作为粘合剂树脂,可使用环氧化合物、丙烯酸化合物、乙烯基化合物、热固性化合物(例如末端为羟氢氧基的化合物)、可溶于溶剂的树脂化合物、上述物质的混合物等等。在作为粘合剂树脂的环氧树脂中,基本成分是作为环氧固化剂的环氧基化合物,还可采用表面活性剂或者助熔剂。
例如不用锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金,而是可将重量百分比在30%以上的锌(Zn)、钴(Co)、铁(Fe)、钯(Pd)、铂(Pt)或者包括这些金属的合金分散在粘合剂树脂中的粘合剂用作第二导电粘合剂20-2。
本发明的发明人使用将30%以上重量百分比的平均颗粒直径在0.1μm以下的锡(Sn)颗粒分散在粘合剂树脂中的粘合剂作为第二导电粘合剂20-2。
在此阶段,降低吸住半导体元件12的吸附器32,以大约4.9N的负荷(力)将半导体元件12推向第二传送台33-2,使半导体元件12浸入第二导电粘合剂20-2。结果,将第二导电粘合剂20-2传送到半导体元件12的覆盖有第一导电粘合剂20-1的突起形外侧连接端子13。
如图5F所示。此时,当通过图5D所示的步骤将第一导电粘合剂20-1固化时,第二导电粘合剂20-2没有固化,保持膏状。为方便起见,在图5F中以放大的方式示出上述半导体元件12。
接着,用吸附器32吸住包括突起形外侧连接端子13(设置了固化的第一导电粘合剂20-1)的半导体元件12,在调整台34上方移动,使半导体元件12的形成了突起形外侧连接端子13的表面朝下。降低吸附器32,从而以大约4.9N或者每个突起形外侧连接端子13大约0.01gf至10gf的负荷将半导体元件12推向调整台。如图6G所示。为方便起见,图6G中未示出形成在突起形外侧连接端子13上的第二导电粘合剂20-2和第一导电粘合剂20-1。
用吸附器32吸住半导体元件12,以例如50至180℃的指定温度加热半导体元件12。对传送到覆盖有第一导电粘合剂20-1的突起形外侧连接端子13上的第二导电粘合剂20-2进行调整工艺(leveling process),使包含在第二导电粘合剂20-2中的有机溶剂蒸发,因此第二导电粘合剂20-2的流动性下降。如图6H所示。为方便起见,在图6H中以放大的方式示出半导体元件12。
本发明的发明人利用吸附器32,以120℃的温度加热30秒来进行该调整工艺。
如图6H所示,通过此步骤,导电粘合剂20具有了由第一导电粘合剂20-1和第二导电粘合剂20-2形成的双层结构。具体而言,第一导电粘合剂20-1形成的层位于突起形外侧连接端子13的底座部分13-a上的突出部分13-b周围。第二导电粘合剂20-2形成在第一导电粘合剂20-1外侧以覆盖第一导电粘合剂20-1的外周表面。
因为此时第二导电粘合剂20-2没有固化,所以当在调整工艺中施加调整负荷时,第二导电粘合剂20-2的下侧部分(突起形外侧连接端子13的顶端一侧)向外移动。如图6I所示,如果施加的负荷超过指定的力,则第一导电粘合剂20-1的下表面(也就是在后续步骤中将连接到布线板11的接合电极14的表面)被暴露,使得第一导电粘合剂20-1被第二导电粘合剂20-2包围。这里,图6I为从图6H中的箭头A所示的方向观察时应用了调整工艺的导电粘合剂20的示意图。
因此,在第二导电粘合剂20-2中,将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中。此外,作为第一导电粘合剂20-1,使用将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂。银(Ag)的体积电阻率低,与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。即使第二导电粘合剂20-2的体积电阻率高,第一导电粘合剂20-1也基本上暴露在连接布线板11的接合电极14的表面的中央。因此,在将半导体元件12连接到布线板11的后续步骤中,能可靠地实现半导体元件12的突起形外侧连接端子13与布线板11的接合电极14之间的电传导性。
接着,将包括由第一导电粘合剂20-1和第二导电粘合剂20-2形成的双层结构的半导体元件12的突起形外侧连接端子13与布线板11的接合电极14连接,从而将半导体元件12与布线板11相互连接。
如图7J所示,将膏状底部填充材料17涂敷在安装并固定于接合台31上的布线板11上。作为底部填充材料17,可使用环氧树脂、聚酰亚胺树脂、丙烯酸树脂、硅树脂或者其它热固性绝缘树脂。可通过分配方法、印刷方法、传送方法等方法设置底部填充材料17。由银(Ag)、焊料或者镍(Ni)制成的导电颗粒可被用于底部填充材料17。
此时,可通过加热上述接合台32,以指定的温度加热布线板11。结果,降低了涂敷在布线板11上的底部填充材料17的粘性,从而提高了底部填充材料17的流动性。
本发明的发明人使用Emerson & Cuming制造的E-1206作为底部填充材料17来进行本制造方法的测试。
接着,降低吸住半导体元件12的吸附器32(图7J未示出),使布线板11的涂敷有底部填充材料17的主表面与半导体12的主表面平行。当通过吸附器32进行的加热继续时,施加负荷以将半导体元件12隔着底部填充材料17固定到布线板上。如图7K所示。为方便起见,在图7K中以放大的方式示出上述半导体元件12。
为了进行本制造方法的测试,本发明的发明人向涂敷有底部填充材料17的布线板11的接合电极施加25.5N的负荷,并以220℃的温度加热60秒。
如上所述,在第二导电粘合剂20-2中,将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中。
由于在将半导体元件12的突起形外侧连接端子13连接到布线板11的接合电极14时施加的热,第二导电粘合剂20-2从环境中吸收氧气(O2),从而在第二导电粘合剂20-2的外表面上形成薄氧化物膜。
因此,即使银(Ag)或者包含在主要成分为银(Ag)的混合物(金属互化物)或合金中的银作为离子被洗提,通过第二导电粘合剂20-2外表面上形成的锡(Sn)氧化物膜,也能防止布线板11或底部填充材料17提供的氢氧根离子(OH-)被大量吸收到第一导电粘合剂20-1中。
因此,在本实例中,与例如日本专利No.3409957中所讨论的在半导体元件的突起形外侧连接端子的最外周部分形成银(Ag)的情况相比,能降低银离子(Ag+)与氢氧根离子(OH-)相结合的情况的比率。因此,能防止由于枝状晶体的形成造成的离子迁移,并防止由于银(Ag)的离子迁移造成半导体元件12与布线板11之间的短路。
这样,通过倒装芯片(面朝下)的方法将半导体元件12安装并固定在布线板11的主表面上。此外,至少将半导体元件12的突起形外侧连接端子13的突出部分和与之相对应的布线板上的接合电极14都覆盖上具有上述双层结构的导电粘合剂20。这样,至少突起形外侧连接端子13的突出部分与接合电极14相互机械连接并电连接。
之后,通过吸附器32松开半导体元件12,吸附器32升高。
然后,在布线板11的后表面,即与安装了多个半导体元件12的表面相对的表面,以栅格的方式设置外侧连接电极15,例如由锡(Sn)-银(Ag)焊料或者锡(Sn)-银(Ag)-铜(Cu)制成的焊料球。
之后,用切割刀片等工具将布线板11切割成多个安装有半导体元件12的部分。结果,形成以倒装芯片方式将半导体元件12安装在布线板11上的半导体器件10。
如果半导体元件12必须采用密封工艺(例如在将布线板11切割成片之前),则在布线板11的安装有半导体元件12的表面上进行树脂密封工艺。在树脂密封工艺之后,在厚度方向上将布线板11和密封树脂部分切割成多个部分,每一部分上安装有一个半导体元件12。这样就能形成经树脂密封并切割后的半导体器件。
这样,在通过上述制造方法形成的半导体器件10中设置粘合剂20。在粘合剂20的双层结构中,第二导电粘合剂20-2形成在第一导电粘合剂20-1外侧以覆盖第一导电粘合剂20-1的外周表面。第一导电粘合剂20-1暴露在导电粘合剂20连接布线板11的接合电极14的表面。因此,能可靠地实现半导体元件12的突起形外侧连接端子13与布线板11的接合电极14之间的传导性。
此外,通过第二导电粘合剂20-2外表面上形成的锡(Sn)氧化物膜,能防止布线板11或底部填充材料17提供的氢氧根离子(OH-)被大量吸收到第一导电粘合剂20-1中。因此,能防止由于枝状晶体的形成造成的离子迁移,并防止由于银(Ag)的离子迁移造成半导体元件12与布线板11之间的短路。
因此,即使不能避免半导体元件的突起形外侧连接端子的窄间距连接这样的情况,也能保证半导体器件的高可靠性。因此,本发明实施例有助于安装有半导体器件的电子设备的高功能性。
根据本发明的发明人所进行的测试,在通过本发明实施例的制造方法制造的半导体器件中,已确认在经过1000个小时后,绝缘电阻等于或大于1×1010Ω,防止了银(Ag)的离子迁移,并保证了半导体器件的高可靠性。
本发明中的加热条件(例如加热温度)不限于上述实例。根据第一导电粘合剂20-1和第二导电粘合剂20-2的材料来适当地确定加热条件(例如加热温度)。
2、半导体器件的第二制造方法
图8A至图10I为本发明实施例半导体器件的第二制造方法的第一至第三示意图。
在本发明实施例半导体器件的第二制造方法中,仍采用在上述第一制造方法中使用的倒装芯片接合器30(参见图4A)。第二制造方法与第一制造方法不同的是,未采用调整台34。
本发明的发明人用Panasonic Factory Engineering制造的FCB2M作为倒装芯片接合器30对本发明实施例的半导体器件的第二制造方法进行了测试。
图8A是被吸附器32吸住的半导体元件12的放大示意图。半导体元件12包括用已知的半导体制造工艺形成的硅(Si)半导体衬底。在半导体元件12的外侧连接端子焊盘16上形成突起形外侧连接端子13。
例如通过使用导线接合技术的所谓球焊方法形成突起形外侧连接端子13。具体而言,通过压力固定或连接一个金(Au)球来形成底座部分,并从底座部分突出来一个突出部分,从而形成突起(突出)形外侧连接端子13。必要的话,对突起形外侧连接端子13的突出部分的顶部采用整平工艺。
本发明的发明人用具有6.5mm×6.5mm矩形平面结构的半导体元件作为半导体元件12对本发明实施例的半导体器件的制造方法进行了测试,其中以50μm的间距形成了360个用金(Au)制成的30μm高的突起形外侧连接端子13。
半导体元件12被吸附器32吸住,因此半导体元件12的形成有突起形外侧连接端子13的表面朝下,并在第一传送台33-1的上方移动,如图8B所示。
将第一导电粘合剂20-1涂覆在第一传送台33-1上。用橡胶扫帚(叶片)35-1调节第一导电粘合剂20-1的厚度,该橡胶扫帚35-1能够在图4C中白色箭头所示的方向上移动,以获得指定的厚度,例如大约10μm。
作为第一导电粘合剂20-1,使用将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂。银(Ag)的体积电阻率低,与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。例如可使用银钯(AgPd)作为主要成分为银(Ag)的混合物(金属互化物)或合金。作为粘合剂树脂,可使用环氧化合物、丙烯酸化合物、乙烯基化合物、热固性化合物(例如末端为羟氢氧基的化合物)、可溶于溶剂的树脂化合物、上述物质的混合物等等。在作为粘合剂树脂的环氧树脂中,基本成分是作为环氧固化剂的环氧基化合物,还可采用表面活性剂或者助熔剂。
本发明的发明人使用将平均颗粒直径为100nm的银(Ag)颗粒分散在环氧树脂(例如ADEKA制造的ADEKA HARDNER EH系列)中的粘合剂作为第一导电粘合剂20-1。本发明的发明人将第一导电粘合剂20-1涂覆在第一传送台33-1上,并使用橡胶扫帚(叶片)35-1调节第一导电粘合剂20-1的厚度,使得第一导电粘合剂20-1的厚度大约为10μm。
在此阶段,降低吸住半导体元件12的吸附器32,以大约4.9N的负荷(力)将半导体元件12推向第一传送台33-1,并使半导体元件12浸入第一导电粘合剂20-1。结果,将第一导电粘合剂20-1传送到半导体元件12的突起形外侧连接端子13。
在将第一导电粘合剂20-1传送到半导体元件12的突起形外侧连接端子13之后,用吸附器32吸住半导体元件12,以大约70℃到240℃的温度加热第一导电粘合剂20-1,将其暂时固化。本发明的发明人在此步骤使用吸附器32,以180℃的温度将第一导电粘合剂20-1加热90秒。
在将第一导电粘合剂20-1短时间地暂时固化后,为了提高产量,如图8C所示,将包括突起形外侧连接端子13(设置了暂时固化的第一导电粘合剂20-1)的半导体元件12取下,放入氮气(N2)环境下的炉子36中。在炉子36中,以大约200℃的温度将半导体元件12加热60分钟,从而将第一导电粘合剂20-1固化。
本发明的发明人使用Yamato Scientific Co.,Ltd制造的惰性气体炉子,在氮气(N2)环境下的炉子36中进行该加热工艺60分钟。例如,在使用导电粘合剂84-1LMISR$作为第一导电粘合剂20-1的情况下,经固化后弹性模量为大约4GPa。
为方便起见,在图8C中以放大的方式示出上述半导体元件12。
接着,用吸附器32吸住包括突起形外侧连接端子13(设置了固化的第一导电粘合剂20-1)的半导体元件12,以在第二传送台33-2上方移动,使半导体元件12的形成有突起形外侧连接端子13的表面朝下。如图9D所示。为方便起见,图9D中未示出形成在突起形外侧连接端子13上的第一导电粘合剂20-1。
将第二导电粘合剂20-2涂覆在第二传送台33-2上。用橡胶扫帚(叶片)35-2调节第二导电粘合剂20-2的厚度,橡胶扫帚35-2能够在图5D中白色箭头所示的方向上移动,以获得指定的厚度,例如大约15μm。
作为第二导电粘合剂20-2,可使用将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂。作为粘合剂树脂,可使用环氧化合物、丙烯酸化合物、乙烯基化合物、热固性化合物(例如末端为羟氢氧基的化合物)、可溶于溶剂的树脂化合物、上述物质的混合物等等。在作为粘合剂树脂的环氧树脂中,基本成分是作为环氧固化剂的环氧基化合物,还可采用表面活性剂或者助熔剂。
例如不用锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金,而是可将重量百分比在30%以上的锌(Zn)、钴(Co)、铁(Fe)、钯(Pd)、铂(Pt)或者包括这些金属的合金分散在粘合剂树脂中的粘合剂用作第二导电粘合剂20-2。
本发明的发明人使用将重量百分比在30%以上的平均颗粒直径在0.1μm以下的锡(Sn)颗粒分散在粘合剂树脂中的粘合剂作为第二导电粘合剂20-2。
在此阶段,降低吸住半导体元件12的吸附器32,以大约4.9N的负荷(力)将半导体元件12推向第二传送台33-2,并使半导体元件12浸入第二导电粘合剂20-2。结果,将第二导电粘合剂20-2传送到半导体元件12的覆盖有第一导电粘合剂20-1的突起形外侧连接端子13。
如图9E所示。此时,当通过图8C所示的步骤将第一导电粘合剂20-1固化时,第二导电粘合剂20-2没有固化而保持膏状。为方便起见,在图9E中以放大的方式示出上述半导体元件12。
接着,将半导体元件12的被第一导电粘合剂20-1覆盖的、并被传送了第二导电粘合剂20-2的突起形外侧连接端子13连接到布线板11的接合电极14,从而将半导体元件12连接到布线板11。
具体而言,降低吸住半导体元件12的吸附器32,使安装在接合台31上的布线板11的主表面与半导体12的主表面平行。
当通过吸附器32进行的加热继续时,施加负荷将半导体元件12安装在布线板11上。如图9F所示。为方便起见,在图9F中以放大的方式示出上述半导体元件12。
此时,可通过加热上述接合台32,以指定的温度加热布线板11。结果,降低了涂敷在布线板11上的底部填充材料17在后续步骤中的粘性,从而提高了底部填充材料17的流动性。
为了对本制造方法进行测试,本发明的发明人将吸附器32的加热温度设定为32至40℃,并向布线板11的接合电极14施加4.9N的负荷10秒钟。然后,本发明的发明人施加24.5N的负荷,并以220℃的温度加热60秒钟。
如上所述,在第二导电粘合剂20-2中,将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中。
因为在将半导体元件12的突起形外侧连接端子13连接到布线板11的接合电极14时施加的热,第二导电粘合剂20-2从环境中吸收氧气(O2),从而在第二导电粘合剂20-2的外表面上形成薄氧化物膜。
因此,即使银(Ag)或者包含在主要成分为银(Ag)的混合物(金属互化物)或合金中的银作为离子被洗提,通过第二导电粘合剂20-2外表面上形成的锡(Sn)氧化物膜,也能防止布线板11或底部填充材料17提供的氢氧根离子(OH-)被大量吸收到第一导电粘合剂20-1中。
因此,在本实例中,与例如日本专利No.3409957中所讨论的在半导体元件的突起形外侧连接端子的最外周部分形成银(Ag)的情况相比,能降低银离子(Ag+)与氢氧根离子(OH-)相结合的情况的比率。因此,能防止由于枝状晶体的形成造成的离子迁移,并防止由于银(Ag)的离子迁移造成半导体元件12与布线板11之间的短路。
对于布线板11的接合电极14和被第一导电粘合剂20-1覆盖的、并被传送了第二导电粘合剂20-2的突起形外侧连接端子13,第二导电粘合剂20-2并没有固化。因此,当从吸附器32施加负荷用于连接时,第二导电粘合剂20-2的下侧部分(位于突起形外侧连接端子13的顶端)向外移动。如图10G所示,如果施加的负荷超过指定负荷,则第一导电粘合剂20-1的下表面(也就是在后续步骤中连接布线板11的接合电极14的表面)以第一导电粘合剂20-1被第二导电粘合剂20-2包围的方式暴露。这里,图10G为从接合电极的上表面(即接合电极14连接导电粘合剂20的表面)侧观察时图9F所示导电粘合剂20的示意图。
这样,在第二导电粘合剂20-2中,将锡(Sn)或者主要成分为锡(Sn)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中。此外,作为第一导电粘合剂20-1,使用将银(Ag)或者主要成分为银(Ag)的混合物(金属互化物)或合金作为导电填充物分散在粘合剂树脂中的粘合剂。银(Ag)的体积电阻率低,并且与形成半导体元件12的突起形外侧连接端子13的金(Au)之间的接触电阻低。即使第二导电粘合剂20-2的体积电阻率高,第一导电粘合剂20-1也基本上暴露在连接布线板11的接合电极14的表面的中央。因此,在将半导体元件12连接到布线板11的后续步骤中,能可靠地实现半导体元件12的突起形外侧连接端子13与布线板11的接合电极14之间的电传导性。
之后,如图10H所示,通过分配器37将膏状底部填充材料17涂在半导体元件12与安装并固定在接合台31上的布线板11之间。作为底部填充材料17,可使用环氧树脂、聚酰亚胺树脂、丙烯酸树脂、硅树脂或者其它热固性绝缘树脂。在底部填充材料17中可包括由银(Ag)、焊料或镍(Ni)制成的导电颗粒。
本发明的发明人提供Emerson & Cuming制造的E-1206作为布线板11与半导体元件12之间的底部填充材料17,在氮气(N2)环境下的炉子中以150℃的温度将其加热1小时,以使底部填充材料17固化。
这样,通过倒装芯片(朝下)的方法,将半导体元件12安装并固定在布线板11的主表面上。此外,至少将半导体元件12的突起形外侧连接端子13的突出部分和布线板上的与突出部分对应的接合电极14都覆盖上具有上述双层结构的导电粘合剂20。这样,至少将突起形外侧连接端子13的突出部分与接合电极14相互机械连接并电连接。之后,通过吸附器32松开半导体元件12,吸附器32升高。
然后,在布线板11的后表面,即与安装了多个半导体元件12的表面相对的表面,以栅格的方式设置外侧连接端子15,例如由锡(Sn)-银(Ag)焊料或者锡(Sn)-银(Ag)-铜(Cu)制成的焊料球。
之后,用切割刀片等工具将布线板11切割成多个安装有半导体元件12的部分。结果,形成以倒装芯片方式将半导体元件12安装在布线板11上的半导体器件10。
如果半导体元件12必须采用密封工艺,例如在将布线板11切割成片之前,则在布线板11的安装了半导体元件12的表面上进行树脂密封工艺。在进行树脂密封工艺之后,在厚度方向上将布线板11和密封树脂部分切割成安装有半导体元件12的多个部分。这样就能形成经树脂密封并切割后的半导体器件。
这样,在通过上述制造方法形成的半导体器件10中设置粘合剂20。粘合剂20具有双层结构,其中第二导电粘合剂20-2形成在第一导电粘合剂20-1外侧以覆盖第一导电粘合剂20-1的外周表面。第一导电粘合剂20-1暴露在导电粘合剂20连接布线板11的接合电极14的表面上。因此,能可靠地实现半导体元件12的突起形外侧连接端子13与布线板11的接合电极14之间的传导性。
此外,通过第二导电粘合剂20-2外表面上形成的锡(Sn)氧化物膜,能防止布线板11或底部填充材料17提供的氢氧根离子(OH-)被大量吸收到第一导电粘合剂20-1中。因此,能防止由于枝状晶体的形成造成离子迁移,并防止由于银(Ag)的离子迁移造成半导体元件12与布线板11之间的短路。
因此,即使不能避免半导体元件的突起形外侧连接端子的窄间距连接这样的情况,也能保证半导体器件的高可靠性。因此,本发明实施例有助于安装了半导体器件的电子设备的高功能性。
根据本发明的发明人进行的测试,在通过本发明实施例的制造方法制造的半导体器件中,已确认在经过1000个小时后,绝缘电阻等于或大于1×1010Ω,防止了银(Ag)的离子迁移,并保证了半导体器件的高可靠性。
本发明中的加热条件(例如加热温度)不限于上述实例。根据第一导电粘合剂20-1和第二导电粘合剂20-2的材料来适当地确定加热条件(例如加热温度)。
虽然为了完整、清楚地公开而针对具体实施例描述了本发明,但是所附权利要求书不因此受限,而是应解释为包含实施本领域技术人员可想到的、适当落入这里提出的基本教导的所有变型和替代结构。
本专利申请基于2007年3月2日提出的日本在先专利申请No.2007-52788,在此通过参考将该专利申请的全部内容并入。
Claims (19)
1.一种半导体器件,其中半导体元件的外侧连接端子与布线板的电极通过导电粘合剂互相连接,所述导电粘合剂包括:
第一导电粘合剂,直接连接到所述布线板的所述电极;以及
第二导电粘合剂,覆盖所述第一导电粘合剂没有直接与所述布线板的所述电极相连接的部分;
氧化物膜,形成于所述第二导电粘合剂外侧;
其中,所述第一导电粘合剂包含导电填充物,所述导电填充物包括银;以及
所述第二导电粘合剂包含导电填充物,所述导电填充物包括从锡、锌、钴、铁、钯和铂组成的群组中选择的金属。
2.如权利要求1所述的半导体器件,
其中,所述第二导电粘合剂还包括树脂。
3.如权利要求1所述的半导体器件,
其中,所述第一导电粘合剂的所述导电填充物为银或者含银的混合物或合金。
4.如权利要求1所述的半导体器件,
其中,所述第二导电粘合剂的所述导电填充物为锡或者含锡的混合物或合金。
5.如权利要求2所述的半导体器件,
其中,所述树脂由热固性化合物制成。
6.如权利要求1所述的半导体器件,还包括:
底部填充材料,位于所述半导体元件与所述布线板之间的间隙内。
7.如权利要求6所述的半导体器件,
其中,所述底部填充材料由从环氧树脂、聚酰亚胺树脂、丙烯酸树脂、硅树脂组成的群组中选择的材料制成。
8.一种半导体器件的制造方法,包括:
在半导体元件的外侧连接端子上形成包含导电填充物的第一导电粘合剂,该第一导电粘合剂直接连接到布线板的电极,所述导电填充物包括银;
在所述第一导电粘合剂的表面上形成第二导电粘合剂,所述第二导电粘合剂包含导电填充物,所述导电填充物包括从锡、锌、钴、铁、钯、铂组成的群组中选择的金属;其中所述第二导电粘合剂覆盖所述第一导电粘合剂没有直接与所述布线板的所述电极相连接的部分,所述第二导电粘合剂外侧形成有氧化物膜;以及
通过由所述第一导电粘合剂和所述第二导电粘合剂组成的导电粘合剂,将所述半导体元件的所述外侧连接端子连接到在布线板上形成的电极。
9.如权利要求8所述的半导体器件的制造方法,还包括:
在形成所述第一导电粘合剂之后,将所述第一导电粘合剂固化。
10.如权利要求8所述的半导体器件的制造方法,还包括:
在形成所述第二导电粘合剂之后,将所述第二导电粘合剂固化。
11.如权利要求10所述的半导体器件的制造方法,
其中,当通过调整工艺施加力时,将所述第二导电粘合剂固化。
12.如权利要求8所述的半导体器件的制造方法,还包括:
在将所述半导体元件的所述外侧连接端子连接到在所述布线板上形成的所述电极之前,在所述布线板上提供底部填充材料。
13.如权利要求8所述的半导体器件的制造方法,还包括:
在将所述半导体元件的所述外侧连接端子连接到在所述布线板上形成的所述电极之后,向所述半导体元件与所述布线板之间的间隙提供底部填充材料。
14.如权利要求8所述的半导体器件的制造方法,
其中,通过加热来将所述半导体元件的所述外侧连接端子连接到在所述布线板上形成的所述电极;
在所述加热的过程中,在所述第二导电粘合剂的外表面上形成包含在所述第二导电粘合剂中的金属的氧化物膜。
15.如权利要求8所述的半导体器件的制造方法,
其中,所述第一导电粘合剂的所述导电填充物为银或者含银的混合物或合金。
16.如权利要求8所述的半导体器件的制造方法,
其中,所述第二导电粘合剂的所述导电填充物为锡或者含锡的混合物或合金。
17.如权利要求8所述的半导体器件的制造方法,
其中,所述第二导电粘合剂还包括树脂。
18.如权利要求17所述的半导体器件的制造方法,
其中,所述树脂是由热固性化合物制成。
19.如权利要求12所述的半导体器件的制造方法,
其中,所述底部填充材料由从环氧树脂、聚酰亚胺树脂、丙烯酸树脂、硅树脂组成的群组中选择的材料制成。
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Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008218643A (ja) * | 2007-03-02 | 2008-09-18 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP5154516B2 (ja) * | 2009-05-22 | 2013-02-27 | シャープ株式会社 | 太陽電池モジュール及び太陽電池モジュールの製造方法 |
US8222739B2 (en) * | 2009-12-19 | 2012-07-17 | International Business Machines Corporation | System to improve coreless package connections |
JP2011187681A (ja) * | 2010-03-09 | 2011-09-22 | Toshiba Corp | 半導体装置の製造方法および半導体装置 |
JP5827461B2 (ja) * | 2010-09-21 | 2015-12-02 | 株式会社東芝 | 導電性接合材とそれを用いた接合体、及びその接合体の製造方法 |
JP2012256679A (ja) | 2011-06-08 | 2012-12-27 | Elpida Memory Inc | 半導体装置及びその製造方法 |
US9269681B2 (en) * | 2012-11-16 | 2016-02-23 | Qualcomm Incorporated | Surface finish on trace for a thermal compression flip chip (TCFC) |
DE102012222416A1 (de) | 2012-12-06 | 2014-06-12 | Robert Bosch Gmbh | Verfahren zum Verbinden von wenigstens zwei Komponenten unter Verwendung eines Sinterprozesses |
US20140159758A1 (en) * | 2012-12-12 | 2014-06-12 | Qualcomm Incorporated | Assembly for optical backside failure analysis of package-on-package (pop) during electrical testing |
EP2884242B1 (en) * | 2013-12-12 | 2021-12-08 | ams International AG | Sensor Package And Manufacturing Method |
DE102014113697A1 (de) * | 2014-09-23 | 2016-04-07 | Infineon Technologies Austria Ag | Verfahren mit Inkjet-Prozessen und deren Anwendung |
US20160190045A1 (en) * | 2014-12-24 | 2016-06-30 | Rohm Co., Ltd. | Semiconductor device and method of making the same |
KR102321555B1 (ko) * | 2016-08-10 | 2021-11-03 | 파나소닉 아이피 매니지먼트 가부시키가이샤 | 봉지용 아크릴 조성물, 시트재, 적층 시트, 경화물, 반도체 장치 및 반도체 장치의 제조 방법 |
EP4099807A1 (en) * | 2021-06-01 | 2022-12-07 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carrier interconnection and manufacturing method |
Family Cites Families (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0918121A (ja) * | 1995-06-27 | 1997-01-17 | S I I R D Center:Kk | 電子部品実装体及びその製造方法 |
JP2951882B2 (ja) * | 1996-03-06 | 1999-09-20 | 松下電器産業株式会社 | 半導体装置の製造方法及びこれを用いて製造した半導体装置 |
JP3409957B2 (ja) * | 1996-03-06 | 2003-05-26 | 松下電器産業株式会社 | 半導体ユニット及びその形成方法 |
JPH10303252A (ja) * | 1997-04-28 | 1998-11-13 | Nec Kansai Ltd | 半導体装置 |
US6651320B1 (en) * | 1997-10-02 | 2003-11-25 | Matsushita Electric Industrial Co., Ltd. | Method for mounting semiconductor element to circuit board |
US6251211B1 (en) * | 1998-07-22 | 2001-06-26 | Micron Technology, Inc. | Circuitry interconnection method |
JP2001189337A (ja) * | 1999-12-28 | 2001-07-10 | Matsushita Electric Ind Co Ltd | 電極バンプおよびそれを用いた半導体素子並びに半導体装置 |
JP3625268B2 (ja) * | 2000-02-23 | 2005-03-02 | 富士通株式会社 | 半導体装置の実装方法 |
GB2365816B (en) * | 2000-08-09 | 2002-11-13 | Murata Manufacturing Co | Method of bonding conductive adhesive and electrode,and bonded structure |
CN1273249C (zh) * | 2000-10-02 | 2006-09-06 | 旭化成电子材料元件株式会社 | 基本不含铅的金属合金颗粒及其生产方法和用途 |
KR100371567B1 (ko) * | 2000-12-08 | 2003-02-07 | 삼성테크윈 주식회사 | Ag 선도금을 이용한 반도체 패키지용 리드프레임 |
JP3682227B2 (ja) | 2000-12-27 | 2005-08-10 | 株式会社東芝 | 電極の形成方法 |
JP2002231860A (ja) | 2001-01-31 | 2002-08-16 | Kyocera Corp | 電子部品装置 |
US6808958B2 (en) * | 2001-03-07 | 2004-10-26 | Tessera, Inc. | Methods of bonding microelectronic elements |
JP4483131B2 (ja) | 2001-05-29 | 2010-06-16 | パナソニック株式会社 | 実装構造体及びその実装方法 |
JP2003031916A (ja) * | 2001-07-19 | 2003-01-31 | Alps Electric Co Ltd | 印刷配線基板 |
JP3787295B2 (ja) * | 2001-10-23 | 2006-06-21 | ローム株式会社 | 半導体装置 |
US6791839B2 (en) * | 2002-06-25 | 2004-09-14 | Dow Corning Corporation | Thermal interface materials and methods for their preparation and use |
JP2004087975A (ja) * | 2002-08-28 | 2004-03-18 | Fujikura Ltd | 多層配線基板、多層配線基板用基材およびその製造方法 |
ATE547494T1 (de) * | 2002-09-04 | 2012-03-15 | Namics Corp | Leitfähiger klebstoff und ihn enthaltender schaltkreis |
JP2004103716A (ja) * | 2002-09-06 | 2004-04-02 | Fujikura Ltd | 多層配線基板、多層配線基板用基材およびその製造方法 |
JP4390541B2 (ja) * | 2003-02-03 | 2009-12-24 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
WO2004105120A1 (ja) * | 2003-05-20 | 2004-12-02 | Fujitsu Limited | Lsiパッケージ及びlsi素子の試験方法及び半導体装置の製造方法 |
JP5157038B2 (ja) * | 2004-11-01 | 2013-03-06 | 株式会社デンソー | 導電性接着剤およびそれを用いた電子装置 |
WO2006109573A1 (ja) * | 2005-04-01 | 2006-10-19 | Asahi Kasei Emd Corporation | 導電性フィラー、及びはんだ材料 |
US8033016B2 (en) * | 2005-04-15 | 2011-10-11 | Panasonic Corporation | Method for manufacturing an electrode and electrode component mounted body |
JP2006324543A (ja) * | 2005-05-20 | 2006-11-30 | Nec Electronics Corp | 固体撮像装置 |
JP5034206B2 (ja) * | 2005-10-03 | 2012-09-26 | 株式会社デンソー | 導電性接着剤 |
JP4897697B2 (ja) * | 2005-11-02 | 2012-03-14 | パナソニック株式会社 | 導電性接着剤 |
WO2008065926A1 (fr) * | 2006-11-28 | 2008-06-05 | Panasonic Corporation | Structure de montage de composant électronique et procédé de fabrication correspondant |
JP2008218463A (ja) | 2007-02-28 | 2008-09-18 | Toray Eng Co Ltd | 実装方法及び実装装置 |
JP2008218643A (ja) * | 2007-03-02 | 2008-09-18 | Fujitsu Ltd | 半導体装置及びその製造方法 |
CN101601127B (zh) * | 2007-03-23 | 2011-02-16 | 松下电器产业株式会社 | 导电性凸起及其制造方法以及电子部件安装结构体 |
JP5373464B2 (ja) * | 2008-04-23 | 2013-12-18 | パナソニック株式会社 | 導電性ペーストおよびこれを用いた実装構造体 |
US20090301771A1 (en) * | 2008-06-04 | 2009-12-10 | Shozo Ochi | Conductive bump, method for forming the same, and electronic component mounting structure using the same |
-
2007
- 2007-03-02 JP JP2007052788A patent/JP2008218643A/ja active Pending
-
2008
- 2008-02-27 US US12/038,444 patent/US7709293B2/en not_active Expired - Fee Related
- 2008-02-29 CN CN2008100823643A patent/CN101256996B/zh not_active Expired - Fee Related
- 2008-02-29 KR KR1020080018757A patent/KR100958857B1/ko not_active IP Right Cessation
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2010
- 2010-02-25 US US12/712,489 patent/US7956468B2/en not_active Expired - Fee Related
Also Published As
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US20080211095A1 (en) | 2008-09-04 |
US7709293B2 (en) | 2010-05-04 |
US20100148368A1 (en) | 2010-06-17 |
KR20080080932A (ko) | 2008-09-05 |
KR100958857B1 (ko) | 2010-05-20 |
CN101256996A (zh) | 2008-09-03 |
JP2008218643A (ja) | 2008-09-18 |
US7956468B2 (en) | 2011-06-07 |
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