CN101252093B - 电子元件和电子装置的制造方法、电子元件以及电子装置 - Google Patents

电子元件和电子装置的制造方法、电子元件以及电子装置 Download PDF

Info

Publication number
CN101252093B
CN101252093B CN2007101597560A CN200710159756A CN101252093B CN 101252093 B CN101252093 B CN 101252093B CN 2007101597560 A CN2007101597560 A CN 2007101597560A CN 200710159756 A CN200710159756 A CN 200710159756A CN 101252093 B CN101252093 B CN 101252093B
Authority
CN
China
Prior art keywords
electronic component
solder sheet
electrode
circuit board
scolder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2007101597560A
Other languages
English (en)
Other versions
CN101252093A (zh
Inventor
海沼则夫
石川邦子
吉良秀彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of CN101252093A publication Critical patent/CN101252093A/zh
Application granted granted Critical
Publication of CN101252093B publication Critical patent/CN101252093B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/06Soldering, e.g. brazing, or unsoldering making use of vibrations, e.g. supersonic vibrations
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0008Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016Brazing of electronic components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/742Apparatus for manufacturing bump connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3478Applying solder preforms; Transferring prefabricated solder patterns
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • B23K2101/40Semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1182Applying permanent coating, e.g. in-situ coating
    • H01L2224/11822Applying permanent coating, e.g. in-situ coating by dipping, e.g. in a solder bath
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/75251Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525Means for applying energy, e.g. heating means
    • H01L2224/75252Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009Pre-treatment of the bump connector or the bonding area
    • H01L2224/8101Cleaning the bump connector, e.g. oxide removal step, desmearing
    • H01L2224/81011Chemical cleaning, e.g. etching, flux
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009Pre-treatment of the bump connector or the bonding area
    • H01L2224/81024Applying flux to the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01009Fluorine [F]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10984Component carrying a connection agent, e.g. solder, adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0285Using ultrasound, e.g. for cleaning, soldering or wet treatment
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0338Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

本发明提供电子元件和电子装置的制造方法。电子元件配置有电极凸起,所述电极凸起使得可以在无需使用焊料来覆盖电路板的连接焊盘的情况下安装电子元件,并且可以在防止安装过程中连接电极发生电短路的同时以窄间距设置电路板的连接焊盘。配置有其中用焊料覆盖电极凸起的连接电极的电子元件的制造方法包括以下步骤:将焊料片加热到半熔化状态并将电子元件压到焊料片上,以使电极凸起与焊料片接触;并且将电子元件从电极凸起与焊料片接触的位置退回,以将焊料转印到与焊料片接触的电极凸起的外表面上。

Description

电子元件和电子装置的制造方法、电子元件以及电子装置
技术领域
本发明涉及一种电子元件及其制造方法,所述电子元件配置有其中用焊料覆盖电极凸起的连接电极,并且还涉及通过将这种电子元件安装到电路板上而产生的电子装置及其制造方法。
背景技术
通过芯片倒装接合将半导体芯片安装在电路板上的方法包括:在半导体芯片的电极上形成用于连接的焊料突块(solder bump)以将半导体芯片接合到电路板的方法;和用焊料覆盖电路板上形成的连接焊盘并且将半导体芯片的电极和连接焊盘对准并接合的方法。
在半导体芯片的电极上形成焊料突块的方法包括:在载体芯片上按点的形式形成焊料层并将焊料层转印到半导体芯片的电极上的方法(参见专利文献1);和在加热电极以熔化焊料并使焊料粘附到电极的状态下,通过使焊料片接触半导体芯片的电极来形成焊料突块的方法(参见专利文献2)。
用焊料覆盖电路板的连接焊盘的方法包括焊膏印刷和焊料镀敷。在用焊料覆盖电路板的连接焊盘并将电路板接合到半导体芯片的方法中,对于半导体芯片的电极具有极窄间距的情况,存在以下方法:在半导体芯片的电极上形成凸起的柱状突块(stud bump)(“电极凸起”),将细焊料粉粘到电路板的连接焊盘上,熔化连接焊盘上的焊料,以将电极凸起和连接焊盘进行接合(参见专利文献5)。
专利文献1
日本特开平H10-229087号公报
专利文献2
日本特开平H8-203904号公报
专利文献3
日本特开平H11-163199号公报
专利文献4
日本特开平H10-70153号公报
专利文献5
日本特开平2000-77471号公报
发明内容
如上所述,通过预先用焊料覆盖电路板的连接焊盘的方法,必须在基板上执行诸如焊膏印刷或焊料镀敷的处理,这增加了制造成本。而且,当半导体芯片的电极具有极窄的间距时,电路板的连接焊盘也将具有窄间距,这增大了焊料导致连接焊盘发生电短路的可能性。
而且,当将半导体芯片接合到电路板时对半导体芯片加热。由于与电路板相比,半导体芯片具有高导热率,因此存在以下问题:当施加到电路板的连接焊盘上的焊料熔化时,焊料向上流到电极凸起上,这使得半导体芯片的接合不可靠。
鉴于上述问题设计了本发明,本发明的目的是提供一种配置有以窄间距形成的电极凸起的电子元件,其使得用焊料覆盖电路板的连接焊盘的处理没有必要,并且使得能够以窄间距设置电路板的连接焊盘,并且本发明要提供的是一种能够在避免连接电极之间的电短路的情况下进行安装的电子元件。本发明的另一个目的是提供一种制造这种电子元件的方法、使用这种电子元件的电子装置、以及制造这种电子装置的方法。
为了实现所述目的,根据本发明的制造方法制造配置有用焊料覆盖电极凸起的连接电极的电子元件,该制造方法包括以下步骤:将焊料片加热到半熔化状态并将电子元件按压到焊料片上,以使电极凸起与焊料片接触;以及将电子元件从电极凸起接触焊料片的位置退回,以将焊料转印到与焊料片接触的电极凸起的外表面上。
在此,可由加热台支承焊料片,可由加热头支承电子元件,并且可通过加热台和加热头将焊料片和电子元件压在一起,以将电极凸起压到焊料片上,由此令人满意地将焊料从焊料片转印到电极凸起。
加热台和加热头可将焊料片加热到达到半熔化状态的温度,并且可将加热台的加热温度设置得高于加热头的加热温度。通过这样做,可以可靠地用焊料覆盖电极凸起。
而且,当将电极凸起压到焊料片上时,可以向电子元件施加超声波。通过这样做,可以在不提高焊料片的加热温度的情况下将焊料转印到电极凸起。
以下方法也是有效的:由加热台支承焊料片,由超声波头支承电子元件,由加热台和超声波头将焊料片和电子元件压在一起,并且在利用超声波头向电子元件施加超声波的同时将电极凸起压到焊料片上。
而且,通过在氮环境中执行向电子元件施加超声波来将电极凸起压到焊料片上的操作,可以防止电极凸起上形成的焊料的接触腐蚀。
针对通过将配置有连接电极(其中用焊料覆盖电极凸起)的电子元件安装到电路板(在其上形成有连接焊盘)上(通过将连接电极接合到连接焊盘来进行安装)来制造电子装置的方法,所述电子元件是通过以下步骤形成的:将焊料片加热到半熔化状态,并将电子元件压到焊料片上,以使电极凸起与焊料片接触,之后将电子元件从电极凸起接触焊料片的位置退回,以将焊料转印到接触焊料片的电极凸起的外表面上;制造电子装置的方法包括以下步骤:将电子元件的连接电极和电路板的连接焊盘对准,并将其加热到焊料熔化的温度,以接合电子元件和电路板。
使用以下电子元件作为所述电子元件是有效的:其中,在将电极凸起压到焊料片上时,通过向电子元件施加超声波而将焊料从焊料片转印到电极凸起。
可在加热台上支承电路板,可在安装加热头上支承电子元件,可将加热台至少加热到焊料的熔点,并且可将安装加热头的加热温度设置得低于加热台的温度,以接合电子元件和电路板。通过这样做,可以防止焊料向上流到电极凸起上,并由此可靠地接合电极凸起和连接焊盘。
可预先向电路板的将安装电子元件的区域上施加助焊剂(flux)填充物,可将电子元件的连接电极和电路板的连接焊盘对准,可将电子元件和电路板加热到焊料熔化的温度,并且可对助焊剂填充物进行热固化以接合电子元件和电路板。通过这样做,可以可靠地将电极凸起和连接焊盘进行接合,以密封电子元件和电路板的接合部分,并且可靠地支承电子元件和电路板的接合部分。
作为配置有其中用焊料覆盖电极凸起的连接电极的电子元件,可令人满意地使用通过包括以下步骤的制造方法所形成的电子元件:将焊料片加热到半熔化状态,并将电子元件压到焊料片上,以使电极凸起与焊料片接触;并将电子元件从电极凸起接触焊料片的位置退回,以将焊料转印到接触焊料片的电极凸起的外表面上。
针对通过将配置有连接电极(其中用焊料覆盖电极凸起)的电子元件安装到电路板(其上形成有连接焊盘)上(通过将连接电极接合到连接焊盘来进行安装)而形成的电子装置,令人满意的是,通过以下步骤来形成电子元件:将焊料片加热到半熔化状态并将电子元件压到焊料片上,以使电极凸起与焊料片接触,之后将电子元件从电极凸起接触焊料片的位置退回,以将焊料转印到接触焊料片的电极凸起的外表面上,并且通过包括以下步骤的制造方法来形成电子装置:将电子元件的连接电极和电路板的连接焊盘对准,并将其加热到使焊料熔化的温度以将电子元件和电路板相接合。
利用根据本发明的电子元件和电子装置的制造方法,通过将焊料从焊料片转印到电子元件的电极凸起以形成用于在电子元件上安装的连接端子,可以容易地在电子元件上形成连接电极。也可以防止电极凸起的电短路,从而即使是在其上以极窄间距形成电极凸起的电子元件也可以可靠地安装。而且,通过在电子元件上形成连接电极,可以在防止连接焊盘的电短路的同时,容易地制造其上按高密度形成有连接焊盘的电路板。
附图说明
图1A至1C是示出了根据电子元件制造方法的第一实施方式的制造处理的示意图;
图2A至2C是示出了电子元件制造方法的第二实施方式中的制造处理的示意图;
图3A至3C是示出了防止电极凸起的接触腐蚀的一个实施例的示意图;以及
图4A至4C是示出了电子装置制造方法的示意图。
具体实施方式
电子元件制造方法:第一实施方式
图1A至1C示出了电子元件的制造处理,在电子元件上通过用焊料覆盖半导体芯片的电极凸起的外表面来形成连接电极。图1A示出了在半导体芯片10的电极上已形成了电极凸起12的状态。通过所谓“球焊(ballbonding)”的方法形成电极凸起12。通过使用焊头(bonding tool)熔化金属线来形成球状部分12a,将半导体芯片10的各个电极(未示出)按压为接触球状部分12a,并且通过在金属线上进行拉动的同时切割金属线来形成凸起部分12b。在略为平坦的球状部分12a上的顶端形成凸起部分12b。
在根据本发明的电子元件的制造方法中,通过使用焊料片20以焊料覆盖半导体芯片10上形成的电极凸起12的外表面,形成连接电极。图1A示意性示出了半导体芯片10(其上已形成电极凸起12)和焊料片20。作为焊料片20,提供有各种厚度的产品作为轧辊(mill roll)。在此,应该根据要用焊料覆盖的电极凸起12部分的高度来选择适当厚度的焊料片20。
由于本实施方式中的半导体芯片10的电极凸起12的高度大约为30μm,因此将50μm厚的片用作焊料片20。本实施方式中所使用的焊料片20由Sn-Ag(锡-银)焊料制成,并且其熔点为220℃。
图1B示出了以下处理:将半导体芯片10压到焊料片20上,使得电极凸起12的凸起部分12b穿入并埋入焊料片20中。在加热台30上支承并加热焊料片20,通过安装/加热头32上的吸力保持半导体芯片10。将半导体芯片10的其上形成有电极凸起12的表面与支承在加热台30上的焊料片20的表面平行设置,并且将安装/加热头32压向焊料片20。
通过安装/加热头32和加热台30将半导体芯片10和焊料片20压到一起,并将半导体芯片10上的电极凸起12的凸起部分12b压入焊料片20。由于电极凸起12形成为使得凸起部分12b从球状部分12a向外伸出,因此,当将凸起部分12b埋入焊料片20时,电极凸起12的***位置受到限制。
在图1B所示的处理中,对加热台30和安装/加热头32进行加热和控制,使得焊料片20变成半熔化。在此,“半熔化”指的是等于或低于熔化温度且焊料片20***的温度范围。这是处于焊料全硬和焊料为液态之间的中间状态,或者换句话说是固态焊料和液态焊料同时存在的状态。在该半熔化阶段,焊料片保持板状状态。在本实施方式中使用的Sn-Ag焊料的熔点为220℃,在大约170℃开始半熔化状态。
为了使焊料片20处于半熔化状态并将焊料从焊料片20转印到电极凸起12,将本实施方式中的安装/加热头32的温度设置在大约150℃,并将加热台30的温度设置在大约190℃。将安装/加热头32的温度设置得低于加热台30的温度,使得焊料不会过多转印到电极凸起12。如果安装/加热头32的温度升高到大约焊料的熔点,则当电极凸起12与焊料片20接触时,焊料将上升到电极凸起12的外表面上,导致粘附到电极凸起12的转印焊料的量的增加。因此,应该将安装/加热头32的加热温度设置在焊料片20的半熔化温度范围的低端或者略低于半熔化温度范围。另一方面,将加热台30设置在焊料的半熔化温度范围的高端。这样,电极凸起12更容易穿入焊料片20,从而焊料能够更容易地粘附到电极凸起12。
图1C示出了在图1B中的处理之后半导体芯片10已从焊料片20分离的状态。焊料20a覆盖半导体芯片10上的电极凸起12的凸起部分12b(其***焊料片20)的外表面,从而产生形成了用于连接电子元件的连接电极14的电子元件。在焊料片20中形成有电极凸起12的凸起部分12b所***的凹陷部分21。
覆盖电极凸起12的凸起部分12b的焊料20a的厚度平均为2至3μm,并具有大约5μm的最大值。通过使焊料20a以该厚度粘附到电极凸起12上,可以可靠地将电路板上形成的连接焊盘焊接到电极凸起12。
本实施方式的该方法(其中使焊料片20处于半熔化状态,并且将焊料从焊料片20转印到电极凸起12以形成连接电极14)具有可以容易地在半导体芯片10上形成连接电极的优点。由于电极凸起12薄薄地覆盖有焊料20a,因此与其中将焊料熔化并粘附到电极以形成焊料突块的方法相比,具有以下优点:即使以极窄的间距形成电极凸起12,也可以在不使电极凸起12发生电短路的情况下形成连接电极。
电子元件制造方法:第二实施方式
图2A至2C示出了利用焊料片20将焊料转印到半导体芯片10的电极上设置的电极凸起12的第二实施方式。
在本实施方式中,通过超声波头40上的吸力保持半导体芯片10,并且当将焊料从焊料片20转印到半导体芯片10的电极凸起12上时,向半导体芯片10施加超声波,以将焊料转印到电极凸起12上。
图2A示出了以下状态:其中,在加热台30上支承焊料片20,通过超声波头40上的吸力保持半导体芯片10,电极凸起12与焊料片20相对。图2B示出了以下状态:其中,将半导体芯片10压到加热台30上支承的焊料片20上,在电极凸起12的凸起部分12b已穿入焊料片20的状态下通过超声波头40施加超声波。在此,作为在凸起部分12b已穿入焊料片20的状态下施加超声波振动的时间,大约0.5秒就足够了。
以与第一实施方式相同的方式,由加热台30将焊料片20加热到半熔化状态,由超声波头40对半导体芯片10进行加热,从而将焊料从焊料片20转印到电极凸起12。当像本实施方式那样通过向半导体芯片10施加超声波来转印焊料时,与未使用超声波振动的情况相比,可以在加热台30的加热温度设置得更低的情况下转印焊料。例如,当焊料片20由本实施方式中所使用的Sn-Ag焊料制成时,可将加热台30的加热温度设置在大约170℃。在此,我们相信,当使电极凸起12与焊料片20接触并向半导体芯片10施加超声波振动时,温度将由于电极凸起12接触焊料片20的部位的摩擦而上升。
由于可以像本实施方式那样通过向半导体芯片10施加超声波来将焊料从焊料片20转印到电极凸起12的方法从而降低焊料片20的加热温度,因此与第一实施方式相比,具有焊料片20更令人满意地保持其形状的优点,这使得更容易处理焊料片20。当向半导体芯片10施加超声波振动时,电极凸起12的已穿入焊料片20的凸起部分12b与焊料片20产生摩擦,从而可以可靠地将焊料转印到凸起部分12b上与焊料片20接触的部分。
图2C示出了其中已将焊料20a从焊料片20转印到电极凸起12的凸起部分12b以形成连接电极14的电子元件,并且还示出了转印焊料之后的焊料片20。同样,在本实施方式中,由于在焊料片20处于半熔化状态的情况下由焊料20a覆盖电极凸起12,因此焊料20a仅薄薄地粘附到凸起部分12b的外表面,由此,即使以窄间距设置电极凸起12,也可防止电极凸起12的电短路。
但是,当向半导体芯片10施加超声波以将焊料从焊料片20转印到电极凸起12时,存在以下情况:电极凸起12和焊料片20之间的摩擦导致接触腐蚀,这在电极凸起12和焊料的接触部分上产生氧化膜。由于当形成了氧化膜时焊料变暗,因此可以容易地识别出转印到电极凸起12上的焊料20a上是否已产生氧化膜。
为了防止发生接触腐蚀,应该在非氧化环境下执行向半导体芯片10施加超声波并且将焊料从焊料片20转印到电极凸起12的操作。更具体地说,可将转印焊料的区域从外部隔离,并且在氮环境下执行该区域的操作。作为一种简单方法,当由超声波头40施加超声波且将半导体芯片10压到焊料片20上时,可以向半导体芯片10与焊料片20的接触部分吹氮气。
图3A示出了在电极凸起12的凸起部分12b已穿入焊料片20的状态下向电极凸起12施加超声波振动的状态。图3B示意性示出了已发生接触腐蚀且覆盖电极凸起12的凸起部分12b的焊料20a已发生氧化的状态。另一方面,图3C示出了通过在氮环境下将焊料20a转印到电极凸起12上从而在焊料20a不变暗且不产生氧化膜的情况下转印焊料20a的状态。
以此方式,根据在氮环境下向半导体芯片10施加超声波以将焊料从焊料片20转印到电极凸起12上的方法,可以抑制覆盖电极凸起12的焊料20a的氧化,这意味着当安装电子元件时可以可靠地执行焊接。
注意,尽管在上述实施方式中已经对其中通过在半导体芯片10的电极上进行球焊来形成电极凸起12的电子元件的实施例进行了说明,但本发明并不限于通过球焊形成的在半导体芯片10的电极上形成的电极凸起12。而且,尽管在上述实施方式中已经对其中电极凸起12由球形部分12a和凸起部分12b形成的实施例进行了说明,但在半导体芯片10的电极上形成的电极凸起的形状并不限于上述实施方式中的形状。但是,在根据本发明的电子元件的制造方法中,由于在其中电极凸起的至少前端部分穿入焊料片20的状态下将焊料转印到电极凸起,因此对于要以尖状形成电极凸起的凸起部分的前端是有效的。
电子装置的制造方法:第三实施方式
图4A至4C示出了将其中已经通过用焊料20a覆盖电极凸起12而形成连接电极14的电子元件安装在电路板上以组装电子装置的制造处理的实施例。通过将半导体芯片10倒装接合到电路板50并且利用树脂将半导体芯片10与电路板50的接合部分密封以将半导体芯片10固定在电路板50上,形成根据本实施方式的电子装置。
根据本实施方式的电子装置的制造方法在预先向电路板50的将要安装半导体芯片10的区域施加助焊剂填充物60之后,通过倒装接合将半导体芯片10安装在电路板50上。
图4A示出了已在电路板50的将安装半导体芯片10的区域上施加了助焊剂填充物60的状态。在电路板50的安装半导体芯片10的位置处形成连接焊盘52,使得连接焊盘52的位置与作为半导体芯片10上形成的连接部分的电极凸起12的平面排列相匹配。
助焊剂填充物60用作当将半导体芯片10安装到电路板50上时确保电极凸起12和连接焊盘52之间的充分接合的助焊剂,并且,在已将半导体芯片10安装到电路板50上之后,助焊剂填充物60还用作填充半导体芯片10与电路板50之间的间隙并在电路板50上固定且支承半导体芯片10的底层树脂(underfill resin)。
图4B示出了以下状态:其中,电路板50放置在加热台70上,半导体芯片10由用于安装的加热头80上的吸力保持,且位于电路板50上并接合到电路板50。将半导体芯片10的电极凸起12和电路板50上形成的连接焊盘52对准,并通过施压和加热将半导体芯片10接合到电路板50。
图4C示出了已将半导体芯片10接合到电路板50以组装电子装置的状态。将半导体芯片10上形成的电极凸起12分别焊接到电路板50上形成的连接焊盘52,由助焊剂填充物60填充半导体芯片10和电路板50之间的间隙,并密封半导体芯片10和电路板50的接合部分。
通过将半导体芯片10压到电路板50上并加热到使焊料20a熔化的温度,焊料可在电极凸起12和连接焊盘52之间扩散开并将电极凸起12和连接焊盘52焊接在一起。通过在该状态下保持压力和热量,助焊剂填充物60固化以将半导体芯片10牢固地固定到电路板50。
当向电路板50上的半导体芯片10加热和加压时,应该将向半导体芯片10施加热和压力的加热头80的温度设置得低于支承电路板50的加热台70的温度。通过这样做,覆盖半导体芯片10上的电极凸起12的焊料20a从电极凸起12扩散到电路板50的连接焊盘52上,从而将电极凸起12和连接焊盘52可靠地焊接在一起。
在此,通过将半导体芯片10的加热温度设置得低于焊料20a的熔点并将电路板50的加热温度设置得高于焊料20a的熔点,可以防止焊料从连接焊盘52向上流到电极凸起12,从而可以更可靠地将半导体芯片10和电路板50焊接在一起。
注意,尽管在上述实施方式中对其中在已预先向电路板50上施加助焊剂填充物60的情况下安装半导体芯片10的方法进行了说明,但也可以通过在将半导体芯片10接合到电路板50之后向半导体芯片10和电路板50之间的接合部分注入底层树脂来产生电子装置。当制造其中电极凸起12具有极窄的间距的电子元件(这使得底层填充很困难)时,可有效地使用通过预先向电路板50提供助焊剂填充物60来安装半导体芯片10的方法。
通过根据本实施方式的电子装置的制造方法,由于焊料20a覆盖半导体芯片10的电极凸起12,且不向电路板50的连接焊盘52提供焊料,因此电路板50的处理很简单。即使以微小间距形成连接焊盘52,也可以避免相邻的连接焊盘52因施加的焊料而导致电短路,这意味着可以以极精细的图案形成电路板50。
同样,对于半导体芯片10,由于将焊料20a从焊料片20转印到电极凸起12使得可以形成具有以窄间距形成的电极凸起12的半导体芯片(电子元件),因此即使对于具有以高密度设置的电极的半导体芯片,也可以实现在电路板上的可靠安装。
注意,尽管在上述实施方式中已经给出了半导体芯片作为电子元件的实施例,但在一些情况中也可以使用根据本发明的方法来安装其上已安装有半导体芯片的半导体封装。在这种情况中,半导体封装对应于“电子元件”,在安装板上安装有半导体封装的产品对应于“电子装置”。

Claims (12)

1. 一种配置有连接电极的电子元件的制造方法,在所述连接电极中用焊料覆盖电极凸起,所述制造方法包括以下步骤:
将焊料片加热到半熔化状态,并将电子元件压到所述焊料片上以使所述电极凸起与所述焊料片接触;以及
将所述电子元件从所述电极凸起接触所述焊料片的位置退回,以将焊料转印到与所述焊料片接触的所述电极凸起的外表面上。
2. 根据权利要求1的电子元件的制造方法,
其中,由加热台支承所述焊料片,由加热头支承所述电子元件,并且通过所述加热台和所述加热头将所述焊料片和所述电子元件压在一起,以将所述电极凸起压到所述焊料片上。
3. 根据权利要求2的电子元件的制造方法,
其中,所述加热台和所述加热头将所述焊料片加热到达到半熔化状态的温度,并且将所述加热台的加热温度设置得高于所述加热头的加热温度。
4. 根据权利要求1的电子元件的制造方法,
其中,当将所述电子元件压到所述焊料片上时,向所述电子元件施加超声波。
5. 根据权利要求4的电子元件的制造方法,
其中,由加热台支承所述焊料片,由超声波头支承所述电子元件,通过所述加热台和所述超声波头将所述焊料片和所述电子元件压在一起,并且,在通过所述超声波头向所述电子元件施加超声波的情况下将所述电极凸起压到所述焊料片上。
6. 根据权利要求4的电子元件的制造方法,
其中,在氮环境下执行在向所述电子元件施加超声波的情况下将所述电极凸起压到所述焊料片上的操作。
7. 一种电子装置的制造方法,该方法通过将配置有连接电极的电子元件安装到形成有连接焊盘的电路板上来制造电子装置,在所述连接电极中用焊料覆盖电极凸起,并且将所述电子元件安装到所述电路板是通过将所述连接电极接合到所述连接焊盘来进行的,
其中,所述电子元件是通过以下步骤形成的:将焊料片加热到半熔化状态,并将所述电子元件压到所述焊料片上以使所述电极凸起与所述焊料片接触,之后将所述电子元件从所述电极凸起接触所述焊料片的位置退回,以将焊料转印到接触所述焊料片的所述电极凸起的外表面上;
并且,所述电子装置的制造方法包括以下步骤:将所述电子元件的所述连接电极与所述电路板的所述连接焊盘对准,并将其加热到所述焊料熔化的温度,以接合所述电子元件和所述电路板。
8. 根据权利要求7的电子装置的制造方法,
其中,使用如下的电子元件作为所述电子元件:在将所述电子元件压到所述焊料片上时,通过向所述电子元件施加超声波而将所述焊料从所述焊料片转印到所述电极凸起。
9. 根据权利要求7的电子装置的制造方法,
其中,在加热台上支承所述电路板,在安装加热头上支承所述电子元件,并且,在将所述加热台至少加热到所述焊料的熔点并将所述安装加热头的加热温度设置得低于所述加热台的温度的情况下接合所述电子元件和所述电路板。
10. 根据权利要求7的电子装置的制造方法,
其中,向所述电路板的将安装所述电子元件的区域上施加助焊剂填充物,将所述电子元件的所述连接电极与所述电路板的所述连接焊盘对准,将所述电子元件和所述电路板加热到使所述焊料熔化的温度,并且对所述助焊剂填充物进行热固化以接合所述电子元件和所述电路板。
11. 一种配置有连接电极的电子元件,在所述连接电极中用焊料覆盖电极凸起,
其中,所述电子元件是通过包括以下步骤的制造方法形成的:
将焊料片加热到半熔化状态,并将电子元件压到所述焊料片上,以使所述电极凸起与所述焊料片接触;以及
将所述电子元件从所述电极凸起接触所述焊料片的位置退回,以将焊料转印到接触所述焊料片的所述电极凸起的外表面上。
12. 一种电子装置,该电子装置是通过将配置有连接电极的电子元件安装到形成有连接焊盘的电路板上而形成的,在所述连接电极中用焊料覆盖电极凸起,将所述电子元件安装到所述电路板是通过将所述连接电极接合到所述连接焊盘来进行的,
其中,所述电子元件是通过以下步骤形成的:将焊料片加热到半熔化状态,并将所述电子元件压到所述焊料片上以使所述电极凸起与所述焊料片接触,之后将所述电子元件从所述电极凸起接触所述焊料片的位置退回,以将焊料转印到接触所述焊料片的所述电极凸起的外表面上;
并且,所述电子装置是通过包括以下步骤的制造方法形成的:将所述电子元件的所述连接电极与所述电路板的所述连接焊盘对准,并将其加热到使所述焊料熔化的温度,以接合所述电子元件和所述电路板。
CN2007101597560A 2007-02-22 2007-12-21 电子元件和电子装置的制造方法、电子元件以及电子装置 Expired - Fee Related CN101252093B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007-041545 2007-02-22
JP2007041545A JP5066935B2 (ja) 2007-02-22 2007-02-22 電子部品および電子装置の製造方法
JP2007041545 2007-02-22

Publications (2)

Publication Number Publication Date
CN101252093A CN101252093A (zh) 2008-08-27
CN101252093B true CN101252093B (zh) 2011-03-30

Family

ID=39716249

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007101597560A Expired - Fee Related CN101252093B (zh) 2007-02-22 2007-12-21 电子元件和电子装置的制造方法、电子元件以及电子装置

Country Status (3)

Country Link
US (1) US7833831B2 (zh)
JP (1) JP5066935B2 (zh)
CN (1) CN101252093B (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010080540A (ja) * 2008-09-24 2010-04-08 Fujitsu Ltd 電極接続部の形成方法
JP2010205792A (ja) * 2009-02-27 2010-09-16 Hitachi Cable Ltd 太陽電池用リード線およびその製造方法並びにそれを用いた太陽電池
US8371497B2 (en) * 2009-06-11 2013-02-12 Qualcomm Incorporated Method for manufacturing tight pitch, flip chip integrated circuit packages
US20110147923A1 (en) * 2009-12-21 2011-06-23 Jiun Hann Sir Surface Mounting Integrated Circuit Components
DE102010015520A1 (de) * 2010-04-16 2011-10-20 Pac Tech-Packaging Technologies Gmbh Verfahren und Vorrichtung zur Ausbildung von Lotdepots
US8070043B1 (en) * 2010-12-02 2011-12-06 Rohm And Haas Electronic Materials Llc Curable flux composition and method of soldering
JP6197319B2 (ja) * 2013-03-21 2017-09-20 富士通株式会社 半導体素子の実装方法
CN104916555A (zh) * 2014-03-11 2015-09-16 东莞高伟光学电子有限公司 将半导体器件或元件焊接到基板上的方法和装置
CN104916553A (zh) * 2014-03-11 2015-09-16 东莞高伟光学电子有限公司 将半导体器件或元件焊接到基板上的方法和装置
CN104916554A (zh) * 2014-03-11 2015-09-16 东莞高伟光学电子有限公司 将半导体器件或元件焊接到基板上的方法和装置
DE102018221148A1 (de) * 2018-12-06 2020-06-10 Heraeus Deutschland GmbH & Co. KG Verfahren zum Herstellen eines Substratadapters und Substratadapter zum Verbinden mit einem Elektronikbauteil
CN111370562B (zh) * 2020-03-18 2021-03-09 京东方科技集团股份有限公司 一种微发光二极管的转印方法及微发光二极管显示面板
US20230268312A1 (en) * 2022-02-18 2023-08-24 Bae Systems Information And Electronic Systems Integration Inc. Soft touch eutectic solder pressure pad

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147819A (ja) * 2004-11-19 2006-06-08 Fujitsu Ltd 薄膜キャパシタ、その製造方法、及び、半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235103A (ja) * 1992-02-26 1993-09-10 Matsushita Electric Ind Co Ltd Ic実装方法
JPH08203904A (ja) * 1995-01-25 1996-08-09 Toshiba Corp はんだバンプ形成方法
JPH1070153A (ja) 1996-08-26 1998-03-10 Hitachi Ltd 電子部品の接続方法
JP3123707B2 (ja) 1997-02-14 2001-01-15 日本電信電話株式会社 はんだバンプの形成方法,はんだバンプの接続方法および加圧治具
JP3385943B2 (ja) * 1997-11-21 2003-03-10 松下電器産業株式会社 金バンプ付電子部品の実装方法
JPH11163199A (ja) 1997-11-27 1999-06-18 Nec Corp 実装方法
JP3420076B2 (ja) 1998-08-31 2003-06-23 新光電気工業株式会社 フリップチップ実装基板の製造方法及びフリップチップ実装基板及びフリップチップ実装構造
JP3239335B2 (ja) * 1999-08-18 2001-12-17 インターナショナル・ビジネス・マシーンズ・コーポレーション 電気的接続用構造体の形成方法およびはんだ転写用基板
JP2003101206A (ja) * 2001-09-25 2003-04-04 Denso Corp 部材の突起部へのはんだ供給方法
JP2006265484A (ja) * 2005-03-25 2006-10-05 Fujitsu Ltd 接着性樹脂組成物及び電子装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147819A (ja) * 2004-11-19 2006-06-08 Fujitsu Ltd 薄膜キャパシタ、その製造方法、及び、半導体装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
US2002/0195720A1A1 2002.12.26

Also Published As

Publication number Publication date
CN101252093A (zh) 2008-08-27
US7833831B2 (en) 2010-11-16
US20080206587A1 (en) 2008-08-28
JP2008205321A (ja) 2008-09-04
JP5066935B2 (ja) 2012-11-07

Similar Documents

Publication Publication Date Title
CN101252093B (zh) 电子元件和电子装置的制造方法、电子元件以及电子装置
JP3663938B2 (ja) フリップチップ実装方法
JP3610999B2 (ja) 半導体素子の実装方法
EP1386356B1 (en) Fluxless flip chip interconnection
KR101227025B1 (ko) 전자 부품 접속 구조 및 전자 부품 접속 방법
EP2750490A1 (en) Component-mounting printed circuit board and manufacturing method for same
KR101493340B1 (ko) 땜납 전사기재, 땜납 전사기재의 제조방법 및 땜납 전사방법
US20090001571A1 (en) Semiconductor device and method of manufacturing the same
CN101193498B (zh) 印刷电路板、印刷电路板组件的制造方法和翘曲校正方法
JP2003100809A (ja) フリップチップ実装方法
JP2000286302A (ja) 半導体チップ組立方法及び組立装置
US6915945B2 (en) Method for contact-connecting an electrical component to a substrate having a conductor structure
JPH08236578A (ja) 半導体素子のフリップチップ実装方法およびこの実装方 法に用いられる接着剤
JP2006032446A (ja) 半導体部品の実装方法および実装装置
JP3923248B2 (ja) 回路基板への電子部品の実装方法及び回路基板
JPH0831871A (ja) 電子部品を表面実装する際に使用する界面封止用フィルム、及び電子部品の表面実装構造
JP4483131B2 (ja) 実装構造体及びその実装方法
TWI228305B (en) Structure of stacked chip packaging structure and manufacture method of the same
JP2008135481A (ja) 電子装置およびその製造方法
JP4755151B2 (ja) 電気接続装置
JP3707516B2 (ja) 半導体素子の実装方法、およびこれに使用する素子実装用シート
JPS5935439A (ja) バンプ付リ−ドレスチツプキヤリアの基板搭載方法
CN101355065A (zh) 具有外部连接端子的半导体器件及其制造方法
JP2008091650A (ja) フリップチップ実装方法、および半導体パッケージ
JP2005183561A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110330

Termination date: 20141221

EXPY Termination of patent right or utility model