CN100569051C

CN100569051C - Circuit substrate manufacturing method

Info

Publication number: CN100569051C
Application number: CNB2005100027170A
Authority: CN
Inventors: 中村顺一
Original assignee: Shinko Electric Co Ltd
Current assignee: Shinko Electric Industries Co Ltd; Shinko Electric Co Ltd
Priority date: 2004-01-19
Filing date: 2005-01-19
Publication date: 2009-12-09
Anticipated expiration: 2025-01-19
Also published as: JP2005236244A; CN1645990A; US20050155222A1; US20070130762A1; KR101093594B1; TW200528003A; US7716826B2; KR20050076612A; US7222421B2; JP4541763B2; TWI343774B

Abstract

Circuit substrate manufacturing method.Circuit substrate manufacturing method of the present invention may further comprise the steps: the preparation substrate is formed with the metal forming of being made by first metal (copper) with strippable state on this substrate; On this metal forming, form the build-up wiring that comprises the metal level of making by second metal (scolder); The stripping metal paper tinsel is to obtain to have the circuit unit that is formed with the structure of build-up wiring in metal forming from the substrate; Corresponding to metal level, remove the metal forming of circuit unit selectively, to expose metal level.

Description

Circuit substrate manufacturing method

Technical field

The present invention relates to the manufacture method of circuit substrate, more specifically, relate to the circuit substrate manufacturing method of the base plate for packaging that is applicable to electronic component.

Background technology

Manufacture method as the circuit substrate of encapsulating electronic components has proposed a kind of method of making circuit substrate as follows in patent documentation 1 (TOHKEMY 2000-323613 communique): form predetermined lamination multilayer wiring (build-up multi-layeredwiring) on the one side at copper coin; Remove copper coin then selectively.In addition, in patent documentation 2 (TOHKEMY 2003-142617 communique), a kind of method of making circuit substrate has as follows been proposed also: they are bonded together by the adhesive that is coated on two copper coin peripheral parts; On its two sides, form predetermined lamination multilayer wiring then respectively; Separate the main part of the peripheral part and the copper coin of copper coin then, thereby separate two copper coins; Remove copper coin then selectively respectively.

In addition, proposed a kind of manufacture method of circuit substrate in patent documentation 3 (TOHKEMY 2002-83893 communique), the wiring that wherein connects semiconductor element is exposed from this circuit substrate.This method comprises: form predetermined lamination multilayer wiring on the two sides of metallic substrates respectively; Then along the surperficial cutting metal substrate that is parallel to this two sides, with the metallic substrates separated into two parts; Partly remove each metallic substrates then.

Yet, according to the manufacture method relevant, owing to use heavier copper coin as substrate, so in manufacturing step, cause problem easily with patent documentation 1 to 3.For example, according to the manufacture method relevant, be 50 * 50cm owing to used area with patent documentation 2 ², thickness is two copper coins of 0.4mm, so its weight becomes heavier when two copper coins are bonded together, for example nearly 1.8kg.Therefore, the machinability when handling copper coin is relatively poor, and must transport very heavy copper coin in manufacture process, and the result is easy to have problems in transfer system.

In addition, owing to copper coin finally will be removed, so its thickness is preferably thinner.Yet if the thickness of copper coin is too thin, its elasticity and rigidity all can variation, thereby cause the problem of breaking that for example produces in transporting.On the contrary, if make the thickness thickening of copper coin, then the etch quantity when removing copper coin can increase, and can cause cost to increase.

In addition, according to the manufacture method relevant with patent documentation 2, the peripheral part that is coated with adhesive of two copper coins (for example approximately 3cm) is destroyed, and becomes so-called bonding limit.Therefore, whole copper coin is not used effectively, so think that this method is disadvantageous aspect productivity ratio.

Summary of the invention

The object of the present invention is to provide a kind of circuit substrate manufacturing method, its can make circuit substrate at lower cost and in manufacture process without any problem.

The invention relates to a kind of manufacture method of circuit substrate, this method may further comprise the steps: the preparation substrate, at least one surface of this substrate, be formed with metal forming with strippable state, and wherein between this substrate and this metal forming, accompany peel ply; Form build-up wiring on this metal forming, the nethermost wiring layer of described build-up wiring is included in the metal level that downside is made by the metal material that is different from described metal forming; Peel off described peel ply and described metal forming by the boundary between described peel ply and described metal forming, to obtain circuit unit with the structure that on metal forming, has formed build-up wiring; Remove the whole metal forming of circuit unit,, wherein optionally remove the described metal level of described metal forming up to described build-up wiring to expose the nethermost wiring layer of build-up wiring.

In the present invention, as the base plate that is used to make circuit substrate, use the substrate (resin etc.) that is formed with metal forming (Copper Foil etc.) thereon with strippable state.Therefore, because different with the situation of the heavier copper coin of use of prior art, weight has obtained significantly reducing, thus can improve machinability, and can prevent to transport in the substrate process at transfer system and have problems.

Then, on the metal forming of base plate, form the build-up wiring comprise by the second metal metal level (solder layer etc.), then stripping metal paper tinsel from the substrate.So just obtained having the circuit unit of the structure that on metal forming, has formed the build-up wiring that comprises metal level.Corresponding to metal level, remove the metal forming of circuit unit selectively then, thereby expose metal level, so just obtained circuit substrate.The metal level of this circuit substrate is connected on the electronic components mounted on the circuit substrate (semiconductor chip etc.) as for example projection (bump).

Preferably, in formation comprises step by the build-up wiring of the second metal metal level, on the metal forming of base plate, be formed on the dielectric film that has opening portion in the predetermined portions, in the metal forming part of this peristome office, form recess then.Then, utilize metal forming to electroplate, in above-mentioned recess and opening portion, form metal level (solder layer etc.) as electroplating power supply layer.On dielectric film, form the wiring pattern that is connected to metal level by above-mentioned opening portion then.

In the present invention, (thickness setting for example be 30 to 40 μ m) gone up and formed as the metal level of projection and coupled wiring pattern on the film metal paper tinsel, removes metal forming then selectively, obtains circuit substrate thus.Therefore, compare, can significantly reduce etch quantity, and can reduce cost significantly with the situation of using copper coin (thickness is 0.4mm) in the prior art.

In addition, the method of two copper coins that are bonded together with use peripheral part of the prior art is different, when forming metal level and coupled wiring pattern on the two sides of base plate, do not have a metal substrate which partly go out of use, therefore can effectively utilize the whole zone of base plate, therefore can boost productivity.

In addition, the present invention relates to a kind of manufacture method of circuit substrate, this method may further comprise the steps: the preparation substrate, at least one surface of this substrate, be formed with metal forming with strippable state, and wherein between this substrate and this metal forming, accompany peel ply; On this metal forming, form dielectric film with opening portion; Form first wiring pattern on this dielectric film, it is electrically connected to above-mentioned metal forming by above-mentioned opening portion; Peel off described peel ply and described metal forming by the boundary between described peel ply and described metal forming, obtain the circuit unit that constitutes by above-mentioned metal forming, dielectric film and first wiring pattern; And, carry out composition by metal forming to this circuit unit, dielectric film with the surperficial opposing one side that has formed first wiring pattern on form second wiring pattern, this second wiring pattern is electrically connected to above-mentioned first wiring pattern by the above-mentioned opening portion in the dielectric film, and wherein said circuit substrate is made of a described circuit unit that separates from described substrate.

In the present invention, on the metal forming that is arranged on strippable state on the substrate (resin etc.), form predetermined build-up wiring.Then, stripping metal paper tinsel from the substrate obtains circuit unit thus, and the one side of this circuit unit is provided with build-up wiring, and its another side is provided with metal forming.Then, the metal forming of this circuit unit is carried out composition, to form the wiring pattern that links to each other with this build-up wiring.

In this way, as above-mentioned invention, owing to can reduce the weight of substrate,, and can prevent that transfer system from having problems in transporting the process of substrate so machinability is improved.And, in the present invention, owing to metal forming finally is not removed, but be used as wiring pattern effectively, so can further reduce cost.

As mentioned above, in the present invention, can make circuit substrate at lower cost, and in manufacture process without any problem.

Description of drawings

Figure 1A is the profile of expression according to the circuit substrate manufacturing method of first embodiment of the invention to 1L;

The profile of Fig. 2 is illustrated in the example that adopts in the electronic package according to the circuit substrate of first embodiment of the invention;

Fig. 3 A is the profile (Fig. 3 B be its plane graph) of expression according to the circuit substrate manufacturing method of second embodiment of the invention to 3I; And

Fig. 4 A is the profile of expression according to the circuit substrate manufacturing method of third embodiment of the invention to 4F.

Embodiment

Embodiments of the invention are described below with reference to accompanying drawings

(first embodiment)

Figure 1A is the profile of representing successively according to the circuit substrate manufacturing method of first embodiment of the invention to 1L.

Shown in Figure 1A, at first prepare resin substrate 10 such as glass epoxy resin etc.Then, shown in Figure 1B, preparation carrier supported Copper Foil 18, it has such structure: thickness is that the carrier copper foil 16 of 30 to 40 μ m sticks on the film Copper Foil 12 that thickness is 3 to 5 μ m by peel ply (adhesive linkage) 14.Carrier copper foil 16 is strutting pieces of being convenient to handle film Copper Foil 12.

Then, with similar shown in Figure 1B, the exposure of the film Copper Foil 12 of carrier supported Copper Foil 18 is sticked on respectively on two surfaces of resin substrate 10.At this moment, the exposure of the film Copper Foil 12 of carrier supported Copper Foil 18 has the concavo-convex of projection shape.Therefore, because Copper Foil 18 concavo-convex engaging-in in resin substrate 10, so carrier supported Copper Foil 18 is bonding on the resin substrate 10 under the state of excellent bonds by so-called anchoring effect.Simultaneously because film Copper Foil 12 and carrier copper foil 16 are bonded together by peel ply 14, so can be easily from the interface peel carrier copper foil 16 of peel ply 14.

In the present embodiment, the structure among Figure 1B is as base plate 20.Because the base plate 20 according to present embodiment constitutes by carrier supported Copper Foil 18 is sticked on the resin substrate 10,, can significantly reduce weight so compare with employed copper coin in the prior art.Like this, can be so that the processing of base plate, thus improved machinability, and can prevent from transfer system transports the process of substrate 20, to have problems.

Then, on two surfaces of this base plate 20, form the lamination multilayer wiring, in other words, shown in Fig. 1 C, on the carrier copper foil on the both sides of base plate 20 16, form first dielectric film 22 at first respectively, have opening portion 22x at the predetermined portions of this first dielectric film.Can adopt the material as first dielectric film 22 such as epoxy resin, polyimide resin, phenolic resins, acrylic resin.Utilize photoetching photosensitive resin to be carried out the method for composition as the method that forms first dielectric film 22.In addition, can adopt following method: by stacked membranaceous resin or utilize spin coating or printing forms resin molding, utilize laser or this resin molding of RIE etching to form opening portion then.Alternatively, also can adopt following method: the reservations of die-cut membranaceous resin assign to form a plurality of opening portions, paste this resin molding then.In addition, can utilize silk screen printing that the resin molding with opening portion is carried out composition.

Then, shown in Fig. 1 D, the part of exposing by the opening portion 22x by first dielectric film 22 to carrier copper foil 16 is carried out etching and is formed recess 16x.

Then, shown in Fig. 1 E, utilize carrier copper foil to electroplate, form solder layer 24 respectively among the recess 16x of the carrier copper foil on the two sides of base plate 20 16 and among the part opening portion 22x of first dielectric film 22 as electroplating power supply layer.Herein, because as described below, carrier copper foil 16 finally will be removed by etching, thus select to the etching that imposes on carrier copper foil 16 have repellence metal as the material that is formed on the metal level on the carrier copper foil 16.Except scolder, gold (Au) etc. also can be used as this metal material.

Then, shown in Fig. 1 F, on first dielectric film 22 on the two sides of resin substrate 10, form first wiring pattern 26 that is connected to solder layer 24 respectively.This first wiring pattern 26 becomes (semi additive) technology to form by for example false add.More specifically, at first form the copper seed layer (not shown), form the diaphragm (not shown) that aligns with first wiring pattern 26 then with a plurality of opening portions by chemical plating or sputtering method.Then, utilize copper seed layer to electroplate, in the opening portion of diaphragm, form the copper film patterns (not shown) as electroplating power supply layer.Then, remove diaphragm, and utilize copper film patterns copper seed layer to be carried out etching as mask.Like this, just obtained first wiring pattern 26.

Then, shown in Fig. 1 G, on the two sides of base plate 20, form the second dielectric film 22a respectively, wherein on first wiring pattern 26, formed through hole 22y.Form the second dielectric film 22a by the similar method of method with 22 employings of above-mentioned first dielectric film.Then, shown in Fig. 1 H, utilize and the similar method of method that forms above-mentioned first wiring pattern 26, all form the second wiring pattern 26a respectively on the second dielectric film 22a on the two sides of base plate 20, it is connected to first wiring pattern 26 by through hole 22y.

In sum, on carrier copper foil 16, formed build-up wiring with solder layer 24.In Fig. 1 H, represented following a kind of pattern, wherein formed the two layers of wiring pattern that is connected to solder layer 24, that is, and first wiring pattern 26 and the second wiring pattern 26a.But also can adopt the pattern that forms n (n is the integer more than or equal to 1) layer wiring pattern.

Then, shown in Fig. 1 I, form soldering-resistance layer 28 respectively on the two sides of the resulting structures in Fig. 1 H, wherein formed opening portion 28x, with the coupling part 26x of the second wiring pattern 26a on the two sides that exposes base plate 20 respectively.

Then, shown in Fig. 1 J, respectively with the carrier copper foil on the two sides of resin substrate 10 16 peeling away at the interface from peel ply 14.Like this, carrier copper foil 16 separates with resin substrate 10.Thereby, shown in Fig. 1 K, having obtained circuit unit 30, it has the structure that has formed the build-up wiring that comprises solder layer 24 on carrier copper foil 16.

Then, shown in Fig. 1 L, for the solder layer 24 and first dielectric film 22, remove the carrier copper foil 16 of circuit unit 30 selectively, for example, utilize iron chloride (III) aqueous solution, copper chloride (II) aqueous solution, ammonium persulfate aqueous solution etc. to carry out wet etching,, remove carrier copper foil 16 selectively for the solder layer 24 and first dielectric film 22.

Thus, expose the solder layer 24 of the bottom surface that is connected to first wiring pattern 26,, so just obtained the circuit substrate 1 among first embodiment with as projection 25.

The profile of Fig. 2 is illustrated in the example that adopts in the electronic package according to the circuit substrate of first embodiment of the invention.

As shown in Figure 2, the circuit substrate 1 of present embodiment is used as electronic package, is connected to the projection 25 of circuit substrate 1 such as the electronic component 40 of semiconductor chip etc., and has external connection terminals 27 on the coupling part 26x of the second wiring pattern 26a.In Fig. 2, show the pattern of circuit substrate 1 as BGA (ball grid array) type.In this case, external connection terminals 27 is made up of a plurality of soldered balls.When circuit substrate 1 was used as PGA (pin grid array) type, a plurality of pins were connected to the coupling part 26x of the second wiring pattern 26a.And when circuit substrate 1 was used as LGA (land grid array) type, coupling part 26x was as pad.

Then, the coupling part 26x (pad) of the external connection terminals on the circuit substrate 1 27 (soldered ball or pin) or the second wiring pattern 26a is connected in the circuit board (motherboard).

High position precision and on carrier copper foil 16, form projection 25 to high-density, and, the wiring pattern that is connected to projection 25 on carrier copper foil 16 sides, formed with high accuracy more.This be because, because the stacked flatness of dielectric film that makes of wiring pattern degenerates, so aspect precision, the wiring pattern of upside is poorer than the wiring pattern of downside.

Therefore, as shown in Figure 2, for the substrate 1 of present embodiment, utilizing projection 25 conducts is very easily with the electronic component connection terminals with high density coupling part.

Alternative, opposite with pattern among Fig. 2, can be connected to projection the coupling part 26x of the second wiring pattern 26a such as the electronic unit of semiconductor chip etc., also can be connected to circuit board (motherboard) to the projection 25 of circuit substrate 1.

In the present embodiment, carrier copper foil 16 is expressed as by the first metal metal forming, and solder layer 24 is expressed as by the second metal metal film.But the present invention is not limited to this combination.Can adopt any combination of metal material, as long as can remove first metal selectively with respect to second metal.

In addition, show following pattern: use the base plate 20 of on the two sides of resin substrate 10, having pasted carrier supported Copper Foil 18; On the two sides of this base plate 20, form build-up wiring respectively then.But also can on the one side of resin substrate 10, paste the base plate 20 of carrier supported Copper Foil 18, on one side, form build-up wiring then.In addition, can obtain a plurality of circuit substrates from the one side of base plate 20.

In the present embodiment, use the substrate of on resin substrate 10, having pasted carrier supported Copper Foil 18, make circuit substrate 1 as base plate 20.Therefore, weight is alleviated and be difficult to occur in the problem that causes in the operating process of transporting in manufacturing step.

And the thickness setting of carrier copper foil 16 is for example 30 to 40 μ m, thus, compares with the copper coin that uses in the prior art (thickness is 0.4mm), can significantly reduce thickness.Therefore, can significantly reduce etch quantity, and can reduce cost significantly.

In addition, different with two copper coins that use peripheral part to be bonded together as the prior art of base plate, do not have a base plate 20 which partly go out of use, therefore can effectively utilize the whole zone of base plate.Therefore, can boost productivity.

(second embodiment)

Fig. 3 A is the profile (Fig. 3 B be its plane graph) of expression according to the circuit substrate manufacturing method of second embodiment of the invention to 3I.The difference of second embodiment and first embodiment is: use the substrate formed a copper foil layer with strippable state on resin substrate as base plate, and finally do not remove this Copper Foil but as wiring pattern.

In circuit substrate manufacturing method according to second embodiment, as shown in Figure 3A, at first the preparation with first embodiment in the similar resin substrate 10 of resin substrate.Then, thickness is sticked on respectively on the two sides of resin substrate 10 by adhesive linkage 13 for for example Copper Foil 12 of 10 to 40 μ m.Then, with reference to the plane graph of figure 3B, the whole zone for resin substrate 10 does not provide adhesive linkage 13, but provides adhesive linkage 13 for the annular region on the peripheral part of resin substrate 10 simultaneously.In other words, resin substrate 10 and Copper Foil 12 are in simple contact condition in the zone except the zone that provides adhesive linkage 13.

In a second embodiment, the structure of gained among Fig. 3 A is used as base plate 20a.Base plate 20a is configured on two surfaces of resin substrate 10 Copper Foil 12 is set all.Therefore, be similar to first embodiment, compared with prior art weight is alleviated, thereby is convenient to operate base plate 20a, and can prevent from thus to have problems in transporting operation.

Then, shown in Fig. 3 C, on the Copper Foil 12 of base plate 20a both sides, form dielectric film 32 respectively with opening portion 32x.Like this, expose Copper Foil 12 from the bottom of the opening portion 32x of dielectric film 32.Can adopt with first embodiment in formation first dielectric film, 22 identical materials and method make this dielectric film 32.

Then, shown in Fig. 3 D, become technology by the false add of explaining in first embodiment, form first wiring pattern 36 respectively on the dielectric film 32 of the both sides of base plate 20a, this first wiring pattern 36 is electrically connected to Copper Foil 12 by the opening portion 32x of dielectric film 32.In this case, stacked n (n is equal to or greater than 1 integer) layer wiring pattern on the dielectric film on the two sides of base plate 20a 32 respectively.

Then, shown in Fig. 3 E, be formed on the soldering-resistance layer 28 that is formed with a plurality of opening portion 28x on first wiring pattern 36 respectively on the two sides of base plate 20a respectively.Subsequently, by carrying out nickel/gold plating formation coupling part 29 on first wiring pattern 36 in the opening portion 28x of soldering-resistance layer 28.

Then, cut the represented part (being equal to the annular section that is positioned at adhesive linkage 13 inboards among Fig. 3 B) of A among Fig. 3 E.Thereby, shown in Fig. 3 F, from the resulting structures of Fig. 3 E, removed the peripheral part of the adhesive linkage 13 that comprises base plate 20a.

In this stage, owing in the resulting structures of Fig. 3 F, removed the zone that is formed with adhesive linkage 13, so resin substrate 10 and Copper Foil 12 just are in contact with one another in whole zone.Therefore, resin substrate 10 and Copper Foil 12 can separate at an easy rate.

Then, shown in Fig. 3 G, can make them separately by peel off resin substrate 10 and Copper Foil 12 at boundary.Thus, can obtain two circuit units 50.Circuit unit 50 comprises Copper Foil 12, dielectric film 32, is connected to first wiring pattern 36 and the soldering-resistance layer 28 of Copper Foil 12 by opening portion 32x.Then, abandon resin substrate 10.

Then, shown in Fig. 3 H, utilize photoetching and etching that the Copper Foil on the one side of circuit unit 50 12 is carried out composition, thereby form the second wiring pattern 36a.The second wiring pattern 36a is electrically connected to first wiring pattern 36 by the opening portion 32x of dielectric film 32.Then, shown in Fig. 3 I, be formed on the soldering-resistance layer 28 that has a plurality of opening portion 28x on the second wiring pattern 36a on the bottom surface side of the circuit unit 50 in Fig. 3 H.In addition, the second wiring pattern 36a among the opening portion 28x of soldering-resistance layer 28 is carried out nickel/gold electroplate, to form coupling part 29.

Thus, obtained circuit substrate 1a among second embodiment.

At this, can on a surface of base plate, form build-up wiring, wherein in this base plate, a surface of resin substrate 10 is provided with Copper Foil 12.In addition, can produce a plurality of circuit substrates from the surface of base plate 20a.

In circuit substrate according to present embodiment, preferably, coupling part 29 on first wiring pattern 36 of circuit substrate 1a is as the external connecting branch that is connected to circuit board (motherboard), and is connected to coupling part 29 on the second wiring pattern 36a such as the electronic component (not shown) of semiconductor chip etc.On the contrary, can be connected to first wiring pattern 36 of circuit substrate 1a such as the electronic component (not shown) of semiconductor chip etc., and the coupling part 29 on the second wiring pattern 36a can be used as the external connecting branch.

As mentioned above,, at first on Copper Foil 12, form predetermined build-up wiring, and the adhesive linkage of Copper Foil 12 by the peripheral part of resin substrate 10 sticks on the resin substrate 10 according to second embodiment.Then, excision comprises the peripheral part of the circuit substrate 10 of adhesive linkage 13.Then, at the interface they being peeled away of resin substrate 10 and Copper Foil 12, thereby, just having obtained circuit unit 50, the one side of this circuit unit 50 is provided with build-up wiring, and its another side is provided with Copper Foil 12.Then, the Copper Foil 12 to circuit unit 50 carries out composition.

In a second embodiment, according to technological concept similar or method, use resin substrate 10 to be provided with the substrate of Copper Foil 12 as base plate 20a to first embodiment.Therefore,, the weight of base plate 20a can be alleviated, and the problem of transporting can be prevented from manufacturing step, to occur as first embodiment.

In addition, in a second embodiment, be different from first embodiment, Copper Foil 12 finally is not removed but is used as the second wiring pattern 36a.Therefore, owing to can more effectively utilize Copper Foil 12 than first embodiment, so can reduce cost.In addition, resin substrate (support chip) 10 can be abandoned after separating with Copper Foil 12.So, owing to do not need to remove metal profile as prior art by etching, so, can simplify manufacturing step, and can reduce cost.

In addition, in a second embodiment, can use the resin substrate 10 that is pasted with individual layer Copper Foil 12 as base plate 20a.Therefore, the structure of base plate is more simplified than first embodiment.

(the 3rd embodiment)

Fig. 4 A is the profile of expression according to the circuit substrate manufacturing method of third embodiment of the invention to 4F.The difference of the 3rd embodiment and second embodiment is, uses by peel ply copper film is sticked on the substrate that forms on the resin substrate as base plate.

According to the circuit substrate manufacturing method of the 3rd embodiment, shown in Fig. 4 A, at first prepare base plate 20b: Copper Foil 12 is sticked on the two sides of resin substrate 10 by peel ply 14 with following structure.Peel ply 14 is made by silicones etc., and forms and make that in subsequent step easily the boundary between peel ply 14 and Copper Foil 12 is peeled away them.

Then, shown in Fig. 4 B, by the method identical with first embodiment, shape has the dielectric film 32 of a plurality of opening portion 32x respectively on the Copper Foil 12 on the two sides of base plate 20b.Then, form first wiring pattern 36 that is electrically connected to Copper Foil 12 by a plurality of opening portion 32x respectively.

Then, shown in Fig. 4 C, be similar to second embodiment, be formed on the soldering-resistance layer 28 that has a plurality of opening portion 28x on first wiring pattern 36 on the two sides of base plate 20b respectively.Then, respectively first wiring pattern 36 among the opening portion 28x is carried out nickel/gold and electroplate, to form coupling part 29.

Then, shown in Fig. 4 D, peel ply 14 and Copper Foil 12 are peeled off mutually, obtained two circuit units 50 thus at boundary.Then, abandon the resin substrate 10 that leaves peel ply 14.

Then, shown in Fig. 4 E, the Copper Foil 12 of circuit unit 50 is carried out composition form the second wiring pattern 36a, it is connected to first wiring pattern 36 by the opening portion 32x in the dielectric film 32.

Then, shown in Fig. 4 F, on the bottom surface of the circuit unit 50 of Fig. 4 E, be formed on the soldering-resistance layer 28 that has a plurality of opening portion 28x on the second wiring pattern 36a.Then, form coupling part 29 respectively on the second wiring pattern 36a in opening portion 28x.

Thus, obtained circuit substrate 1b among the 3rd embodiment.

The 3rd embodiment can realize and the first and second embodiment confers similar advantages.In addition, in the 3rd embodiment, owing to will be used as base plate 20b to the substrate that Copper Foil 12 sticks on the resin substrate 10 by peel ply 14, so peel ply 14 and Copper Foil 12 can be easy to peel away at boundary.Therefore, be different from second embodiment, the periphery that does not need to excise base plate 20b assigns to separate resin substrate 10 and Copper Foil 12.Thereby, can simplify manufacturing step and can more reduce cost.

In the above-mentioned second and the 3rd embodiment, replace Copper Foil 12 as wiring pattern, as the carrier copper foil among first embodiment 16, can on Copper Foil 12, form recess, in the process that forms projection, utilize these recesses.

Claims

1, a kind of circuit substrate manufacturing method may further comprise the steps:

The preparation substrate, this substrate at least the one side on be formed with metal forming with strippable state, wherein between this substrate and this metal forming, accompany peel ply;

Form build-up wiring on described metal forming, the nethermost wiring layer of described build-up wiring is included in the metal level that downside is made by the metal material that is different from described metal forming;

Peel off described peel ply and described metal forming by the boundary between described peel ply and described metal forming, thereby obtain to have the circuit unit that on described metal forming, is formed with the structure of described build-up wiring; And

Optionally remove the described metal level of described metal forming, to expose the nethermost wiring layer of described build-up wiring up to described build-up wiring.

2, according to the circuit substrate manufacturing method of claim 1, the step that wherein forms described build-up wiring on described metal forming may further comprise the steps:

On described metal forming, be formed on the dielectric film that predetermined position has opening portion,

Form recess in the part metals paper tinsel of the described peristome office in described dielectric film,

Utilize described metal forming to electroplate, thereby at least a portion of described recess and described opening portion, form described metal level as electroplating power supply layer, and

On described dielectric film, form the wiring pattern that is connected to described metal level by described opening portion.

3, according to the circuit substrate manufacturing method of claim 1, wherein said metal forming is a Copper Foil, and described metal level is a solder layer.

4, according to the circuit substrate manufacturing method of claim 1, wherein said substrate is formed from a resin.

5, according to the circuit substrate manufacturing method of claim 1, wherein the described substrate that is formed with metal forming with strippable state is the substrate that is pasted with the carrier supported Copper Foil, this carrier supported Copper Foil has the structure that Copper Foil, peel ply and carrier copper foil stack gradually, and described metal forming is described carrier copper foil, and

In the step that obtains described circuit unit, peel off described carrier copper foil and described peel ply at boundary.

6, according to the circuit substrate manufacturing method of claim 5, wherein said carrier supported Copper Foil sticks on the two sides of described substrate, and obtains described circuit unit by the two sides of described substrate respectively.

7, according to the circuit substrate manufacturing method of claim 1, wherein, in the step for preparing the described substrate that is formed with metal forming with strippable state, on the two sides of described substrate, form described metal forming, and

In the step that obtains described circuit unit, the two sides by described substrate obtains described circuit unit respectively.

8, according to the circuit substrate manufacturing method of claim 2, wherein, in the step of the nethermost wiring layer that exposes described build-up wiring, described metal level is as the projection that is connected with described wiring pattern.

9, a kind of circuit substrate manufacturing method may further comprise the steps:

On described metal forming, form dielectric film with opening portion;

On described dielectric film, form first wiring pattern that is electrically connected to described metal forming by described opening portion;

Peel off described peel ply and described metal forming by the boundary between described peel ply and described metal forming, obtain the circuit unit that constitutes by described metal forming, described dielectric film and described first wiring pattern; And

Carry out composition by described metal forming to described circuit unit, form second wiring pattern on the opposite one side of the one side with having formed described first wiring pattern of described dielectric film, this second wiring pattern is electrically connected to described first wiring pattern by the opening portion of described dielectric film;

Wherein, described circuit substrate is made of a described circuit unit that separates from described substrate.

10, according to the circuit substrate manufacturing method of claim 9, wherein said substrate is formed from a resin.

11, according to the circuit substrate manufacturing method of claim 9, wherein, form in the step of described first wiring pattern on described dielectric film, form described first wiring pattern by stacked n layer wiring pattern, wherein n is the integer more than or equal to 1.