CN100380653C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN100380653C
CN100380653C CNB2005101028683A CN200510102868A CN100380653C CN 100380653 C CN100380653 C CN 100380653C CN B2005101028683 A CNB2005101028683 A CN B2005101028683A CN 200510102868 A CN200510102868 A CN 200510102868A CN 100380653 C CN100380653 C CN 100380653C
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wiring
resin molding
semiconductor element
semiconductor
semiconductor device
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CNB2005101028683A
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CN1755927A (zh
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关口正博
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Toshiba Corp
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Toshiba Corp
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Abstract

本发明提供一种半导体器件及其制造方法，能够一并加工半导体晶片，由于通过用布线用树脂膜夹着半导体晶片，作为基体材料处理，因而能够提高产量。具有：夹着半导体元件(1)的第1及第2布线用树脂膜(3、3a)、分别形成在夹着所述半导体元件的第1及第2布线用树脂膜的露出的表面上的布线图形(4、4a)、形成在所述第2布线用树脂膜的露出的表面上的外部连接端子(8)。形成在第1布线用树脂膜上的布线图形(4)，通过连接布线(5)与半导体元件电连接，形成在第2布线用树脂膜上的布线图形(4a)，通过连接布线(6)与形成在第1布线用树脂膜上的布线图形(4)电连接。

Description

半导体器件及其制造方法
技术领域
本发明涉及使用可用作布线基板的布线用树脂膜的、可一并加工半导体晶片的半导体器件及其制造方法。
背景技术
以往的由搭载在布线基板上的半导体元件构成的半导体器件的制造方法，一般对于每个元件，从切片的硅等半导体晶片拾取半导体元件，搭载在形成有布线图形的膜基板或印刷布线基板等布线基板上。例如，进行倒装芯片连接的半导体器件(FC-BGA)，在实施了布线图形形成的基体材料上，按每个元件，倒装芯片连接形成有柱状突点的半导体元件。在如此的以往半导体封装的制造方法中，由于按每个元件处理半导体，所以产量低，其处理也存在问题。
此外，在以往的根据晶片级的半导体封装的制造方法中，可举例晶片级的CSP，但由于此时的封装的外形尺寸依赖于半导体元件的外形尺寸，因此存在每当因布线工艺的变更等而变化半导体元件的外形尺寸时，影响封装尺寸的问题。
另外，关于以往的搭载半导体晶片的布线基板，已知有叠层基板。叠层基板，在通过在玻璃纤维无纺布上含浸环氧树脂等树脂而成的绝缘基板的表背两面，至少实施1层叠层。在叠层上适宜设置布线图形和连接布线，电连接搭载在叠层基板上的半导体元件和安装在叠层基板上的外部连接端子。关于叠层，例如，采用简称为ABF的布线用树脂膜。如果在半导体器件上采用该以往的布线基板，半导体器件加厚，对于迫切需要薄型化的半导体器件，是存在需要解决的问题的结构。
在专利文献1中，在形成元件的基板背面粘接支撑部件，在按每个元件切断基板后，以拉伸支撑基板，在元件间设置间隙的状态，一并进行树脂密封。沿着所述切断痕迹再次切断，分成每个元件。
专利文献1：特开2000-21906号公报
发明内容
本发明是鉴于以上的事实而提出的，其目的在于提供一种半导体器件及其制造方法，能够一并加工硅等半导体晶片，此外由于通过用布线用树脂膜夹着半导体晶片，作为基体材料处理，因而能够提高产量。
本发明的半导体器件的一方式，具有，半导体元件、夹着所述半导体元件的第1及第2布线用树脂膜、分别形成在夹着所述半导体元件的第1及第2布线用树脂膜的布线图形露出的表面上的布线图形、形成在所述第2布线用树脂膜的露出的表面上的外部连接端子；形成在所述第1布线用树脂膜上的布线图形，与所述半导体元件电连接，形成在所述第2布线用树脂膜上的布线图形，与形成在所述第1布线用树脂膜上的布线图形电连接。
本发明的半导体器件的制造方法的一方式，其特征在于，具备以下步骤：在与切片方向垂直的方向，在可伸缩的粘接片上，搭载可通过切片分离成多个半导体元件的半导体晶片的步骤；在所述粘接片上，通过施加张力，在所述半导体元件间形成间隙的步骤；在所述粘接片上的半导体晶片上，从上面粘贴第1布线用树脂膜，并使其硬化的步骤；从所述半导体晶片上除去所述粘接片，在除去该粘接片的面上，粘贴第2布线用树脂膜，并使其硬化的步骤；在所述第1布线用树脂膜的露出的表面上粘贴导电箔，并对其进行刻蚀处理，在各自的表面上形成布线图形的步骤；通过埋入在形成在所述第1布线用树脂膜上的贯通孔内的连接布线，将形成在所述第1布线用树脂膜上的布线图形，电连接在所述半导体元件上的步骤；通过埋入在形成在所述第1及第2布线用树脂膜上的贯通孔内的连接布线，将形成在所述第2布线用树脂膜上的布线图形，电连接在形成在所述第1布线用树脂膜的表面上的布线图形上的步骤；在所述第2布线用树脂膜的布线图形的表面上，连接外部连接端子的步骤。
本发明，通过用布线用树脂膜夹着半导体元件，得到新的结构的封装，并且能够使半导体器件薄型化。此外，能够一并加工半导体晶片，另外通过用布线用树脂膜夹着半导体晶片，作为基体材料处理，结果能够提高产量。另外，在用布线用树脂膜夹着半导体晶片时，能够在元件间设置间隙，其结果，封装的外形形状不依赖于半导体元件的外形。
附图说明
图1是说明本发明的一实施例即实施例1的搭载切片的半导体晶片的粘接片的立体图、及延伸该粘接片的状态的立体图。
图2是制造实施例1的半导体器件的步骤剖面图。
图3是制造实施例1的半导体器件的步骤剖面图。
图4是制造实施例1的半导体器件的步骤剖面图。
图5是实施例1的半导体器件的剖面图。
图6是本发明的一实施例即实施例2的半导体器件的剖面图。
图7是本发明的一实施例即实施例3的半导体器件的剖面图。
图中：1-半导体元件，2-粘接片，3、3a、3’、3’a-布线用树脂膜，4、4a、4’、4’a-布线图形，5、6-连接布线，7、7a-绝缘膜，8-外部连接端子，8a-内部连接端子。
具体实施方式
本发明，在半导体封装的制造方法中，其特征在于，一并加工硅晶片，以通过从上下用布线用树脂膜夹着硅基板，形成半导体元件埋入基体材料。此外，本发明，其特征在于，在用布线用树脂膜夹着半导体晶片时，通过对搭载半导体晶片的粘接片施加张力，在元件间设置间隙，确保形成用于导通的贯通孔等的区域。通过用布线用树脂膜夹着硅等半导体晶片，能够以与通常的膜基体材料不同的状态进行处理，此外，由于相对于硅形成上下对称的结构，因此从热膨胀的角度看形成有利的结构。另外，由于一并处理半导体晶片，所以能够提高产量。
以下，参照实施例说明本发明的实施方式。
实施例1
首先，参照图1～图5说明实施例1。图1是说明搭载切片的半导体晶片的粘接片的立体图、及延伸该粘接片的状态的立体图，图2～图4是制造该实施例的半导体器件的步骤剖面图，图5是由该步骤形成的半导体器件的剖面图。如图5所示，例如，由硅半导体构成的、厚例如60μm左右的片状的半导体元件1，被第1及第2布线用树脂膜3、3a夹持地覆盖。布线用树脂膜，是用于形成设在叠层布线基板的芯基板的表面上的布线图形的叠层的材料，环氧系热硬化树脂膜是其一例。在第1及第2布线用树脂膜表面，分别设置包括焊盘区域等的布线图形4、4a。
设在第1布线用树脂膜3的表面上的布线图形4，形成在半导体元件1的表面上，通过由埋入形成在第1布线用树脂膜上的贯通孔内的镀层等构成的连接布线6，电连接半导体元件1的内部电路(未图示)和电连接用的连接电极(未图示)。设在第1及第2布线用树脂膜3、3a上的布线图形4、4a，经由由埋入通过上述布线用树脂膜形成的贯通孔内的镀层等构成的连接布线6，进行电连接。在第2布线用树脂膜3a的布线图形4a的连接电极部分，形成软焊料球等外部连接端子8。外部连接端子8，通过布线图形4、4a，与半导体元件1的内部电路电连接。除外部连接端子8外，以覆盖布线图形4、4a的方式，在第1及第2布线用树脂膜3、3a表面上，形成抗蚀剂等绝缘膜7、7a。
该实施例的半导体器件，如上所述，通过用布线用树脂膜夹持半导体元件，得到新结构的封装，能够使半导体器件更加薄型化。
下面，说明该实施例的制造步骤。
图1(a)表示结束元件形成步骤，例如在合成树脂等粘接片1上粘贴6～8英寸程度的硅晶片(半导体晶片)，沿切片线进行切片，分割成各个半导体元件(芯片)的状态。粘接片1，能够向与半导体元件的切片方向垂直的方向伸缩半导体晶片。接着，如图1(b)所示，在粘接片1上，向箭头方向二维地施加张力，在半导体元件间形成间隙。此时的间隙，以在用布线用树脂膜夹着半导体晶片时，可确保通过贯通孔上下面导通的程度的空间的方式设置。此外，通过适宜控制张力，能够调节间隙的宽度。
下面，参照图2，说明在施加张力的粘接片上粘贴布线用树脂膜的步骤。图2是沿图1(b)的A-A′线的局部剖面图，在半导体元件间设置间隙(图2(a))。在粘贴粘接片2的半导体元件1的面上，粘贴20～30μm厚度的第1布线用树脂膜3。在此状态下，半导体元件1表面，被第1布线用树脂膜3覆盖。然后加热硬化布线用树脂膜(图2(b))。因此，半导体元件1由第1布线用树脂膜3支撑。在此状态下，从半导体元件1上剥离粘接片2(图2(c))。然后，在剥离粘接片2露出半导体元件1的第1布线用树脂膜3上，粘贴第2布线用树脂膜3a，然后加热硬化第2布线用树脂膜3a(图2(d))。第2布线用树脂膜3a可以是与第1布线用树脂膜3相同的材质的材料，也可以不相同。
下面，参照图3及图4，说明在布线用树脂膜上的电路形成步骤。图3及图4，是说明从进行电路形成到安装外部连接端子的步骤的剖面图。首先，作为导电箔，例如，在露出第1及第2布线用树脂膜的表面上粘贴铜箔，通过对其实施刻蚀等进行图案形成，在第1布线用树脂膜3的表面上形成布线图形4，在第2布线用树脂膜3a的表面上形成布线图形4a(图3(a))。然后，利用激光，将布线图形4、与形成在第1布线用树脂膜3及半导体元件1的表面上的半导体元件的内部电路电连接的、由铝等构成的连接端子(焊盘)(未图示)开口，在第1布线用树脂膜3上形成贯通孔，露出焊盘。然后通过对该贯通孔内实施镀敷处理，形成电连接布线图形4和半导体元件的焊盘的连接布线5(图3(b))。接着，为导通布线图形4、4a，例如，通过钻孔等，贯通第1及第2布线用树脂膜3、3a，形成贯通孔。然后，对该贯通孔实施镀敷处理，形成电连接布线图形4、4a的连接布线6(图3(c))。
接着，除外部连接端子形成区域外，以覆盖布线图形4、4a的方式，在第1及第2布线用树脂膜3、3a表面，形成抗蚀剂等绝缘膜7、7a(图3(d))。然后，在设在第2布线用树脂膜3a上的布线图形4a的外部连接端子形成区域，连接软焊料球等外部连接端子8。如此形成晶片形状的封装(图4)。在图4中，在由虚线围住的区域中示出的部分表示1个完成的半导体器件。按每1个半导体元件封装切片该晶片形状的封装，分割成多个半导体器件。图5表示分割后的半导体器件的剖面图。
以上，根据该实施例的方法，能够一并加工硅等半导体晶片，另外通过用布线用树脂膜夹着半导体晶片，能够作为基体材料处理，有助于提高产量。此外，通过在用布线用树脂膜夹着半导体晶片时，在元件间设置间隙，封装的外形形状不依赖于半导体元件的外形。
实施例2
下面，参照图6说明实施例2。
在本实施例的半导体器件中，其特征在于具有收纳半导体元件的多层叠层封装的结构。图6是在本实施例中说明的半导体器件的剖面图。在本实施例中，说明叠层安装有2个半导体元件的封装的半导体器件，但该封装的叠层数也可以是3层或以上。在本实施例中，在封装A上叠层封装B。
如图6所示，封装A，例如，具有由硅半导体构成的、厚度例如60μm左右的片状的半导体元件1，该半导体元件1被第1及第2布线用树脂膜3、3a夹持地覆盖。布线用树脂膜，是用于形成设在叠层布线基板的芯基板的表面上的布线图形的叠层的材料，环氧系热硬化树脂膜是其一例。在第1及第2布线用树脂膜表面，分别设置包括焊盘等的布线图形4、4a。
设在第1布线用树脂膜3的表面上的布线图形4，形成在半导体元件1的表面上，通过由埋入形成在第1布线用树脂膜上的贯通孔内的镀层等构成的连接布线6，电连接半导体元件1的内部电路(未图示)和电连接用的连接电极(未图示)。设在第1及第2布线用树脂膜3、3a上的布线图形4、4a，经由由埋入贯通上述布线用树脂膜形成的贯通孔内的镀层等构成的连接布线6，进行电连接。在第2布线用树脂膜3a的布线图形4a的连接电极部分，形成软焊料球等外部连接端子8。外部连接端子8，通过布线图形4、4a，与半导体元件1的内部电路电连接。除外部连接端子8外，以覆盖布线图形4、4a的方式，在第1及第2布线用树脂膜3、3a表面上，形成抗蚀剂等绝缘膜7、7a。
此外，叠层在封装A上的封装B，可以是与封装A相同的结构·材料，也可以是不相同的。但是，通过具有用第1及第2布线用树脂膜3′、3′a夹着所用的半导体元件1′的结构，两者一致。封装B，在被第2布线用树脂膜3′a的绝缘膜7′a覆盖的布线图形4′a上，形成软焊料球等内部连接端子8a，在第1布线用树脂膜3的布线图形4′上，形成未被绝缘膜7′覆盖的焊盘区域9。
在本实施例中，能够根据需要进一步叠层。此时，第3层的内部连接端子，与第2层的布线图形4′的焊盘区域9连接。
本实施例的半导体器件，如上所述，由于通过用布线用树脂膜夹着半导体元件，得到新的结构的封装，所以能够使半导体器件更加薄型化，通过多层叠层能够高密度化。
实施例3
下面，参照图7说明实施例3。
在本实施例中，其特征在于具有多个布线用树脂膜和用多个布线用树脂膜夹持半导体元件的结构。图7是在本实施例中说明的半导体器件的剖面图。采用该布线用树脂膜的封装，如以往的叠层布线基板一样，能够多层叠层。
如图7所示，半导体器件，例如，具有由硅半导体构成的、厚度例如60μm左右的片状的半导体元件1，该半导体元件1被第1及第2布线用树脂膜3、3a夹持地覆盖。布线用树脂膜，是用于形成设在叠层布线基板的芯基板的表面上的布线图形的叠层的材料，环氧系热硬化树脂膜是其一例。
第1布线用树脂膜3，由直接覆盖半导体元件1的第1层3b及覆盖第1层3b的第2层3c构成，第2布线用树脂膜3a，由直接覆盖半导体元件1的第1层3d及覆盖第1层3d的第2层3e构成。在这些布线用树脂膜上分别形成布线图形，通过这些布线图形电连接半导体元件1的内部电路和外部连接端子8。在第1布线用树脂膜的第1层3b及第2层3c、第2布线用树脂膜的第1层3d及第2层3e上，分别设置布线图形4b、4c、4d、4e。
通过埋入在贯通第1布线用树脂膜及第2布线用树脂膜形成的贯通孔内的连接布线6a，进行电连接。布线图形4c及布线图形4b，通过埋入在贯通第1布线用树脂膜得第1层3b及第2布线用树脂膜的第1层3d形成的贯通孔内的连接布线5b，进行电连接。布线图形4d及布线图形4e，通过形成在第2布线用树脂膜的第2层3e上的连接布线5a，进行电连接。
布线图形4b及形成在半导体元件1上的连接电极10，通过形成在第1布线用树脂膜的第1层3b上的连接布线5c，进行电连接。第1及第2布线用树脂膜表面，被绝缘膜7、7a覆盖保护。在第2布线用树脂膜3a的布线图形4a的连接电极部分上，形成软焊料球等外部连接端子8。外部连接端子8，经由布线图形4、4a，与半导体元件1的内部电路电连接。除外部连接端子8外，以覆盖布线图形的方式，在第1及第2布线用树脂膜3、3a表面上，形成抗蚀剂等绝缘膜7、7a。
本实施例的半导体器件，如上所述，通过用布线用树脂膜夹着半导体元件，得到新的结构的封装，能够使半导体器件薄型化。此外，根据本实施例的方法，能够一并加工硅等半导体晶片，另外通过用布线用树脂膜夹着半导体晶片，能够作为基体材料处理，有助于提高产量。此外，通过在用布线用树脂膜夹着硅晶片时，在元件间设置间隙，封装的外形形状不依赖于半导体元件的外形。

Claims (5)

1.一种半导体器件，其特征在于：
具有，
半导体元件；
夹着所述半导体元件的第1及第2布线用树脂膜；
分别形成在夹着所述半导体元件的第1及第2布线用树脂膜的露出的表面上的布线图形；
形成在所述第2布线用树脂膜的布线图形露出的表面上的外部连接端子；
形成在所述第1布线用树脂膜上的布线图形，与所述半导体元件电连接；形成在所述第2布线用树脂膜上的布线图形，与形成在所述第1布线用树脂膜上的布线图形电连接。
2.如权利要求1所述的半导体器件，其特征在于：形成在所述第1布线用树脂膜上的布线图形，和形成在所述第2布线用树脂膜的表面上的布线图形，通过埋入在贯通所述第1布线用树脂膜及第2布线用树脂膜形成的贯通孔内的连接布线，进行电连接。
3.如权利要求1或2所述的半导体器件，其特征在于：形成在所述第1布线用树脂膜表面上的布线图形，包括与外部连接端子电连接的第1布线和与形成在所述第2布线用树脂膜上的布线图形电连接的第2布线。
4.一种半导体器件的制造方法，其特征在于，具备以下步骤：
在与切片方向垂直的方向，在能伸缩的粘接片上，搭载通过切片分离成多个半导体元件的半导体晶片的步骤；
通过对所述粘接片施加张力，在所述半导体元件间形成间隙的步骤；
在所述粘接片上的半导体晶片上，从上面粘贴第1布线用树脂膜，并使其硬化的步骤；
从所述半导体晶片上除去所述粘接片，在除去该粘接片的面上，粘贴第2布线用树脂膜，并使其硬化的步骤；
在所述第1及第2布线用树脂膜的露出的表面上粘贴导电箔，并对其进行刻蚀处理，在各自的表面上形成布线图形的步骤；
通过埋入在形成在所述第1布线用树脂膜中的贯通孔内的连接布线，将形成在所述第1布线用树脂膜表面上的布线图形，电连接在所述半导体元件上的步骤；
通过埋入在形成在所述第1及第2布线用树脂膜中的贯通孔内的连接布线，将形成在所述第2布线用树脂膜表面上的布线图形，电连接在形成在所述第1布线用树脂膜的表面上的布线图形上的步骤；及
在所述第2布线用树脂膜的布线图形的表面上，连接外部连接端子的步骤。
5.如权利要求4所述的半导体器件的制造方法，其特征在于：埋入在所述贯通孔内的连接布线，通过镀敷形成。
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