CH505470A - Verfahren zur Herstellung einer Halbleitervorrichtung und gemäss diesem Verfahren hergestellte Halbleitervorrichtung - Google Patents

Verfahren zur Herstellung einer Halbleitervorrichtung und gemäss diesem Verfahren hergestellte Halbleitervorrichtung

Info

Publication number
CH505470A
CH505470A CH699168A CH699168A CH505470A CH 505470 A CH505470 A CH 505470A CH 699168 A CH699168 A CH 699168A CH 699168 A CH699168 A CH 699168A CH 505470 A CH505470 A CH 505470A
Authority
CH
Switzerland
Prior art keywords
semiconductor device
manufacturing
manufactured according
device manufactured
semiconductor
Prior art date
Application number
CH699168A
Other languages
English (en)
Inventor
Kooi Else
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH505470A publication Critical patent/CH505470A/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CH699168A 1967-05-13 1968-05-10 Verfahren zur Herstellung einer Halbleitervorrichtung und gemäss diesem Verfahren hergestellte Halbleitervorrichtung CH505470A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6706734.A NL158024B (nl) 1967-05-13 1967-05-13 Werkwijze ter vervaardiging van een halfgeleiderinrichting en halfgeleiderinrichting verkregen door toepassing van de werkwijze.

Publications (1)

Publication Number Publication Date
CH505470A true CH505470A (de) 1971-03-31

Family

ID=19800122

Family Applications (1)

Application Number Title Priority Date Filing Date
CH699168A CH505470A (de) 1967-05-13 1968-05-10 Verfahren zur Herstellung einer Halbleitervorrichtung und gemäss diesem Verfahren hergestellte Halbleitervorrichtung

Country Status (12)

Country Link
US (1) US3602981A (de)
AT (1) AT322632B (de)
BE (1) BE715098A (de)
BR (1) BR6898981D0 (de)
CH (1) CH505470A (de)
DE (1) DE1764155C3 (de)
DK (1) DK118413B (de)
ES (1) ES353792A1 (de)
FR (1) FR1564348A (de)
GB (1) GB1228854A (de)
NL (1) NL158024B (de)
SE (1) SE350151B (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2039141A1 (de) * 1969-08-22 1971-02-25 Molekularelektronik Verfahren zum Herstellen integrierter Halbleiteranordnungen mit komplementaeren Bipolartransistoren
US3739462A (en) * 1971-01-06 1973-06-19 Texas Instruments Inc Method for encapsulating discrete semiconductor chips
US3859180A (en) * 1971-01-06 1975-01-07 Texas Instruments Inc Method for encapsulating discrete semiconductor chips
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
FR2188304B1 (de) * 1972-06-15 1977-07-22 Commissariat Energie Atomique
US3944447A (en) * 1973-03-12 1976-03-16 Ibm Corporation Method for fabrication of integrated circuit structure with full dielectric isolation utilizing selective oxidation
US3922705A (en) * 1973-06-04 1975-11-25 Gen Electric Dielectrically isolated integral silicon diaphram or other semiconductor product
DE2460269A1 (de) * 1974-12-19 1976-07-01 Siemens Ag Bipolares transistorpaar mit elektrisch leitend miteinander verbundenen basisgebieten und verfahren zur herstellung des transistorpaares
JPS5252582A (en) * 1975-10-25 1977-04-27 Toshiba Corp Device and production for semiconductor
JPS5317069A (en) * 1976-07-30 1978-02-16 Fujitsu Ltd Semiconductor device and its production
US4814856A (en) * 1986-05-07 1989-03-21 Kulite Semiconductor Products, Inc. Integral transducer structures employing high conductivity surface features
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
US5488012A (en) * 1993-10-18 1996-01-30 The Regents Of The University Of California Silicon on insulator with active buried regions
KR100330651B1 (ko) * 1997-06-23 2002-03-29 사토 게니치로 Ｉｃ카드용 모듈, ｉｃ카드, 및 ｉｃ카드용 모듈의 제조방법
US6984571B1 (en) 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6500694B1 (en) * 2000-03-22 2002-12-31 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6902987B1 (en) * 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
US6563133B1 (en) * 2000-08-09 2003-05-13 Ziptronix, Inc. Method of epitaxial-like wafer bonding at low temperature and bonded structure
US7109092B2 (en) 2003-05-19 2006-09-19 Ziptronix, Inc. Method of room temperature covalent bonding
US11887945B2 (en) * 2020-09-30 2024-01-30 Wolfspeed, Inc. Semiconductor device with isolation and/or protection structures

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2875505A (en) * 1952-12-11 1959-03-03 Bell Telephone Labor Inc Semiconductor translating device
US3158788A (en) * 1960-08-15 1964-11-24 Fairchild Camera Instr Co Solid-state circuitry having discrete regions of semi-conductor material isolated by an insulating material
BE637064A (de) * 1962-09-07 Rca Corp
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements
US3355636A (en) * 1965-06-29 1967-11-28 Rca Corp High power, high frequency transistor
US3390022A (en) * 1965-06-30 1968-06-25 North American Rockwell Semiconductor device and process for producing same
US3442011A (en) * 1965-06-30 1969-05-06 Texas Instruments Inc Method for isolating individual devices in an integrated circuit monolithic bar

Also Published As

Publication number Publication date
BE715098A (de) 1968-11-13
DE1764155B2 (de) 1981-04-09
DK118413B (da) 1970-08-17
GB1228854A (de) 1971-04-21
DE1764155C3 (de) 1981-11-26
US3602981A (en) 1971-09-07
BR6898981D0 (pt) 1973-01-11
NL158024B (nl) 1978-09-15
SE350151B (de) 1972-10-16
NL6706734A (de) 1968-11-14
FR1564348A (de) 1969-04-18
DE1764155A1 (de) 1971-05-13
AT322632B (de) 1975-05-26
ES353792A1 (es) 1970-02-01

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