ATE164704T1 - Verfahren zur herstellung eines vertikalen pnp- vielfachkollektortransistors - Google Patents
Verfahren zur herstellung eines vertikalen pnp- vielfachkollektortransistorsInfo
- Publication number
- ATE164704T1 ATE164704T1 AT89300902T AT89300902T ATE164704T1 AT E164704 T1 ATE164704 T1 AT E164704T1 AT 89300902 T AT89300902 T AT 89300902T AT 89300902 T AT89300902 T AT 89300902T AT E164704 T1 ATE164704 T1 AT E164704T1
- Authority
- AT
- Austria
- Prior art keywords
- vertical
- pnp transistor
- regions
- collectors
- producing
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 3
- 238000002955 isolation Methods 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 abstract 2
- 239000007943 implant Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/154,832 US5023194A (en) | 1988-02-11 | 1988-02-11 | Method of making a multicollector vertical pnp transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE164704T1 true ATE164704T1 (de) | 1998-04-15 |
Family
ID=22552990
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT89300902T ATE164704T1 (de) | 1988-02-11 | 1989-01-31 | Verfahren zur herstellung eines vertikalen pnp- vielfachkollektortransistors |
Country Status (6)
Country | Link |
---|---|
US (1) | US5023194A (de) |
EP (1) | EP0328286B1 (de) |
JP (1) | JPH025564A (de) |
KR (1) | KR890013783A (de) |
AT (1) | ATE164704T1 (de) |
DE (1) | DE68928627D1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3145694B2 (ja) * | 1990-08-28 | 2001-03-12 | 日本電気株式会社 | 半導体装置 |
US5447766A (en) * | 1990-09-28 | 1995-09-05 | Nissei Asb Machine Co., Ltd. | Plastic vessel preform and mold for forming the same |
US5311054A (en) * | 1991-03-25 | 1994-05-10 | Harris Corporation | Graded collector for inductive loads |
US5248624A (en) * | 1991-08-23 | 1993-09-28 | Exar Corporation | Method of making isolated vertical pnp transistor in a complementary bicmos process with eeprom memory |
CA2165871C (en) * | 1994-12-30 | 2002-03-26 | Tadayoshi Takashima | Parison forming apparatus and parison forming method |
US5633180A (en) * | 1995-06-01 | 1997-05-27 | Harris Corporation | Method of forming P-type islands over P-type buried layer |
US5763835A (en) * | 1995-11-01 | 1998-06-09 | Raychem Corporation | Gel-filled closure |
US6365447B1 (en) * | 1998-01-12 | 2002-04-02 | National Semiconductor Corporation | High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth |
CN102496626B (zh) * | 2011-12-30 | 2014-03-26 | 清华大学 | 锗硅异质结双极晶体管结构 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3312882A (en) * | 1964-06-25 | 1967-04-04 | Westinghouse Electric Corp | Transistor structure and method of making, suitable for integration and exhibiting good power handling capability and frequency response |
US3488564A (en) * | 1968-04-01 | 1970-01-06 | Fairchild Camera Instr Co | Planar epitaxial resistors |
US3665266A (en) * | 1970-12-10 | 1972-05-23 | Motorola Inc | Low saturation resistance,low offset voltage,monolithic analog switch |
GB1298053A (en) * | 1971-03-26 | 1972-11-29 | Jury Nikolaevich Dyakov | Semiconductor device for a trigger storage cell |
JPS5942463B2 (ja) * | 1972-09-22 | 1984-10-15 | ソニー株式会社 | 半導体集積回路装置 |
US4038680A (en) * | 1972-12-29 | 1977-07-26 | Sony Corporation | Semiconductor integrated circuit device |
JPS524787A (en) * | 1975-07-01 | 1977-01-14 | Nec Corp | Transistor containing embedded base |
US4140558A (en) * | 1978-03-02 | 1979-02-20 | Bell Telephone Laboratories, Incorporated | Isolation of integrated circuits utilizing selective etching and diffusion |
US4458158A (en) * | 1979-03-12 | 1984-07-03 | Sprague Electric Company | IC Including small signal and power devices |
US4412376A (en) * | 1979-03-30 | 1983-11-01 | Ibm Corporation | Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation |
JPS5823471A (ja) * | 1981-08-05 | 1983-02-12 | Toshiba Corp | 半導体装置 |
JPS5967670A (ja) * | 1982-10-12 | 1984-04-17 | Toshiba Corp | 半導体装置 |
FR2543739B1 (fr) * | 1983-03-30 | 1986-04-18 | Radiotechnique Compelec | Procede de realisation d'un transistor bipolaire haute tension |
JPS60149163A (ja) * | 1984-01-17 | 1985-08-06 | Nec Corp | 半導体装置 |
DE3586341T2 (de) * | 1984-02-03 | 1993-02-04 | Advanced Micro Devices Inc | Bipolartransistor mit in schlitzen gebildeten aktiven elementen. |
-
1988
- 1988-02-11 US US07/154,832 patent/US5023194A/en not_active Expired - Lifetime
-
1989
- 1989-01-31 DE DE68928627T patent/DE68928627D1/de not_active Expired - Lifetime
- 1989-01-31 AT AT89300902T patent/ATE164704T1/de not_active IP Right Cessation
- 1989-01-31 EP EP89300902A patent/EP0328286B1/de not_active Expired - Lifetime
- 1989-02-11 KR KR1019890001585A patent/KR890013783A/ko not_active Application Discontinuation
- 1989-02-13 JP JP1031241A patent/JPH025564A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0328286A2 (de) | 1989-08-16 |
JPH025564A (ja) | 1990-01-10 |
US5023194A (en) | 1991-06-11 |
EP0328286A3 (de) | 1990-06-20 |
EP0328286B1 (de) | 1998-04-01 |
DE68928627D1 (de) | 1998-05-07 |
KR890013783A (ko) | 1989-09-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |