WO2024067830A1 - 封装结构、封装结构的制作方法及电子设备 - Google Patents
封装结构、封装结构的制作方法及电子设备 Download PDFInfo
- Publication number
- WO2024067830A1 WO2024067830A1 PCT/CN2023/122748 CN2023122748W WO2024067830A1 WO 2024067830 A1 WO2024067830 A1 WO 2024067830A1 CN 2023122748 W CN2023122748 W CN 2023122748W WO 2024067830 A1 WO2024067830 A1 WO 2024067830A1
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- WIPO (PCT)
- Prior art keywords
- layer
- substrate
- plastic
- packaging structure
- antenna
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 121
- 238000000465 moulding Methods 0.000 claims abstract description 11
- 238000004806 packaging method and process Methods 0.000 claims description 100
- 238000007789 sealing Methods 0.000 claims description 92
- 238000000034 method Methods 0.000 claims description 36
- 238000005538 encapsulation Methods 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 238000009713 electroplating Methods 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 8
- 238000001704 evaporation Methods 0.000 claims description 5
- 230000008020 evaporation Effects 0.000 claims description 5
- 238000000206 photolithography Methods 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000000608 laser ablation Methods 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 238000009987 spinning Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 2
- 239000011810 insulating material Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 238000003466 welding Methods 0.000 description 7
- 238000005520 cutting process Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 1
- 101000827703 Homo sapiens Polyphosphoinositide phosphatase Proteins 0.000 description 1
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 1
- 102100023591 Polyphosphoinositide phosphatase Human genes 0.000 description 1
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 1
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004100 electronic packaging Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000000844 transformation Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
Definitions
- the present application relates to the technical field of electronic packaging, and in particular to a packaging structure, a method for manufacturing the packaging structure, and an electronic device.
- electromagnetic shielding is often required.
- the more common method currently used is to deposit a metal layer on the outer surface of the package body by sputtering, evaporation, etc. to form a five-sided (the upper surface and four side surfaces of the package body) shielding layer.
- the RF module needs an antenna to send and receive signals from the outside world.
- TMV Through molding via
- AoP Antenna on Package
- the main purpose of the present application is to provide a packaging structure, a method for manufacturing a packaging structure and an electronic device, aiming to solve the technical problem that the packaging structure in the prior art cannot simultaneously meet the requirements of electromagnetic shielding and antenna signal reception and transmission.
- the present application provides a packaging structure, including a substrate and an electronic component arranged on the substrate, a conductive hole is formed on the side of the substrate, a conductive part is arranged in the conductive hole, the electronic component is wrapped with a plastic sealing layer, the plastic sealing layer forms a plastic sealing groove surrounding the periphery of the electronic component, the plastic sealing layer includes a shielding area located in the plastic sealing groove, the packaging structure also includes a shielding layer covering the shielding area, an antenna is arranged on the side of the plastic sealing layer, and the antenna is electrically connected to the conductive part.
- the shielding layer includes a top layer and a side wall formed around the outer periphery of the top layer, the top layer covers the upper surface of the plastic packaging layer, the plastic packaging groove is an annular groove, and the side wall is arranged in the plastic packaging groove to shield the electronic components located in the shielding area.
- the top layer partially covers the upper surface of the plastic packaging layer, and the antenna extends from the side surface to the upper surface of the plastic packaging layer not covered by the top layer.
- a seed layer is disposed between the shielding area and the shielding layer, and between the side surface of the plastic packaging layer and the antenna.
- the seed layer is a metal layer
- the shielding layer and the antenna are disposed on the corresponding seed layer by electroplating.
- the conductive element is exposed on a side surface of the substrate.
- the present application also provides a method for manufacturing a packaging structure, the method for manufacturing a packaging structure comprising the following steps:
- a substrate is provided; wherein a conductive hole is provided on a side of the substrate, and a conductive member is provided in the conductive hole;
- plastic sealing a layer of plastic sealing layer on the substrate, and providing plastic sealing grooves in the plastic sealing layer around the periphery of the electronic components;
- the substrate is mounted on a carrier, and a seed layer is formed on the side of the substrate, the surface of the plastic sealing layer and in the plastic sealing groove;
- a shielding layer is provided on the plastic encapsulation layer and the seed layer in the plastic encapsulation groove, and an antenna is provided on the seed layer on the side of the substrate, so that the antenna is electrically connected to the conductive member;
- the carrier board is removed to obtain a packaging structure.
- the step of providing a substrate comprises:
- the step further includes:
- the circuit board is cut along the hole to form a plurality of the substrates.
- the conductive holes are formed after the holes are cut.
- the conductive parts in the conductive holes are exposed to form the lead-out ends of the antennas.
- the step of providing a shielding layer on the plastic encapsulation layer and the seed layer in the plastic encapsulation groove, and providing an antenna on the seed layer on the side of the substrate includes:
- a shielding layer is arranged on the plastic packaging layer and the seed layer in the plastic packaging groove by electroplating, and an antenna is arranged on the seed layer on the side of the substrate.
- the shielding layer partially covers the upper surface of the plastic encapsulation layer, and the step of providing an antenna on the seed layer on the side of the substrate so that the antenna is electrically connected to the conductive member includes:
- An antenna is arranged on the seed layer in an area on the upper surface of the plastic packaging layer where the shielding layer is not arranged.
- the step of forming a sub-layer on the side of the substrate, on the surface of the plastic sealing layer and in the plastic sealing groove comprises:
- the seed layer is formed once on the side of the substrate, on the surface of the molding layer and in the molding groove by sputtering deposition or evaporation deposition.
- the step of forming an insulating dielectric layer on the seed layer includes:
- An insulating dielectric layer is formed on the seed layer at one time by film pasting, glue spinning, spin coating or coating of insulating material.
- the step of forming a pattern area on the insulating dielectric layer comprises:
- a pattern region is formed on the insulating dielectric layer by laser ablation or photolithography.
- the method further includes:
- the balls are planted on the bottom of the substrate.
- the present application also provides an electronic device, which includes the packaging structure described above; or, the electronic device includes the packaging structure, and the packaging structure is manufactured by the manufacturing method of the packaging structure described above.
- the packaging structure includes a substrate and electronic components arranged on the substrate, a conductive hole is formed on the side of the substrate, a conductive part is arranged in the conductive hole, a plastic sealing layer is wrapped on the electronic component, the plastic sealing layer forms a plastic sealing groove surrounding the periphery of the electronic component, the plastic sealing layer includes a shielding area located in the plastic sealing groove, and the packaging structure also includes a shielding layer covered in the shielding area, an antenna is arranged on the side of the plastic sealing layer, and the antenna is electrically connected to the conductive part.
- the plastic sealing groove is arranged around the periphery of the electronic component, and the plastic sealing groove respectively positions the plastic sealing layer in the shielding area in the plastic sealing groove and in the non-shielding area outside the plastic sealing groove.
- the shielding area is plastic-sealed with electronic components, and the electronic components include a radio frequency module, which needs to be electromagnetically shielded. By covering the shielding layer on the shielding area, the electronic components in the shielding area can be shielded on five sides to achieve the electromagnetic shielding function.
- a conductive hole is provided on the side of the substrate, the conductive hole penetrates the substrate, a conductive member is provided in the conductive hole, the conductive member is exposed on the side of the substrate to form a lead-out terminal connected to the antenna, the antenna is provided on the side of the plastic packaging layer, and the antenna is connected to the conductive member so that the antenna can be electrically connected to the electronic components on the substrate through the conductive member and the substrate, and plays the role of receiving and transmitting signals with the outside world.
- the invention integrates the antenna receiving and transmitting signals and the electromagnetic shielding function in the same packaging structure, and makes full use of the area around the plastic packaging layer, and sets the antenna on the side of the plastic packaging layer, realizing the integration of functions without increasing the volume of the packaging structure, and has a good application prospect in the field of radio frequency packaging.
- FIG1 is a schematic cross-sectional view of a packaging structure according to an embodiment of the present application.
- FIG2 is a schematic diagram of the side structure of the packaging structure according to an embodiment of the present application.
- FIG3 is a schematic diagram of the structure of a shielding layer according to an embodiment of the present application.
- FIG4 is another schematic cross-sectional view of the packaging structure according to an embodiment of the present application.
- FIG5 is a schematic structural diagram of a substrate according to an embodiment of the present application.
- FIG6 is a schematic diagram of the structure of two substrates according to an embodiment of the present application.
- FIG7 is a schematic structural diagram of a substrate, a plastic sealing layer and a plastic sealing groove according to an embodiment of the present application;
- FIG8 is a schematic structural diagram of a substrate, a plastic encapsulation layer, a plastic encapsulation groove and a seed layer according to an embodiment of the present application;
- FIG. 9 is a schematic structural diagram of a substrate, a plastic encapsulation layer, a plastic encapsulation groove, a seed layer and an insulating dielectric layer according to an embodiment of the present application;
- FIG10 is a schematic diagram of photolithography of an insulating dielectric layer according to an embodiment of the present application.
- FIG11 is a schematic structural diagram of a substrate, a plastic encapsulation layer, a plastic encapsulation groove, a seed layer, and a pattern area according to an embodiment of the present application;
- FIG. 12 is a schematic structural diagram of a substrate, a plastic encapsulation layer, a plastic encapsulation groove, a seed layer, a pattern region and a shielding layer according to an embodiment of the present application;
- FIG. 13 is a schematic structural diagram of a substrate, a plastic encapsulation layer, a plastic encapsulation groove, a seed layer and a shielding layer according to an embodiment of the present application;
- FIG14 is a schematic flow chart of a first embodiment of a method for manufacturing a packaging structure according to an embodiment of the present application
- FIG15 is a schematic flow chart of a second embodiment of a method for manufacturing a packaging structure according to an embodiment of the present application.
- FIG. 16 is a flow chart of a third embodiment of a method for manufacturing a packaging structure according to an embodiment of the present application.
- the present application provides a packaging structure, including a substrate 2 and an electronic component 1 arranged on the substrate 2, a conductive hole 22 is formed on the side 21 of the substrate, a conductive part 3 is arranged in the conductive hole 22, the electronic component 1 is wrapped with a plastic sealing layer 4, the plastic sealing layer 4 forms a plastic sealing groove 5 surrounding the periphery of the electronic component 1, the plastic sealing layer 4 includes a shielding area 41 located in the plastic sealing groove 5, the packaging structure also includes a shielding layer 6 covering the shielding area 41, and an antenna 7 is arranged on the side 42 of the plastic sealing layer, and the antenna 7 is electrically connected to the conductive part 3.
- the plastic sealing layer 4 includes a lower surface, an upper surface 44 arranged opposite to the lower surface, and a plastic sealing layer side 42 connecting the upper surface 44 and the lower surface, wherein the lower surface is connected to the substrate 2.
- the plastic sealing groove 5 is arranged around the periphery of the electronic component 1, and the plastic sealing groove 5 respectively positions the plastic sealing layer 4 in a shielding area 41 inside the plastic sealing groove 5 and a non-shielding area 43 outside the plastic sealing groove 5.
- the electronic component 1 is plastic-sealed in the shielding area 41, and the electronic component 1 includes a radio frequency module and needs to be electromagnetically shielded.
- the electronic component 1 in the shielding area 41 can be shielded on five sides (the five sides refer to the top surface and four side surfaces) to achieve the electromagnetic shielding function.
- a conductive hole 22 is provided on the side surface 21 of the substrate, and the conductive hole 22 is provided through the substrate 2.
- a conductive member 3 is provided in the conductive hole 22, and the conductive member 3 is exposed on the side surface 21 of the substrate to form a lead-out terminal connected to the antenna 7.
- the antenna 7 is provided on the side surface 42 of the plastic packaging layer.
- the antenna 7 is connected to the conductive member 3 so that the antenna 7 can be electrically connected to the electronic component 1 on the substrate 2 through the conductive member 3 and the substrate 2, and plays the role of receiving and transmitting signals with the outside world.
- This embodiment integrates the signal receiving and transmitting function of the antenna 7 and the electromagnetic shielding function in the same packaging structure, and makes full use of the area around the plastic packaging layer 4.
- the antenna 7 is provided on the side surface 42 of the plastic packaging layer, and the function integration is realized without increasing the volume of the packaging structure, and has a good application prospect in the field of radio frequency packaging.
- the electronic component 1 includes an active electronic component 1 and a passive electronic component 1.
- the active electronic component 1 will transmit signals to the outside, such as a MEMS chip and an ASIC chip, and needs to be electromagnetically shielded, while the passive electronic component 1 may not be electromagnetically shielded. Therefore, the electronic components 1 in this embodiment may only refer to active electronic components 1, and the shielding layer 6 only shields the active electronic components 1, or may include active electronic components 1 and passive electronic components 1.
- the conductive member 3 here may be made of metal, such as copper, aluminum or alloys thereof.
- the shielding layer 6 includes a top layer 61 and a side enclosure 62 formed around the periphery of the top layer 61, the top layer 61 covers the upper surface 44 of the plastic sealing layer 4, the plastic sealing groove 5 is an annular groove, and the side enclosure 62 is arranged in the plastic sealing groove 5, and the electronic component 1 is covered in the space formed by the shielding layer 6 and the substrate 2 to shield the electronic component 1 located in the shielding area 41.
- the plastic sealing groove 5 is a closed annular groove
- the side enclosure 62 of the shielding layer 6 is also a closed annular side enclosure 62, which cooperates with the top layer 61 to shield the top surface and surrounding of the electronic component 1, thereby realizing five-sided electromagnetic shielding.
- the top layer 61 partially covers the upper surface 44 of the plastic layer 4, and the antenna 7 extends from the side to the upper surface 44 of the plastic layer 4 that is not covered by the shielding layer 6.
- the antenna 7 can be arranged only on the side 42 of the plastic layer, and the external wiring is connected to the antenna 7 on the side 42 of the plastic layer.
- the antenna 7 can also be extended to the upper surface 44 of the plastic layer 4, and connected to the external wiring on the upper surface 44 of the plastic layer 4, which can be determined according to actual needs and packaging size requirements.
- a seed layer 8 is provided between the shielding area 41 and the shielding layer 6, and a seed layer 8 is provided between the side surface 42 of the plastic packaging layer and the antenna 7.
- the seed layer 8 is a metal layer, and the shielding layer 6 and the antenna 7 are provided on the corresponding seed layer 8 by electroplating.
- the seed layer 8 here can be a metal layer, mainly for the convenience of forming the shielding layer 6 and the antenna 7 on the seed layer 8 during the electroplating process.
- the conductive member 3 is exposed on the side surface 21 of the substrate.
- the conductive member 3 is exposed on the substrate 2 mainly to facilitate connection with the antenna 7.
- the seed layer 8 can also be formed on the surface of the conductive member 3.
- the seed layer 8 is made of conductive metal, and the antenna 7 is electrically connected to the conductive member 3 through the seed layer 8.
- the present application further provides a method for manufacturing a packaging structure, the method for manufacturing a packaging structure comprising the following steps:
- Figures 5 to 13 show schematic diagrams of the manufacturing process of the packaging structure.
- the substrate side 21 refers to the edges of the substrate 2, and the conductive hole 22 is a through hole that penetrates the substrate 2.
- the conductive member 3 is arranged in the conductive hole 22 to play a role in signal transmission, and the signal of the electronic component 1 installed on the substrate 2 can be transmitted through the surface of the substrate 2 and the conductive member 3.
- the conductive member 3 can be exposed on the substrate 2.
- the conductive member 3 here can be made of metal, such as copper, aluminum or its alloy.
- the electronic components 1 can be subjected to flip-chip welding, lead welding and SMT according to the conventional packaging process flow.
- the flip-chip welding technology refers to a technology in which the IC chip faces downward and is directly interconnected with the packaging shell or wiring substrate. It is also called flip-chip welding technology.
- Lead bonding is a process of connecting each electrode on the transistor die with the lead wire (i.e., the pin) of the tube seat using metal leads.
- lead welding There are many methods and ways of lead welding, and the most commonly used ones are hot pressing welding, ultrasonic welding, etc.
- SMT is surface mounting technology (full name in English: Surface Mounted Technology), which is the most popular technology and process in the electronic assembly industry.
- the electronic components 1 After the electronic components 1 are assembled, they are plastic-sealed to form a plastic-sealing layer 4 on the substrate 2.
- a plastic-sealing groove 5 is formed by laser cutting grooves on the surface of the plastic-sealing layer 4 in the area where electromagnetic shielding is required.
- the plastic-sealing groove 5 is arranged around the periphery of the electronic components 1.
- the plastic-sealing groove 5 respectively positions the plastic-sealing layer 4 in the shielding area 41 inside the plastic-sealing groove 5 and the non-shielding area 43 outside the plastic-sealing groove 5.
- the electronic components 1 are plastic-sealed in the shielding area 41.
- the electronic components 1 include a radio frequency module and need to be electromagnetically shielded.
- the electronic components 1 include active electronic components 1 and passive electronic components 1.
- the active electronic components 1 will emit signals to the outside and need to be electromagnetically shielded.
- the passive electronic components 1 may not be electromagnetically shielded. Therefore, the electronic components 1 in this embodiment may refer only to active electronic components 1, or may include active electronic components 1 and passive electronic components 1.
- FIG8 is a carrier board 10 installed on the basis of FIG7 , and a seed layer 8 is set.
- the carrier board 10 is a transition board, which is removed after the subsequent production is completed.
- the bottom surface of the substrate 2 is installed on the carrier board 10, which can prevent the seed layer 8 from being formed on the bottom surface of the substrate 2 during the process of setting the seed layer 8.
- the seed layer 8 is formed at one time on the side surface 21 of the substrate, the surface of the plastic sealing layer 4 and the plastic sealing groove 5, rather than being formed separately.
- the seed layer 8 here can be a metal layer, the seed layer 8 is relatively thin, and the shielding layer 6 and the antenna 7 are set on the seed layer 8 by electroplating.
- the seed layer 8 is mainly set to facilitate the formation of the shielding layer 6 and the antenna 7 on the seed layer 8 during the subsequent electroplating process.
- a seed layer 8 can be formed in sequence on the side surface 21 of the substrate, the surface of the plastic sealing layer 4 and the plastic sealing groove 5 by sputtering deposition or evaporation deposition.
- FIG. 9 adds an insulating dielectric layer 9 on the basis of FIG. 8 .
- an insulating dielectric layer 9 can be formed once on the seed layer 8 by film pasting, spin coating, spinning or coating.
- the insulating dielectric layer 9 can be a photoresist layer.
- a graphic area 91 can also be formed on the insulating dielectric layer 9 by laser ablation or photolithography. Referring to FIG. 10 and FIG. 11 , taking photolithography as an example, arrow A indicates the direction of light irradiation.
- the insulating dielectric layer 9 can be partially shielded by the opaque position 13 of the mask.
- the shading area is the graphic area 91, and the transparent area is the non-graphic area, also known as the window area.
- the non-graphic area of the insulating dielectric layer 9 can be removed to expose part of the seed layer 8. Since the seed layer 8 is conductive, it is convenient to perform electroplating on the exposed seed layer 8 later. However, since the insulating dielectric layer 9 is not conductive in the graphic area 91, it cannot be electroplated.
- FIG. 12 is provided with a shielding layer 6 based on FIG. 11 .
- a shielding layer 6 can be electroplated on the seed layer 8 in the plastic sealing layer 4 and the plastic sealing groove 5 by electroplating, and an antenna 7 can be electroplated on the seed layer 8 on the side 21 of the substrate.
- electroplating is performed on the seed layer 8 at the exposed part, and the electroplated part has a shielding layer 6 of a certain thickness.
- the shielding layer 6 can be made of metal, such as copper or iron, and the specific material and thickness can be set according to actual needs.
- the electronic components 1 in the shielding area 41 can be shielded on five sides (the five sides refer to the top surface and four side surfaces, and one side is the substrate 2), thereby realizing the electromagnetic shielding function.
- a conductive hole 22 is provided on the side of the substrate 2, and the conductive hole 22 is provided through the substrate 2.
- a conductive member 3 is provided in the conductive hole 22. The conductive member 3 is exposed on the side 21 of the substrate to form a lead-out terminal connected to the antenna 7.
- the antenna 7 is provided on the side 42 of the plastic packaging layer. The antenna 7 is connected to the conductive member 3 so that the antenna 7 can be electrically connected to the electronic component 1 on the substrate 2 through the conductive member 3 and the substrate 2, thereby playing the role of sending and receiving signals with the outside world.
- FIG. 13 removes the graphic area 91 based on FIG. 12 .
- the graphic area 91 of the insulating dielectric layer 9 that has not been removed before is partially removed, and after the seed layer 8 between the graphic area 91 and the plastic packaging layer 4 is exposed, the metal layer serving as the seed layer 8 is removed by micro-etching.
- the required metal graphics are formed on the upper surface 44 and the four sides of the packaging structure, the upper surface 44 serves as the metal shielding layer 6, and the metal circuits formed by electroplating on the four sides serve as the antenna 7;
- Fig. 1 is based on Fig. 13 except that the carrier 10 is removed. After the carrier 10 is removed, a package structure product is obtained. The package structure is shown in Fig. 1.
- the plastic sealing groove 5 is arranged around the periphery of the electronic component 1, and the plastic sealing groove 5 respectively positions the plastic sealing layer 4 in the shielding area 41 in the plastic sealing groove 5 and the non-shielding area 43 outside the plastic sealing groove 5, and the electronic component 1 is plastic-sealed in the shielding area 41, and the electronic component 1 includes a radio frequency module, which needs to be electromagnetically shielded.
- the shielding layer 6 By covering the shielding layer 6 on the shielding area 41, the electronic component 1 in the shielding area 41 can be shielded on five sides to achieve the electromagnetic shielding function.
- a conductive hole 22 is arranged on the side of the substrate 2, and the conductive hole 22 is arranged through the substrate 2.
- a conductive member 3 is arranged in the conductive hole 22, and the conductive member 3 is exposed on the side 21 of the substrate to form a lead-out terminal connected to the antenna 7.
- the antenna 7 is arranged on the side 42 of the plastic sealing layer, and the antenna 7 is connected to the conductive member 3 so that the antenna 7 can be electrically connected to the electronic component 1 on the substrate 2 through the conductive member 3 and the substrate 2, so as to play the role of receiving and transmitting signals with the outside world.
- This embodiment integrates the signal receiving and transmitting functions and electromagnetic shielding functions of the antenna 7 in the same packaging structure, and fully utilizes the area around the plastic packaging layer 4.
- the antenna 7 is arranged on the side 42 of the plastic packaging layer, thereby achieving functional integration without increasing the volume of the packaging structure. It has good application prospects in the field of radio frequency packaging.
- S101 providing a circuit board, planning the circuit board into a plurality of substrates 2, setting holes around each substrate 2, and setting a conductive member 3 in the hole;
- the substrate 2 here may be formed by cutting a circuit board, so before drilling holes on the substrate 2, the circuit board may be divided first, such as into a plurality of connected substrates 2, and the drilling positions may be designed or marked on the side 21 of the substrate, and the circuit board may be cut along the hole positions later;
- step S20 After step S20 and before step S30, the following steps are further included:
- Fig. 6 shows a schematic diagram of the structure of dividing a circuit board into two substrates 2.
- the circuit board can be cut along the symmetry line of the hole position, so that a conductive hole 22 is formed on the side 21 of the substrate after cutting, and the conductive member 3 in the conductive hole 22 is exposed to facilitate subsequent electrical connection with the antenna 7.
- step S70 the following steps are further included:
- S80 planting balls at the bottom of the substrate 2.
- the packaging structure of S70 can be planted to form solder balls 11 according to actual needs, so as to facilitate connection with other external components.
- the packaging structure with the implanted solder balls 11 is shown in FIG. 2 or FIG. 4.
- the present application further provides an electronic device, the electronic device includes the above-mentioned packaging structure; or the electronic device includes the packaging structure, and the packaging structure is made by the above-mentioned packaging structure manufacturing method. Since the electronic device includes all technical solutions of all embodiments of the above-mentioned packaging structure, it at least has all the beneficial effects brought by all the above-mentioned technical solutions, which will not be described one by one here.
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- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
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- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
本申请提供一种封装结构、封装结构的制作方法及电子设备，封装结构包括基板和设置于基板上的电子元器件，基板侧面形成有导电孔，导电孔内设置有导电件，电子元器件上包裹有塑封层，塑封层形成有围绕电子元器件***的塑封槽，塑封层包括位于塑封槽内的屏蔽区域，封装结构还包括罩设于屏蔽区域的屏蔽层，塑封层侧面设置有天线，天线与导电件电连接。
Description
本申请要求于2022年9月29日申请的、申请号为202211212927.2的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
本申请涉及电子封装技术领域，尤其涉及一种封装结构、封装结构的制作方法及电子设备。
对于一些射频模组封装，常常需要做电磁屏蔽，目前采用的比较通用的方法是在封装体外表面通过溅射、蒸发等方式沉积金属层形成五面（封装体的上表面和四个侧面）的屏蔽层。在有些情况下，射频模组需要天线和外界收发信号，这时可以通过TMV（Through molding via，塑封料导电孔）集成在塑封层的表面形成AoP（Antenna on Package，封装上天线）。但由于封装表面空间的限制以及封装工艺的限制，现有技术中没有能够同时满足电磁屏蔽和天线设置两种需求的封装结构。
鉴于此，有必要提供一种新的封装结构、封装结构的制作方法及电子设备，以解决或至少缓解上述技术缺陷。
本申请的主要目的是提供一种封装结构、封装结构的制作方法及电子设备，旨在解决现有技术中的封装结构无法同时满足电磁屏蔽和天线收发信号需求的技术问题。
为实现上述目的，根据本申请的一个方面，本申请提供一种封装结构，包括基板和设置于所述基板上的电子元器件，所述基板侧面形成有导电孔，所述导电孔内设置有导电件，所述电子元器件上包裹有塑封层，所述塑封层形成有围绕所述电子元器件***的塑封槽，所述塑封层包括位于所述塑封槽内的屏蔽区域，所述封装结构还包括罩设于所述屏蔽区域的屏蔽层，所述塑封层侧面设置有天线，所述天线与所述导电件电连接。
在一实施例中，所述屏蔽层包括顶层和围绕所述顶层外周形成的侧围，所述顶层覆盖于所述塑封层的上表面，所述塑封槽为环形槽，所述侧围设置于所述塑封槽内，以屏蔽位于所述屏蔽区域的所述电子元器件。
在一实施例中，所述顶层部分覆盖于所述塑封层的上表面，所述天线自所述侧面延伸至所述塑封层未被所述顶层覆盖的所述上表面。
在一实施例中，所述屏蔽区域与所述屏蔽层之间，以及所述塑封层侧面与所述天线之间均设置有种子层。
在一实施例中，所述种子层为金属层，所述屏蔽层和所述天线通过电镀设置于对应的所述种子层上。
在一实施例中，所述导电件外露于所述基板侧面。
根据本申请的另一方面，本申请还提供一种封装结构的制作方法，所述封装结构的制作方法包括以下步骤：
提供一基板；其中，在基板侧面设置导电孔，在所述导电孔内设置导电件；
在所述基板上组装电子元器件，组装完成后在所述基板上塑封一层塑封层，并在所述塑封层内围绕所述电子元器件***设置塑封槽；
将所述基板安装于一载板上，并在所述基板侧面、所述塑封层表面和所述塑封槽内形成一种子层；
在所述种子层上形成一绝缘介质层，在所述绝缘介质层上形成图形区域，去除所述绝缘介质层的非图形区域以裸露出部分所述种子层；
在所述塑封层和所述塑封槽内的所述种子层上设置屏蔽层，在所述基板侧面的所述种子层上设置天线，使得所述天线与所述导电件电连接；
去除所述绝缘介质层的所述图形区域，以及所述图形区域与所述塑封层之间的所述种子层；
去除所述载板，得到封装结构。
在一实施例中，所述提供一基板的步骤包括：
提供一电路板，将所述电路板规划为多个所述基板，在每一所述基板四周设置孔位，在所述孔位内设置导电件；
所述并在所述塑封层内围绕所述电子元器件***设置塑封槽的步骤之后，所述将所述基板安装于一载板上的步骤之前，还包括步骤：
将所述电路板沿所述孔位切割形成多个所述基板，所述孔位切割后形成所述导电孔，所述导电孔内的所述导电件外露形成所述天线的引出端。
在一实施例中，所述在所述塑封层和所述塑封槽内的所述种子层上设置屏蔽层，在所述基板侧面的所述种子层上设置天线的步骤包括：
通过电镀的方式，在所述塑封层和所述塑封槽内的所述种子层上设置屏蔽层，在所述基板侧面的所述种子层上设置天线。
在一实施例中，所述屏蔽层部分覆盖于所述塑封层的上表面，所述在所述基板侧面的所述种子层上设置天线，使得所述天线与所述导电件电连接的步骤包括：
在所述塑封层上表面未设置所述屏蔽层的区域的所述种子层上设置天线。
在一实施例中，所述在所述基板侧面、所述塑封层表面和所述塑封槽内形成一种子层的步骤包括：
通过溅射沉积或蒸发沉积在所述基板侧面、所述塑封层表面和所述塑封槽内一次形成一所述种子层。
在一实施例中，所述在所述种子层上形成一绝缘介质层的步骤包括：
通过贴膜、甩胶、旋涂或涂覆绝缘材料的方式在所述种子层上一次形成一绝缘介质层。
在一实施例中，所述在所述绝缘介质层上形成图形区域的步骤包括：
通过激光烧蚀或光刻在所述绝缘介质层上形成图形区域。
在一实施例中，所述得到封装结构的步骤之后，还包括：
在所述基板底部植球。
根据本申请的又一方面，本申请还提供一种电子设备，所述电子设备包括上述所述的封装结构；或者，所述电子设备包括封装结构，所述封装结构由上述所述的封装结构的制作方法制成。
上述方案中，封装结构包括基板和设置于基板上的电子元器件，基板侧面形成有导电孔，导电孔内设置有导电件，电子元器件上包裹有塑封层，塑封层形成有围绕电子元器件***的塑封槽，塑封层包括位于塑封槽内的屏蔽区域，封装结构还包括罩设于屏蔽区域的屏蔽层，塑封层侧面设置有天线，天线与导电件电连接。塑封槽围绕电子元器件的***设置，塑封槽将塑封层分别位于塑封槽内的屏蔽区域和位于塑封槽外的非屏蔽区域，屏蔽区域内塑封有电子元器件，电子元器件包括射频模组，需要做电磁屏蔽。通过屏蔽层罩设于屏蔽区域上，可以对屏蔽区域内的电子元器件实现五面屏蔽，实现电磁屏蔽功能。此外，在基板的侧面设置有导电孔，导电孔贯穿基板设置，在导电孔内设置导电件，导电件外露于基板侧面形成与天线连接的引出端，将天线设置于塑封层侧面，天线与导电件连接使得天线通过导电件和基板能够与基板上的电子元器件电连接，起到与外界收发信号的作用。该发明将天线收发信号和电磁屏蔽功能集成在同一封装结构中，并且充分利用塑封层四周的面积，将天线设置于塑封层侧面，在不增加封装结构体积的情况下实现了功能的集成，在射频封装领域具有很好的应用前景。
为了更清楚地说明本申请实施方式或现有技术中的技术方案，下面将对实施方式或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施方式，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为本申请实施例封装结构的剖面结构示意图；
图2为本申请实施例封装结构的侧面结构示意图；
图3为本申请实施例屏蔽层的结构示意图；
图4为本申请实施例封装结构的另一剖面结构示意图；
图5为本申请实施例基板的结构示意图；
图6为本申请实施例两块基板的结构示意图；
图7为本申请实施例基板、塑封层和塑封槽的结构示意图；
图8为本申请实施例基板、塑封层、塑封槽和种子层的结构示意图；
图9为本申请实施例基板、塑封层、塑封槽、种子层和绝缘介质层的结构示意图；
图10为本申请实施例对绝缘介质层进行光刻的示意图；
图11为本申请实施例基板、塑封层、塑封槽、种子层和图形区域的结构示意图；
图12为本申请实施例基板、塑封层、塑封槽、种子层、图形区域和屏蔽层的结构示意图；
图13为本申请实施例基板、塑封层、塑封槽、种子层和屏蔽层的结构示意图；
图14为本申请实施例封装结构的制作方法的第一实施例的流程示意图；
图15为本申请实施例封装结构的制作方法的第二实施例的流程示意图；
图16为本申请实施例封装结构的制作方法的第三实施例的流程示意图。
附图标号说明：
1、电子元器件；2、基板；21、基板侧面；22、导电孔；3、导电件；4、塑封层；41、屏蔽区域；42、塑封层侧面；43、非屏蔽区域；44、上表面；5、塑封槽；6、屏蔽层；61、顶层；62、侧围；7、天线；8、种子层；9、绝缘介质层；91、图形区域；10、载板；11、焊球；12、电路板；13、不透光位置。
本申请目的的实现、功能特点及优点将结合实施方式，参照附图做进一步说明。
下面将结合本申请实施方式中的附图，对本申请实施方式中的技术方案进行清楚、完整地描述，显然，所描述的实施方式仅仅是本申请的一部分实施方式，而不是全部的实施方式。基于本申请中的实施方式，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施方式，都属于本申请保护的范围。
需要说明，本申请实施方式中所有方向性指示（诸如上、下……）仅用于解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，在本申请中如涉及“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。
并且，本申请各个实施方式之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
参见图1~图5，根据本申请的一个方面，本申请提供一种封装结构，包括基板2和设置于基板2上的电子元器件1，基板侧面21形成有导电孔22，导电孔22内设置有导电件3，电子元器件1上包裹有塑封层4，塑封层4形成有围绕电子元器件1***的塑封槽5，塑封层4包括位于塑封槽5内的屏蔽区域41，封装结构还包括罩设于屏蔽区域41的屏蔽层6，塑封层侧面42设置有天线7，天线7与导电件3电连接。
上述实施例中，塑封层4包括下表面、与下表面相对设置的上表面44和连接上表面44和下表面的塑封层侧面42，其中，下表面与基板2连接。塑封槽5围绕电子元器件1的***一圈设置，塑封槽5将塑封层4分别位于塑封槽5内的屏蔽区域41和位于塑封槽5外的非屏蔽区域43，屏蔽区域41内塑封有电子元器件1，电子元器件1包括射频模组，需要做电磁屏蔽。通过屏蔽层6罩设于屏蔽区域41上，可以对屏蔽区域41内的电子元器件1实现五面屏蔽（五面指顶面和四个侧面），实现电磁屏蔽功能。此外，在基板侧面21设置有导电孔22，导电孔22贯穿基板2设置，在导电孔22内设置导电件3，导电件3外露于基板侧面21形成与天线7连接的引出端，将天线7设置于塑封层侧面42，天线7与导电件3连接使得天线7通过导电件3和基板2能够与基板2上的电子元器件1电连接，起到与外界收发信号的作用。该实施例将天线7收发信号和电磁屏蔽功能集成在同一封装结构中，并且充分利用塑封层4四周的面积，将天线7设置于塑封层侧面42，在不增加封装结构体积的情况下实现了功能的集成，在射频封装领域具有很好的应用前景。这里需要说明的是，电子元器件1包括有源电子元器件1和无源电子元器件1，有源电子元器件1会对外发射信号，如MEMES芯片和ASIC芯片等，需要做电磁屏蔽，无源电子元器件1可以不做电磁屏蔽。故本实施例中的电子元器件1可以仅指有源电子元器件1，屏蔽层6仅对有源电子元器件1进行屏蔽，也可以包括有源电子元器件1和无源电子元器件1。这里的导电件3可以由金属制成，如铜、铝或其合金等。
参见图1~图3，在一实施例中，屏蔽层6包括顶层61和围绕顶层61外周形成的侧围62，顶层61覆盖于塑封层4的上表面44，塑封槽5为环形槽，侧围62设置于塑封槽5内，将电子元器件1罩设于屏蔽层6和基板2形成的空间内，以屏蔽位于屏蔽区域41的电子元器件1。塑封槽5为封闭的环形槽，屏蔽层6的侧围62也是一个封闭的环形的侧围62，与顶层61配合，可以对电子元器件1的顶面及四周起到屏蔽作用，实现五面电磁屏蔽。
参见图4，在一实施例中，顶层61部分覆盖于塑封层4的上表面44，天线7自侧面延伸至塑封层4未被屏蔽层6覆盖的上表面44。天线7可以仅设置在塑封层侧面42上，此时外部接线与天线7在塑封层侧面42连接。为减小横向尺寸，也可以将天线7延伸至塑封层4的上表面44，在塑封层4的上表面44与外部接线，这个可以根据实际需要和封装尺寸要求确定。
在一实施例中，屏蔽区域41与屏蔽层6之间设置有种子层8，塑封层侧面42与天线7之间设置有种子层8。种子层8为金属层，屏蔽层6和天线7通过电镀设置于对应的种子层8上。这里的种子层8可以是金属层，主要是为了电镀过程中方便在种子层8上形成屏蔽层6和天线7。
在一实施例中，导电件3外露于基板侧面21，导电件3外露于基板2主要是方便与天线7连接。在通过溅射沉积或蒸发沉积设置种子层8的过程中，也能够会在导电件3表面形成种子层8，种子层8是由导电金属制成，天线7通过种子层8与导电件3电连接。
根据本申请的另一方面，参见图14，根据本申请的第一实施例，本申请还提供一种封装结构的制作方法，封装结构的制作方法包括以下步骤：
S10，提供一基板2；在基板侧面21设置有导电孔22，在导电孔22内设置有导电件3；
图5~图13示出了封装结构的制作过程示意图。参见图5，基板侧面21指在基板2的四周边缘，导电孔22是贯穿基板2的通孔，在导电孔22内设置导电件3起到信号传递的作用，能够将安装于基板2上的电子元器件1的信号通过基板2表面及导电件3传递出来，为方便后续导电件3与天线7信号连接，可以将导电件3外露于基板2设置，这里的导电件3可以由金属制成，如铜、铝或其合金等。
S20，在基板2上组装电子元器件1，组装完成后在基板2上塑封一层塑封层4，并在塑封层4内围绕电子元器件1***设置塑封槽5；
参见图7，可以按照常规的封装工艺流程进行电子元器件1的倒装焊接、引线焊接和SMT等，倒装焊技术是指IC芯片面朝下，与封装外壳或布线基板直接互连的一种技术。又称倒扣焊技术。引线焊接（lead bonding）是采用金属引线，把晶体管管芯上的各个电极同管座引出线(即管脚)连接起来的一道工序。引线焊接的方法和方式很多，采用较多的是热压焊、超声焊等。SMT是表面组装技术（英文全称：Surface Mounted Technology，表面贴装技术），是电子组装行业里最流行的一种技术和工艺。在电子元器件1组装完成后进行塑封在基板2上形成塑封层4，通过激光方式在需要做电磁屏蔽的区域的塑封层4表面开槽形成塑封槽5，塑封槽5围绕电子元器件1的***设置，塑封槽5将塑封层4分别位于塑封槽5内的屏蔽区域41和位于塑封槽5外的非屏蔽区域43，屏蔽区域41内塑封有电子元器件1，电子元器件1包括射频模组，需要做电磁屏蔽。这里需要说明的是，电子元器件1包括有源电子元器件1和无源电子元器件1，有源电子元器件1会对外发射信号，需要做电磁屏蔽，无源电子元器件1可以不做电磁屏蔽。故本实施例中的电子元器件1可以仅指有源电子元器件1，也可以包括有源电子元器件1和无源电子元器件1。
S30，将基板2安装于一载板10上，并在基板侧面21、塑封层4表面和塑封槽5内形成一种子层8；
参见图8，图8在图7的基础上安装了一个载板10，并且设置了种子层8。载板10是一个过渡板，后续制作完成后拆除，将基板2底面安装于载板10上，可以防止设置种子层8的过程中基板2底面也形成种子层8。需要说明的是，种子层8是在基板侧面21、塑封层4表面和塑封槽5内一次成型的，而不是分别成型。这里的种子层8可以是金属层，种子层8较薄，屏蔽层6和天线7通过电镀设置于种子层8上。设置种子层8主要是为了后续电镀过程中方便在种子层8上形成屏蔽层6和天线7。具体地，可以通过溅射沉积或蒸发沉积在基板侧面21、塑封层4表面和塑封槽5内依次形成一种子层8。
S40，在种子层8上形成一绝缘介质层9，在绝缘介质层9上形成图形区域91，去除绝缘介质层9的非图形区域以裸露出部分种子层8；
参见图9，图9在图8的基础上增加了绝缘介质层9，具体可以通过贴膜、旋涂、甩胶或涂覆在种子层8上一次形成一绝缘介质层9，这里的绝缘介质层9可以是光刻胶层。还可以通过激光烧蚀或光刻在绝缘介质层9上形成图形区域91。参见图10和图11，以光刻为例，箭头A标示光线照射方向，采用图形转移技术，可以用光罩的不透光位置13对绝缘介质层9进行部分遮光，遮光区域为图形区域91，透光区域为非图形区域，也称窗口区域。可以将绝缘介质层9的非图形区域去除露出部分种子层8，由于种子层8能够导电，方便后续在裸露处的种子层8上进行电镀，而在图形区域91上由于绝缘介质层9不能导电，因此不能电镀。
S50，在塑封层4和塑封槽5内的种子层8上设置屏蔽层6，在基板侧面21的种子层8上设置天线7，使得天线7与导电件3连接；
参见图12，图12在图11的基础上设置了屏蔽层6。具体地，可以通过电镀的方式，在塑封层4和塑封槽5内的种子层8上电镀一层屏蔽层6，在基板侧面21的种子层8上电镀天线7。这里即在裸露处的种子层8上进行电镀，电镀处具有一定厚度的屏蔽层6，屏蔽层6可以由金属制成，如铜或铁等，具体材质和厚度可以根据实际需要进行设置。通过屏蔽层6罩设于屏蔽区域41上，可以对屏蔽区域41内的电子元器件1实现五面屏蔽（五面指顶面和四个侧面，还有一面为基板2），实现电磁屏蔽功能。此外，在基板2的侧面设置有导电孔22，导电孔22贯穿基板2设置，在导电孔22内设置导电件3，导电件3外露于基板侧面21形成与天线7连接的引出端，将天线7设置于塑封层侧面42，天线7与导电件3连接使得天线7通过导电件3和基板2能够与基板2上的电子元器件1电连接，起到与外界收发信号的作用。
S60，去除绝缘介质层9的图形区域91，以及图形区域91与塑封层4之间的种子层8；
参见图12，图13在图12的基础上去除了图形区域91。将之前未去除的绝缘介质层9的图形区域91部分去除，待图形区域91与塑封层4之间的种子层8露出后，通过微蚀刻的方法将作为种子层8的金属层去除，此时在封装结构上表面44和四侧形成了所需要的金属图形，上表面44作为金属屏蔽层6，四侧电镀成型的金属线路作为天线7；
S70，去除载板10，得到封装结构。
参见图1，图1在图13的基础上去除了载板10。将载板10去除，就得到封装结构产品。封装结构如图1所示。
本申请的上述实施例中，塑封槽5围绕电子元器件1的***设置，塑封槽5将塑封层4分别位于塑封槽5内的屏蔽区域41和位于塑封槽5外的非屏蔽区域43，屏蔽区域41内塑封有电子元器件1，电子元器件1包括射频模组，需要做电磁屏蔽。通过屏蔽层6罩设于屏蔽区域41上，可以对屏蔽区域41内的电子元器件1实现五面屏蔽，实现电磁屏蔽功能。此外，在基板2的侧面设置有导电孔22，导电孔22贯穿基板2设置，在导电孔22内设置导电件3，导电件3外露于基板侧面21形成与天线7连接的引出端，将天线7设置于塑封层侧面42，天线7与导电件3连接使得天线7通过导电件3和基板2能够与基板2上的电子元器件1电连接，起到与外界收发信号的作用。该实施例将天线7收发信号和电磁屏蔽功能集成在同一封装结构中，并且充分利用塑封层4四周的面积，将天线7设置于塑封层侧面42，在不增加封装结构体积的情况下实现了功能的集成，在射频封装领域具有很好的应用前景。
参见图15，根据本申请的第二实施例，在基板侧面21设置导电孔22的步骤之前，还包括步骤：
S101，提供一电路板，将电路板规划为多个基板2，在每一基板2四周设置孔位，在孔位内设置导电件3；
这里的基板2可以是有一块电路板切割形成，因此在基板2上打孔前，可以先对电路板进行划分，如可以划分为多个相连的基板2，在基板侧面21设计或标注好打孔位置，后续可以沿着孔位对电路板进行切割；
S20的步骤之后，S30的步骤之前，还包括步骤：
S201，将电路板沿孔位切割形成多个基板2，孔位切割后形成导电孔22，导电孔22内的导电件3外露形成天线7的引出端
图6示出了将电路板分割为两块基板2的结构示意图。这里可以沿着孔位的对称线将电路板进行切割，这样切割完成后将在基板侧面21形成导电孔22，同时导电孔22内的导电件3外露方便后续和天线7电连接。
本申请的上述实施例中，在对电路板上进行电子元器件1组装、塑封和开槽后再进行切割形成多个相同结构的基板2，可以简化工艺步骤，相比于将印制电路板切割成单个基板2后再进行组装、塑封和开槽而言，提高了生产效率，简化了工艺流程。
参见图16，根据本申请的第三实施例，S70的步骤之后，还包括步骤：
S80，在基板2底部植球。可以根据实际需要对S70的封装结构进行植球形成焊球11，方便与外部其他部件连接。植入焊球11的封装结构如图2或图4所示。
根据本申请的又一方面，本申请还提供一种电子设备，电子设备包括上述的封装结构；或者，电子设备包括封装结构，封装结构由上述的封装结构的制作方法制成。由于电子设备包括了上述封装结构的所有实施例的全部技术方案，因此，至少具有上述全部技术方案带来的所有有益效果，在此不再一一赘述。
以上仅为本申请的可选实施例，并非因此限制本申请的专利范围，凡是在本申请的技术构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围。
Claims (15)
- 一种封装结构，其中，所述封装结构包括基板和设置于所述基板上的电子元器件，所述基板侧面形成有导电孔，所述导电孔内设置有导电件，所述电子元器件上包裹有塑封层，所述塑封层形成有围绕所述电子元器件***的塑封槽，所述塑封层包括位于所述塑封槽内的屏蔽区域，所述封装结构还包括罩设于所述屏蔽区域的屏蔽层，所述塑封层侧面设置有天线，所述天线与所述导电件电连接。
- 根据权利要求1所述的封装结构，其中，所述屏蔽层包括顶层和围绕所述顶层外周形成的侧围，所述顶层覆盖于所述塑封层的上表面，所述塑封槽为环形槽，所述侧围设置于所述塑封槽内，以屏蔽位于所述屏蔽区域的所述电子元器件。
- 根据权利要求2所述的封装结构，其中，所述顶层部分覆盖于所述塑封层的上表面，所述天线自所述侧面延伸至所述塑封层未被所述顶层覆盖的所述上表面。
- 根据权利要求1~3中任一项所述的封装结构，其中，所述屏蔽区域与所述屏蔽层之间，以及所述塑封层侧面与所述天线之间均设置有种子层。
- 根据权利要求4所述的封装结构，其中，所述种子层为金属层，所述屏蔽层和所述天线通过电镀设置于对应的所述种子层上。
- 根据权利要求1~3中任一项所述的封装结构，其中，所述导电件外露于所述基板侧面。
- 一种封装结构的制作方法，其中，所述封装结构的制作方法包括以下步骤：提供一基板；其中，在基板侧面设置有导电孔，在所述导电孔内设置有导电件；在所述基板上组装电子元器件，组装完成后在所述基板上塑封一层塑封层，并在所述塑封层内围绕所述电子元器件***设置塑封槽；将所述基板安装于一载板上，并在所述基板侧面、所述塑封层表面和所述塑封槽内形成一种子层；在所述种子层上形成一绝缘介质层，在所述绝缘介质层上形成图形区域，去除所述绝缘介质层的非图形区域以裸露出部分所述种子层；在所述塑封层和所述塑封槽内的所述种子层上设置屏蔽层，在所述基板侧面的所述种子层上设置天线，使得所述天线与所述导电件电连接；去除所述绝缘介质层的所述图形区域，以及所述图形区域与所述塑封层之间的所述种子层；去除所述载板，得到封装结构。
- 根据权利要求7所述的封装结构的制作方法，其中，所述提供一基板的步骤包括：提供一电路板，将所述电路板规划为多个所述基板，在每一所述基板四周设置孔位，在所述孔位内设置导电件；所述并在所述塑封层内围绕所述电子元器件***设置塑封槽的步骤之后，所述将所述基板安装于一载板上的步骤之前，还包括步骤：将所述电路板沿所述孔位切割形成多个所述基板，所述孔位切割后形成所述导电孔，所述导电孔内的所述导电件外露形成所述天线的引出端。
- 根据权利要求7所述的封装结构的制作方法，其中，所述在所述塑封层和所述塑封槽内的所述种子层上设置屏蔽层，在所述基板侧面的所述种子层上设置天线的步骤包括：通过电镀的方式，在所述塑封层和所述塑封槽内的所述种子层上设置屏蔽层，在所述基板侧面的所述种子层上设置天线。
- 根据权利要求7所述的封装结构的制作方法，所述屏蔽层部分覆盖于所述塑封层的上表面，其中，所述在所述基板侧面的所述种子层上设置天线，使得所述天线与所述导电件电连接的步骤包括：在所述塑封层上表面未设置所述屏蔽层的区域的所述种子层上设置天线。
- 根据权利要求7~10中任一项所述的封装结构的制作方法，其中，所述在所述基板侧面、所述塑封层表面和所述塑封槽内形成一种子层的步骤包括：通过溅射沉积或蒸发沉积在所述基板侧面、所述塑封层表面和所述塑封槽内一次形成一所述种子层。
- 根据权利要求7~10中任一项所述的封装结构的制作方法，其中，所述在所述种子层上形成一绝缘介质层的步骤包括：通过贴膜、甩胶、旋涂或涂覆绝缘材料的方式在所述种子层上一次形成一绝缘介质层。
- 根据权利要求7~10中任一项所述的封装结构的制作方法，其中，所述在所述绝缘介质层上形成图形区域的步骤包括：通过激光烧蚀或光刻在所述绝缘介质层上形成图形区域。
- 根据权利要求7~10中任一项所述的封装结构的制作方法，其中，所述得到封装结构的步骤之后，还包括：在所述基板底部植球。
- 一种电子设备，其中，所述电子设备包括权利要求1~6中任一项所述的封装结构；或者，所述电子设备包括封装结构，所述封装结构由权利要求7~14中任一项所述的封装结构的制作方法制成。
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| CN103050482A (zh) * | 2011-10-17 | 2013-04-17 | 矽品精密工业股份有限公司 | 封装结构及其制法 |
| CN106971989A (zh) * | 2016-01-06 | 2017-07-21 | 联发科技股份有限公司 | 半导体封装及半导体封装组件 |
| CN115939109A (zh) * | 2022-09-29 | 2023-04-07 | 青岛歌尔微电子研究院有限公司 | 封装结构、封装结构的制作方法及电子设备 |
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