WO2023138012A1 - 实现矢量信号收发的高带宽矢量网络分析仪*** - Google Patents
实现矢量信号收发的高带宽矢量网络分析仪*** Download PDFInfo
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- the invention relates to the field of communication equipment, in particular to the field of vector network analyzers, in particular to a high-bandwidth vector network analyzer system for realizing vector signal transceiving.
- Vector network analyzer is a test equipment for measuring S-parameters of radio frequency/microwave components, which has a wide range of applications. It usually generates a continuous wave signal of known frequency locally by the device, outputs it through the measurement port, returns to the device after passing through the device under test (DUT), and calculates the S parameter of the device under test by measuring the amplitude and phase changes of the signal.
- FIG. 1 The principle of a typical vector signal generator is shown in Figure 1, which mainly includes a radio frequency source (RFS), a local oscillator (LO), a dual directional coupler (COUP), and a four-channel receiver.
- the RF source generates a sine wave signal with adjustable frequency, which can be output to Port A (Port A) or Port B (Port B) respectively after being amplified by the switch (SW1).
- the dual directional coupler can extract the reference signal and the incident signal at the same time, and then enter the ADC for analog-to-digital conversion after being mixed, filtered, and amplified respectively.
- Digital signal processing of multiple signals is carried out in the DSP, including digital down-conversion, digital filtering, and extraction. The amplitude and phase information of the signal are calculated, and the final measurement result—the S parameter of the DUT is obtained through error correction. .
- the signal that the RF source needs to generate is a sine wave signal.
- each receiver is a narrow-band measurement system. This is because the system only needs to process CW signals.
- the RF source needs to continuously switch the output frequency. It takes a certain amount of time for frequency switching to achieve a stable signal output result. Therefore, in addition to being affected by factors such as signal transmission rate and digital signal processing speed, the measurement speed is actually the main factor is the frequency switching time of the RF source.
- the traditional vector network analyzer has the following limitations:
- the RF source and the local oscillator need to be set synchronously, which is completed by step scanning. Because the frequency switching between the local oscillator and the RF source requires a certain stabilization time, this is a physical process that cannot be broken through.
- this aspect proposes a new type of vector network analyzer equipment and method with high broadband processing capability.
- it also has large bandwidth vector signal processing capabilities and parallel signal processing capabilities, which greatly improves the test speed.
- the technical architecture of the device has greatly enhanced the reusability of the device and increased the ability to expand functions.
- the purpose of the present invention is to overcome the above-mentioned shortcomings of the prior art, and provide a high-bandwidth vector network analyzer system for realizing vector signal transmission and reception, which meets the requirements of fast test speed, strong equipment reusability, and wide application range.
- the high-bandwidth vector network analyzer system realizing vector signal transceiver of the present invention is as follows:
- the high-bandwidth vector network analyzer system for realizing vector signal transceiving its main feature is that the system includes a transmission channel, and the transmission channel includes a multi-tone signal circuit structure, the input end of the multi-tone signal circuit structure is connected with the digital signal processing module, the multi-tone signal circuit structure produces multi-tone parallel signals, and outputs multi-tone radio frequency signals to the receiving end;
- the system further includes a receiving channel, the receiving channel includes a multi-channel parallel digital down-converter group, the multi-channel parallel digital down-converter group includes a plurality of multi-channel parallel digital down-converters, the input ends of the multiple multi-channel parallel digital down-converters are respectively connected to a plurality of analog-to-digital conversion modules, and the multi-channel audio signals are processed in parallel.
- the receiving channel includes a multi-channel parallel digital down-converter group
- the multi-channel parallel digital down-converter group includes a plurality of multi-channel parallel digital down-converters
- the input ends of the multiple multi-channel parallel digital down-converters are respectively connected to a plurality of analog-to-digital conversion modules, and the multi-channel audio signals are processed in parallel.
- the multi-tone signal circuit structure includes a multi-tone signal generator, a two-way multi-tone signal processing circuit structure and an adder.
- the input terminal of the multi-tone signal generator is connected to the digital signal processing module, and a multi-tone parallel signal is generated at the digital end to generate an I base band signal and a Q base band signal.
- the two-way multi-tone signal processing circuit structure receives the I base band signal and the Q base band signal respectively, and performs multi-tone signal processing. , add the signals and output a multi-tone RF signal.
- the two multi -sound signal processing circuit structures include the digital modulus, the modulation and the mixer, and the digital mode converter of the two polyphonic signal processing circuit structures receives the signal of the I integrated and the Q intersection.
- the signal and the signal of the local radio frequency source are mixed frequently.
- the two polyphonic signal processing circuit structures of the two -way polyphonic signal processing circuit structure have all exported to the adder.
- the receiving channel further includes a memory module, the output terminals of the multiple parallel digital downconverters are all connected to the memory module, and the output terminals of the memory module are connected to the digital signal processing module.
- the multi-channel parallel digital down-converter includes N groups of digital down-converter modules, and the N groups of digital down-converter modules are connected in parallel.
- Each group of digital down-converter modules includes a digital oscillator, a first multiplier, a second multiplier, a first FIR digital decimation filter, and a second FIR digital decimation filter.
- the digital oscillator outputs 2 channels of IQ baseband data, which are respectively output to the first multiplier and the second multiplier. Both the first multiplier and the second multiplier receive signals from the analog-to-digital conversion module.
- the output end of multiplier is connected with the first FIR digital decimation filter, and the output end of described second multiplier is connected with the second FIR digital decimation filter, and described first FIR digital decimation filter and the second FIR digital decimation filter output I road and Q road signal respectively.
- the receiving channel further includes a group of fast Fourier transform modules, the group of fast Fourier transform modules includes a plurality of fast Fourier transform modules, the input ends of the plurality of fast Fourier transform modules are respectively connected to a plurality of analog-to-digital conversion modules, and the output ends of the plurality of fast Fourier transform modules are connected to memory modules.
- the group of fast Fourier transform modules includes a plurality of fast Fourier transform modules, the input ends of the plurality of fast Fourier transform modules are respectively connected to a plurality of analog-to-digital conversion modules, and the output ends of the plurality of fast Fourier transform modules are connected to memory modules.
- the system uses time-division serial processing for multiplexing.
- the output frequency of the digital oscillator is defined according to the measurement frequency.
- the test speed of multi-frequency points is greatly improved, and the test speed can be increased by more than 10-20 times in typical scenarios. It is very useful in occasions that require high test efficiency; the strong function expandability enables the traditional vector network to have the function of vector signal transmission and reception, and can realize the test tasks that the traditional vector network cannot complete, and the hardware complexity and cost have been improved to a certain extent.
- Fig. 1 is a functional block diagram of a dual-port vector network analyzer in the prior art.
- FIG. 2 is a schematic circuit diagram of a high-bandwidth vector network analyzer system for transmitting and receiving vector signals according to the present invention.
- Fig. 3 is a schematic diagram of the circuit structure of the multi-channel parallel digital down-converter of the high-bandwidth vector network analyzer system for transmitting and receiving vector signals according to the present invention.
- FIG. 4 is a schematic diagram of the circuit structure of the high-bandwidth vector network analyzer system for realizing vector signal transceiving in the present invention, in which a multi-channel parallel digital down-converter is replaced by a fast Fourier transform module.
- the high-bandwidth vector network analyzer system for realizing vector signal transceiving of the present invention includes a transmission channel, and the transmission channel includes a multi-tone signal circuit structure, the input end of the multi-tone signal circuit structure is connected to the digital signal processing module, and the multi-tone signal circuit structure generates multi-tone parallel signals, and outputs multi-tone radio frequency signals to the receiving end;
- the system further includes a receiving channel, the receiving channel includes a multi-channel parallel digital down-converter group, the multi-channel parallel digital down-converter group includes a plurality of multi-channel parallel digital down-converters, the input ends of the multiple multi-channel parallel digital down-converters are respectively connected to a plurality of analog-to-digital conversion modules, and the multi-channel audio signals are processed in parallel.
- the receiving channel includes a multi-channel parallel digital down-converter group
- the multi-channel parallel digital down-converter group includes a plurality of multi-channel parallel digital down-converters
- the input ends of the multiple multi-channel parallel digital down-converters are respectively connected to a plurality of analog-to-digital conversion modules, and the multi-channel audio signals are processed in parallel.
- the multi-tone signal circuit structure includes a multi-tone signal generator, a two-way multi-tone signal processing circuit structure and an adder.
- the input terminal of the multi-tone signal generator is connected with a digital signal processing module, and a multi-tone parallel signal is generated at a digital end, and the I base band signal and the Q base band signal are produced.
- the two-way multi-tone signal processing circuit structure receives the described I base band signal and the Q base band signal respectively, and performs multi-tone signal processing, and the adder receives the two-way multi-tone signal processing circuit structure.
- the output signal, the signal is summed and output a multi-tone radio frequency signal.
- the two-way multi-tone signal processing circuit structure respectively includes a digital-to-analog converter, a modulator and a mixer, and the digital-to-analog converter of the two-way multi-tone signal processing circuit structure receives the I baseband signal and the Q baseband signal respectively; the input end of the modulator is connected to the digital-to-analog converter; magic weapon.
- the receiving channel further includes a memory module, the output terminals of the multiple parallel digital downconverters are all connected to the memory module, and the output terminals of the memory module are connected to the digital signal processing module.
- the multi-channel parallel digital down converter includes N groups of digital down converter modules, and the N groups of digital down converter modules are connected in parallel, and each group of digital down converter modules includes a digital oscillator, a first multiplier, a second multiplier, a first FIR digital decimation filter and a second FIR digital decimation filter, and the digital oscillator outputs 2 channels of IQ baseband data, which are respectively output to the first multiplier and the second multiplier, and the first multiplier and the second multiplier both receive signals from the analog-to-digital conversion module,
- the output end of the first described multiplier is connected with the first FIR digital decimation filter
- the output end of the second described multiplier is connected with the second FIR digital decimation filter
- the first described FIR digital decimation filter and the second FIR digital decimation filter output I road and Q road signals respectively.
- the receiving channel also includes a group of fast Fourier transform modules, the group of fast Fourier transform modules includes a plurality of fast Fourier transform modules, the input terminals of the plurality of fast Fourier transform modules are respectively connected with a plurality of analog-to-digital conversion modules, and the output terminals of the plurality of fast Fourier transform modules are connected with the memory module.
- the system adopts time-division serial processing for multiplexing.
- the output frequency of the digital oscillator is defined according to the measurement frequency.
- FIG. 2 is a system block diagram and connection relationship of the present invention.
- Working principle and method of the present invention are described as follows:
- the method of increasing the number of channels is usually adopted, but this method increases the number limited, and the increase of hardware brings complexity, cost, and reliability deterioration.
- Vector modulation has the ability to send multi-tone signals concurrently. Therefore, the present invention improves the transmission and reception channels, and all adopt the transceiver mode of vector modulation and demodulation.
- the dotted frame is the place where the present invention increases and changes.
- the multi-tone signal generator (MTG) generates multi-tone parallel signals at the digital end, and generates I/Q two-way baseband signals. After passing through the DAC, the analog I and Q-way signals are respectively output. After being mixed with the local RF source by the modulator, the final output multi-tone RF signal is generated.
- the number of output multi-tone signals is generated by the device according to the test needs, but the total bandwidth of the multi-tone signal generated each time should not exceed the modulation bandwidth of the digital baseband.
- the modulation bandwidth usually depends on the adoption rate of the DAC.
- the previous processing flow is basically the same.
- the RF channel bandwidth of the entire receiving part must meet the requirements of the transmitting bandwidth, and usually the two are consistent. If the modulation bandwidth of the transmitting channel is 100MHz, then all units of the receiving channel must ensure the signal bandwidth of 100MHz, including the selection of the intermediate frequency after mixing, and ensure that the 100MHz bandwidth signal can pass.
- the ADC needs to increase the sampling rate to ensure that no aliasing occurs.
- the digital signal after the ADC enters the multi-channel parallel digital down-converter (MDDC), and the MDDC can process multiple audio signals in parallel. Its working principle is shown in Figure 3:
- the working principle of the multi-channel digital down-converter is composed of N groups of parallel digital down-converters, and each group consists of two multipliers, a digital oscillator (NCO), and two FIR digital decimation filters.
- the output frequency of the NCO is determined by the measurement frequency and can be defined by program control.
- Each group outputs the IQ baseband data of 2 signals for DSP to calculate the amplitude and phase of the signal.
- the number of N depends on the resource capability of the hardware and the complexity of the system, and needs to be considered comprehensively during the implementation. When the number of N is less than the number of multi-tone signals, time-division serial processing can be used for multiplexing.
- the measured signal can be extracted accurately, and the test interference caused by the existence of other frequency signals can be avoided.
- the accuracy is very high, but the required hardware resources are also high.
- the circuit structure shown in Figure 4 can be used to perform FFT measurement directly, and the signal is directly processed by FFT after the ADC to obtain the amplitude and phase information of each frequency point, which can be stored for measurement, so that a higher test speed can be obtained, and it is not affected by resources.
- the technical architecture of vector signal transceiver is adopted to realize the measurement of vector network analysis. Due to the capability of vector signal transceiver, some more complex tests can be completed. For example, using DAC to output radio frequency pulse signal can carry out the time domain test of the DUT, which is a test that cannot be done by traditional VNA. In addition, it can directly generate two-tone signals through MTG, and directly test the third-order intermodulation of the DUT, which is also impossible for traditional Y-net testing.
- the test speed of multi-frequency points is greatly improved, and the test speed can be increased by more than 10-20 times in typical scenarios. It is very useful in occasions that require high test efficiency; the strong function expandability enables the traditional vector network to have the function of vector signal transmission and reception, and can realize the test tasks that the traditional vector network cannot complete, and the hardware complexity and cost have been improved to a certain extent.
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Abstract
一种实现矢量信号收发的高带宽矢量网络分析仪***,包括发射通道和接收通道,发射通道包括多音信号电路结构,多音信号电路结构的输入端与数字信号处理模块相连接,多音信号电路结构产生多音并行信号,并输出多音射频信号至接收端;接收通道包括多路并行数字下变频器组,多路并行数字下变频器组包括多个多路并行数字下变频器,多个多路并行数字下变频器的输入端分别与多个模数转换模块相连接,并行处理多路音频信号。该***的多频点测试速度大大提高,功能扩展性强,使传统矢网具备了矢量信号收发的功能,能够实现传统矢网无法完成的测试任务,硬件复杂度和成本有一定提升。
Description
相关申请的交叉引用
本申请主张2022年1月21日提交的申请号为202210070814.7的中国发明专利申请的优先权,其内容通过引用的方式并入本申请中。
本发明涉及通信设备领域,尤其涉及矢量网络分析仪领域,具体是指一种实现矢量信号收发的高带宽矢量网络分析仪***。
矢量网络分析仪是一种测量射频/微波元器件S参数的测试设备,具有广泛的应用。它通常由设备在本地产生已知频率的连续波信号,通过测量端口输出,经被测件(DUT)之后,返回到设备中,通过测量信号的幅度和相位变化,计算出被测件的S参数。
一个典型的矢量信号发生器原理如图1所示,主要包括射频源(RFS)、本振(LO)、双定向耦合器(COUP)、四通道接收机组成。射频源产生频率可调节的正弦波信号,经开关(SW1)并放大后可分别输出至端口A(Port A)或者端口B(Port B),双定向耦合器可同时提取参考信号和入射信号,分别经过混频、滤波、放大后进入ADC进行模数变换,在DSP中进行多路信号的数字信号处理,包括数字下变频、数字滤波、抽取,计算信号的幅度、相位信息,并通过误差校正,得到最终的测量结果—被测件的S参数。
上述测量原理中,射频源需要产生的信号是正弦波信号,从本质上来说,各个接收机是一个窄带测量***,这是因为***仅需要处理CW信号,要想获得某段频率范围的测试结果,需要射频源不断切换输出频率。频率切换需要一定的时间才能达到稳定的信号输出结果。因此,测量速度除了受信号传输速率、数字信号处理速度等因素影响,实际上主要因素是射频源的频率切换时间。综上各种因素,传统的矢量网络分析仪存才以下局限性:
第一,以测试效率为优先的测试场景下,现有的方案很难再获得测试速度的大幅提升。对于多个频点的测试,需要射频源和本振同步设置,通过步进扫描完成。因为本振和射频源的频率切换需要一定的稳定时间,这是一个物理过程无法突破。
第二,作为具有收发一体功能的设备,受限于窄带测量的设计原理,以及矢量网络分析的 实现原理,仅支持连续波信号的处理。整个设备不具备矢量信号处理的能力,尤其是大带宽信号的处理。通常,这些测试需要其它的专用设备才能支持。
第三,以通信、半导体等产业化测试,要求设备的测试速度和功能集成度不断提升。在现有基础上进行功能扩展比较困难,目前也仅有部分设备集成了频谱分析的功能。更为复杂的测试功能无法实现。如交调测试、响应速度、上升时间、EVM测试等。
本方面针对以上问题,提出了一种新型的高宽带处理能力的矢量网络分析仪设备和方法,它具备了传统矢量网络分析仪的能力之外,还具有大带宽矢量信号处理能力,以及并行信号处理能力,大大提升了测试速度。并且设备的技术架构上带来了设备的复用性大大增强,功能扩展能力加大。
发明内容
本发明的目的是克服了上述现有技术的缺点,提供了一种满足测试速度快、设备复用性强、适用范围较为广泛的实现矢量信号收发的高带宽矢量网络分析仪***。
为了实现上述目的,本发明的实现矢量信号收发的高带宽矢量网络分析仪***如下:
该实现矢量信号收发的高带宽矢量网络分析仪***,其主要特点是,所述的***包括发射通道,所述的发射通道包括多音信号电路结构,多音信号电路结构的输入端与数字信号处理模块相连接,多音信号电路结构产生多音并行信号,并输出多音射频信号至接收端;
所述的***还包括接收通道,所述的接收通道包括多路并行数字下变频器组,所述的多路并行数字下变频器组包括多个多路并行数字下变频器,所述的多个多路并行数字下变频器的输入端分别与多个模数转换模块相连接,并行处理多路音频信号。
较佳地,所述的多音信号电路结构包括多音信号发生器、两路多音信号处理电路结构和加法器,所述的多音信号发生器的输入端与数字信号处理模块相连接,在数字端产生多音并行信号,产生I路基带信号和Q路基带信号,所述的两路多音信号处理电路结构分别接收所述的I路基带信号和Q路基带信号,并进行多音信号处理,所述的加法器接收两路多音信号处理电路结构输出的信号,将信号相加并输出多音射频信号。
较佳地,所述的两路多音信号处理电路结构分别包括数模转换器、调制器和混频器,所述的两路多音信号处理电路结构的数模转换器分别接收I路基带信号和Q路基带信号,所述的调制器的输入端与所述的数模转换器相连接,所述的混频器的输入端接收调制器输出的信号以及本地射频源的信号并进行混频,所述的两路多音信号处理电路结构的混频后的信号均输出至所述的加法器。
较佳地,所述的接收通道还包括存储器模块,所述的多个多路并行数字下变频器的输出端均与所述的存储器模块相连接,所述的存储器模块的输出端与所述的数字信号处理模块相连接。
较佳地,所述的多路并行数字下变频器包括N组数字下变频器模块,所述的N组数字下变频器模块并联连接,所述的每组数字下变频器模块包括数字振荡器、第一乘法器、第二乘法器、第一FIR数字抽取滤波器和第二FIR数字抽取滤波器,所述的数字振荡器输出2路IQ基带数据,分别输出至第一乘法器和第二乘法器,所述的第一乘法器和第二乘法器均接收模数转换模块的信号,所述的第一乘法器的输出端与第一FIR数字抽取滤波器相连接,所述的第二乘法器的输出端与第二FIR数字抽取滤波器相连接,所述的第一FIR数字抽取滤波器和第二FIR数字抽取滤波器分别输出I路和Q路信号。
较佳地,所述的接收通道还包括快速傅里叶变换模块组,所述的快速傅里叶变换模块组包括多个快速傅里叶变换模块,所述的多个快速傅里叶变换模块的输入端分别与多个模数转换模块相连接,所述的多个快速傅里叶变换模块的输出端均与存储器模块相连接。
较佳地,所述的数字下变频器模块的数量小于多音信号处理电路结构的通道数的情况下,所述的***采用分时串行处理的方式进行复用。
较佳地,所述的数字振荡器的输出频率根据测量频率定义。
采用了本发明的实现矢量信号收发的高带宽矢量网络分析仪***,多频点的测试速度大大提高,典型场景下可提高测试速度10-20倍以上。对测试效率要求较高的场合非常使用;功能扩展性强,使传统矢网具备了矢量信号收发的功能,能够实现传统矢网无法完成的测试任务,硬件复杂度和成本有一定提升。
图1为现有技术的双端口矢量网络分析仪原理框图。
图2为本发明的实现矢量信号收发的高带宽矢量网络分析仪***的电路结构示意图。
图3为本发明的实现矢量信号收发的高带宽矢量网络分析仪***的多路并行数字下变频器的电路结构示意图。
图4为本发明的实现矢量信号收发的高带宽矢量网络分析仪***的通过快速傅里叶变换模块替代多路并行数字下变频器的电路结构示意图。
为了能够更清楚地描述本发明的技术内容,下面结合具体实施例来进行进一步的描述。
本发明的该实现矢量信号收发的高带宽矢量网络分析仪***,其中包括发射通道,所述的发射通道包括多音信号电路结构,多音信号电路结构的输入端与数字信号处理模块相连接,多音信号电路结构产生多音并行信号,并输出多音射频信号至接收端;
所述的***还包括接收通道,所述的接收通道包括多路并行数字下变频器组,所述的多路并行数字下变频器组包括多个多路并行数字下变频器,所述的多个多路并行数字下变频器的输入端分别与多个模数转换模块相连接,并行处理多路音频信号。
作为本发明的优选实施方式,所述的多音信号电路结构包括多音信号发生器、两路多音信号处理电路结构和加法器,所述的多音信号发生器的输入端与数字信号处理模块相连接,在数字端产生多音并行信号,产生I路基带信号和Q路基带信号,所述的两路多音信号处理电路结构分别接收所述的I路基带信号和Q路基带信号,并进行多音信号处理,所述的加法器接收两路多音信号处理电路结构输出的信号,将信号相加并输出多音射频信号。
作为本发明的优选实施方式,所述的两路多音信号处理电路结构分别包括数模转换器、调制器和混频器,所述的两路多音信号处理电路结构的数模转换器分别接收I路基带信号和Q路基带信号,所述的调制器的输入端与所述的数模转换器相连接,所述的混频器的输入端接收调制器输出的信号以及本地射频源的信号并进行混频,所述的两路多音信号处理电路结构的混频后的信号均输出至所述的加法器。
作为本发明的优选实施方式,所述的接收通道还包括存储器模块,所述的多个多路并行数字下变频器的输出端均与所述的存储器模块相连接,所述的存储器模块的输出端与所述的数字信号处理模块相连接。
作为本发明的优选实施方式,所述的多路并行数字下变频器包括N组数字下变频器模块,所述的N组数字下变频器模块并联连接,所述的每组数字下变频器模块包括数字振荡器、第一乘法器、第二乘法器、第一FIR数字抽取滤波器和第二FIR数字抽取滤波器,所述的数字振荡器输出2路IQ基带数据,分别输出至第一乘法器和第二乘法器,所述的第一乘法器和第二乘法器均接收模数转换模块的信号,所述的第一乘法器的输出端与第一FIR数字抽取滤波器相连接,所述的第二乘法器的输出端与第二FIR数字抽取滤波器相连接,所述的第一FIR数字抽取滤波器和第二FIR数字抽取滤波器分别输出I路和Q路信号。
作为本发明的优选实施方式,所述的接收通道还包括快速傅里叶变换模块组,所述的快速傅里叶变换模块组包括多个快速傅里叶变换模块,所述的多个快速傅里叶变换模块的输入端分别与多个模数转换模块相连接,所述的多个快速傅里叶变换模块的输出端均与存储器模块 相连接。
作为本发明的优选实施方式,所述的数字下变频器模块的数量小于多音信号处理电路结构的通道数的情况下,所述的***采用分时串行处理的方式进行复用。
作为本发明的优选实施方式,所述的数字振荡器的输出频率根据测量频率定义。
本发明的具体实施方式中,如图2所示为本发明的***框图和连接关系。本发明的工作原理和方法描述如下:
对于同时接收和发射通道来说,具备并行多信号能力,通常采用增加通道数量的方式,但这种方法增加数量有限,硬件的增加带来复杂度、成本、可靠性的恶化。矢量调制具有同时并发多音信号的能力,因此,本发明对发射和接收通道进行了改进,全部采用矢量调制解调的收发模式,图2中虚框内是本发明增加和改变的地方。
在发射端,多音信号发生器(MTG)在数字端产生多音并行信号,产生I/Q两路基带信号,分别经DAC后输出量路模拟I和Q路信号,经调制器分别与本地射频源进行混频后相加,产生最终输出的多音射频信号,输出多音信号的多少由设备根据测试需要产生,但每次产生的多音信号的总带宽应该不大于数字基带的调制带宽,调制带宽通常又取决于DAC的采用速率。
在接收端,前面的处理流程基本一致。但由于信号带宽的增大,整个接收部分的射频通道带宽要满足发射带宽的要求,通常二者保持一致。如发射通道的调制带宽是100MHz,那么接收通道的所有单元都要保证100MHz的信号带宽,包括混频后的中频选择上,也要保证100MHz的带宽信号能够通过。同时,ADC需要提高采样率以保证不产生混叠。除了带宽、采样速率的改变,经ADC后的数字信号进入多路并行数字下变频器(MDDC),MDDC可并行处理多路音频信号,其工作原理如图3所示:
如图3所示是多路数字下变频器的工作原理,它由N组并行的数字下变频器组成,每组由两个乘法器、数字振荡器(NCO)、及两个FIR数字抽取滤波器组成。NCO的输出频率由测量频率决定,可程控定义,每组输出2路信号的IQ基带数据,供DSP计算信号的幅度和相位。N的数量取决于硬件的资源能力和***的复杂度,实现过程中需要综合考虑。当N的数量小于多音信号的个数时,可以采用分时串行处理的方式进行复用。
采用多路数字下变频的方式,可以将被测信号精确的提取出来,避免其它频率信号存在产生的测试干扰,精度很高,但需要的硬件资源也较高。当测试动态范围和波动要求不高的情况下,可以采用如图4所示的电路结构,直接进行FFT测量,在ADC后直接对信号进行FFT处理,获得每个频点的幅度和相位信息,存储后供测量,这样可以获得更高的测试速度,而 且不受资源的影响。
本方面采用了矢量信号收发的技术架构实现矢量网络分析的测量,由于具备矢量收发的能力,可以完成一些更复杂的测试。例如,用DAC输出射频脉冲信号,可以进行对被测件的时域测试,这是传统矢网无法完成的测试。还有,可以直接通过MTG产生双音信号,直接测试被测件的三阶互调,这也是传统矢网测试无法完成的。
采用了本发明的实现矢量信号收发的高带宽矢量网络分析仪***,多频点的测试速度大大提高,典型场景下可提高测试速度10-20倍以上。对测试效率要求较高的场合非常使用;功能扩展性强,使传统矢网具备了矢量信号收发的功能,能够实现传统矢网无法完成的测试任务,硬件复杂度和成本有一定提升。
在此说明书中,本发明已参照其特定的实施例作了描述。但是,很显然仍可以作出各种修改和变换而不背离本发明的精神和范围。因此,说明书和附图应被认为是说明性的而非限制性的。
Claims (8)
- 一种实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的***包括发射通道,所述的发射通道包括多音信号电路结构,多音信号电路结构的输入端与数字信号处理模块相连接,多音信号电路结构产生多音并行信号,并输出多音射频信号至接收端;所述的***还包括接收通道,所述的接收通道包括多路并行数字下变频器组,所述的多路并行数字下变频器组包括多个多路并行数字下变频器,所述的多个多路并行数字下变频器的输入端分别与多个模数转换模块相连接,并行处理多路音频信号。
- 根据权利要求1所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的多音信号电路结构包括多音信号发生器、两路多音信号处理电路结构和加法器,所述的多音信号发生器的输入端与数字信号处理模块相连接,在数字端产生多音并行信号,产生I路基带信号和Q路基带信号,所述的两路多音信号处理电路结构分别接收所述的I路基带信号和Q路基带信号,并进行多音信号处理,所述的加法器接收两路多音信号处理电路结构输出的信号,将信号相加并输出多音射频信号。
- 根据权利要求2所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的两路多音信号处理电路结构分别包括数模转换器、调制器和混频器,所述的两路多音信号处理电路结构的数模转换器分别接收I路基带信号和Q路基带信号,所述的调制器的输入端与所述的数模转换器相连接,所述的混频器的输入端接收调制器输出的信号以及本地射频源的信号并进行混频,所述的两路多音信号处理电路结构的混频后的信号均输出至所述的加法器。
- 根据权利要求1所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的接收通道还包括存储器模块,所述的多个多路并行数字下变频器的输出端均与所述的存储器模块相连接,所述的存储器模块的输出端与所述的数字信号处理模块相连接。
- 根据权利要求1所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的多路并行数字下变频器包括N组数字下变频器模块,所述的N组数字下变频器模块并联连接,所述的每组数字下变频器模块包括数字振荡器、第一乘法器、第二乘法器、第一FIR数字抽取滤波器和第二FIR数字抽取滤波器,所述的数字振荡器输出2路IQ基带数据,分别输出至第一乘法器和第二乘法器,所述的第一乘法器和第二乘法器均接收模数转换模块的信号,所述的第一乘法器的输出端与第一FIR数字抽取滤波器相连接,所述的第二乘法器的输出端与第二FIR数字抽取滤波器相连接,所述的第一FIR数字抽取滤波器和第二FIR数字抽 取滤波器分别输出I路和Q路信号。
- 根据权利要求1所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的接收通道还包括快速傅里叶变换模块组,所述的快速傅里叶变换模块组包括多个快速傅里叶变换模块,所述的多个快速傅里叶变换模块的输入端分别与多个模数转换模块相连接,所述的多个快速傅里叶变换模块的输出端均与存储器模块相连接。
- 根据权利要求5所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的数字下变频器模块的数量小于多音信号处理电路结构的通道数的情况下,所述的***采用分时串行处理的方式进行复用。
- 根据权利要求5所述的实现矢量信号收发的高带宽矢量网络分析仪***,其特征在于,所述的数字振荡器的输出频率根据测量频率定义。
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