WO2023020361A1 - Grayscale compensation circuit, display apparatus, and grayscale compensation method - Google Patents

Grayscale compensation circuit, display apparatus, and grayscale compensation method Download PDF

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Publication number
WO2023020361A1
WO2023020361A1 PCT/CN2022/111823 CN2022111823W WO2023020361A1 WO 2023020361 A1 WO2023020361 A1 WO 2023020361A1 CN 2022111823 W CN2022111823 W CN 2022111823W WO 2023020361 A1 WO2023020361 A1 WO 2023020361A1
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WIPO (PCT)
Prior art keywords
signal
control switch
control
gray scale
data line
Prior art date
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PCT/CN2022/111823
Other languages
French (fr)
Chinese (zh)
Inventor
齐二龙
王祖亮
童华南
赵旭飞
冯中山
Original Assignee
重庆康佳光电技术研究院有限公司
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Publication of WO2023020361A1 publication Critical patent/WO2023020361A1/en

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

Definitions

  • the present application relates to the field of semiconductor devices, and in particular to a gray scale compensation circuit, a display device and a gray scale compensation method.
  • Light-emitting diode Light-emitting diode, LED
  • LED Light-emitting diode
  • Professional fields or commercial fields such as outdoor advertising, conferences and exhibitions, and office displays have become research hotspots for people pursuing a new generation of display technology.
  • LED display devices put forward higher requirements for row driving, from pure P-MOSFET (Positive Channel Metal Oxide Semiconductor Field-Effect Transistor, P-type metal-oxide-semiconductor field-effect transistor) to realize row switching, to a multifunctional row driver with higher integration and stronger functions.
  • P-MOSFET Positive Channel Metal Oxide Semiconductor Field-Effect Transistor, P-type metal-oxide-semiconductor field-effect transistor
  • the gray scale of the display unit in the display device is controlled by the clock signal, and cannot The gray scale output by the tube data line is flexibly changed, so that the gray scale display of the display unit on the tube data line is not fine enough, and the display effect of the display unit is poor.
  • the purpose of this application is to provide a gray scale compensation circuit, a display device and a gray scale compensation method, aiming at solving the problem that the gray scale display of the display unit is not fine enough and the display effect of the display unit is poor.
  • a gray scale compensation circuit the gray scale compensation circuit includes
  • a signal generating unit connected to the control end of the control switch through the signal transmission circuit, and the signal generating unit is also connected to the first end of the control switch through the voltage transmission circuit;
  • a signal synchronization unit connected to the output end of the clock signal at one end and connected to the input end of the signal generating unit at the other end;
  • the second end of the control switch is connected to the output end of the tube data line;
  • the signal synchronization unit is configured to receive the clock signal transmitted by the output end of the clock signal, and perform frequency multiplication on the clock signal to obtain a frequency multiplied signal, and transmit it to the signal generator unit,
  • the signal generation unit is configured to output at least one control signal within the period of the multiplied signal, and the control signal is configured to turn on or off the control switch; when the signal generation unit is in the on state of the control switch, it changes the The grayscale of the LEDs on the data line.
  • the present application also provides a display device, the display device includes a plurality of row pipe data lines and a plurality of column pipe data lines, a display unit is arranged between each row pipe data line and each column pipe data line, at least The output end of one tube data line is provided with any one of the above gray scale compensation circuits.
  • this application also provides a gray scale compensation method, which is applied to the above gray scale compensation circuit.
  • the gray scale compensation method includes: receiving the clock signal transmitted by the output terminal of the clock signal through the signal synchronization unit, and transferring the clock signal to The signal is multiplied to obtain a frequency multiplied signal, and transmitted to the signal generating unit; the signal generating unit outputs at least one control signal to the control terminal of the control switch within the period of the frequency multiplied signal, and the control signal is configured to turn on or off the control switch ;
  • the signal generating unit changes the gray scale of the LED on the row tube data line when the control switch is in a conducting state.
  • the above-mentioned grayscale compensation circuit includes a signal synchronization unit, a signal generation unit, and a control switch.
  • the signal synchronization unit is configured to receive the clock signal transmitted from the output end of the clock signal, and perform frequency multiplication on the clock signal to obtain a frequency multiplication signal, and transmit it to A signal generating unit, the signal generating unit outputs at least one control signal within the period of the multiplied signal, and the control signal is configured to turn on or off the control switch; when the signal generating unit is in the on state of the control switch, it changes the column through the voltage transmission circuit
  • the gray scale of the LEDs on the tube data line enables the tube data line to output more delicate gray scales and improves the display effect of the display unit.
  • the above-mentioned display device through the signal synchronization unit, the signal generating unit, and the control switch in the grayscale compensation circuit, when receiving the clock signal transmitted by the output end of the clock signal, performs frequency multiplication of the clock signal to obtain a frequency multiplication signal, and transmits it to the signal A generating unit, the signal generating unit outputs at least one control signal within the period of the frequency multiplier signal, and the control signal is configured to turn on or off the control switch; when the signal generating unit is in the on state of the control switch, it changes the array tube through the voltage transmission circuit
  • the gray scale of the LED on the data line further enables the column tube data line to output a finer gray scale and improves the display effect of the display unit.
  • the clock signal when receiving the clock signal transmitted from the output end of the clock signal, the clock signal is multiplied to obtain a frequency multiplied signal, and transmitted to the signal generating unit, and the signal generating unit outputs at least A control signal, the control signal is configured to turn on or off the control switch; when the control switch is in the on state, the signal generation unit changes the gray scale of the LED on the row tube data line through the voltage transmission circuit, thereby making the row tube data line It can output more delicate grayscale, which improves the display effect of the display unit.
  • Fig. 1 is the waveform diagram of the waveform diagram of the gray scale output by the output terminal of the tube data line provided by the embodiment of the present application;
  • FIG. 2 is a basic schematic diagram of displaying by a display unit according to the gray scale provided by the embodiment of the present application;
  • FIG. 3 is a basic schematic diagram of the gray scale and the width of one period of one clock signal provided by the embodiment of the present application;
  • FIG. 4 is a basic schematic diagram of the grayscale comparison between grayscale n and grayscale n+1 provided by the embodiment of the present application;
  • FIG. 5 is a schematic diagram of the basic structure of the gray scale compensation circuit provided by the embodiment of the present application.
  • FIG. 6 is a schematic diagram of the basic structure of the signal synchronization unit provided by the embodiment of the present application.
  • FIG. 7 is a schematic diagram of the basic structure of a frequency multiplier provided in an embodiment of the present application.
  • FIG. 8 is a schematic diagram of the basic structure of the signal generation unit provided by the embodiment of the present application.
  • FIG. 9 is a schematic diagram of the basic structure of the first voltage limiting module provided by the embodiment of the present application.
  • FIG. 10 is a basic schematic diagram of grayscale n+1 provided by the embodiment of the present application.
  • Fig. 11 is another basic schematic diagram of grayscale n+1 provided by the embodiment of the present application.
  • Figure 12 is a schematic diagram of the basic structure of the voltage speed controller provided by the embodiment of the present application.
  • FIG. 13 is a schematic diagram of the basic structure of another signal generating unit provided by the embodiment of the present application.
  • Fig. 14 is a basic schematic diagram of grayscale n-1 provided by the embodiment of the present application.
  • FIG. 15 is a schematic diagram of the basic structure of the control switch provided by the embodiment of the present application.
  • FIG. 16 is a schematic diagram of the basic structure of a display device provided by an embodiment of the present application.
  • FIG. 17 is a schematic flowchart of a grayscale compensation method provided in another optional embodiment of the present application.
  • 1-Gray scale compensation circuit 2-Signal synchronization unit, 3-Signal generating unit, 4-Control switch, 5-Clock signal output terminal, 6-Signal transmission circuit, 7-Voltage transmission circuit, 8-Tube data line , 21-frequency multiplier, 211-frequency divider, 212-phase locked loop, 31-first voltage limiting module, 32-first timing controller, 33-voltage speed controller, 34-second voltage limiting module, 35-second timing controller, 9-display unit, R-resistor, Driver IC-driver chip.
  • the LED gray scale on the tube data line 8 is controlled by the clock signal, and the tube data line 8 performs gray scale control according to the cycle of the clock signal, and one cycle of one clock signal corresponds to one gray scale, as shown in Figure 3
  • the pulse width t of grayscale 1 is 1 GCLK (grayscale clock signal) cycle
  • the pulse width of grayscale 2 is 2 GCLK cycles
  • the pulse width of grayscale 3 is 3 GCLK
  • the pulse width corresponding to gray scale n+1 increases by 1 t1 width
  • the width t1 is a GCLK cycle in Figure 3.
  • the driver IC cannot output a signal with a width lower than one period of the clock signal, and then the tube data line 8 cannot output the width of grayscale n+x between the width of grayscale n and grayscale n+1
  • the pulse width of grayscale n+x can be regarded as increasing the width of x times the clock cycle on the basis of the pulse width of grayscale n, that is, the current pulse width of grayscale cannot change less than the width of 1 clock cycle.
  • the display of the display unit 9 according to the gray scale of the LEDs on the data line 8 is not delicate enough, and the display effect of the display unit 9 is poor.
  • the value of x is greater than 0 and less than 1, for example, the value of x may be 0.5.
  • the value of x can also be 0.1, 0.2, 0.3, 0.4, 0.6, 0.7, 0.8, 0.9 and so on.
  • the value of x may also be a percentage (for example, 0.55 or 65%), which is not specifically limited here.
  • the embodiment of the present application provides a grayscale compensation circuit 1.
  • the grayscale compensation circuit 1 includes: a signal synchronization unit 2, a signal generation unit 3, and a control switch 4;
  • One end of the signal synchronization unit 2 is connected with the output terminal 5 of the clock signal, and the other end of the signal synchronization unit 2 is connected with the input terminal of the signal generation unit 3, and the signal generation unit 3 is connected with the control end of the control switch 4 by the signal transmission circuit 6,
  • the signal generating unit 3 is also connected to the first end of the control switch 4 through the voltage transmission circuit 7, and the second end of the control switch 4 is connected to the output end of the tube data line 8;
  • the signal synchronization unit 2 is configured to receive the clock signal transmitted by the output terminal 5 of the clock signal, and perform frequency multiplication on the clock signal to obtain a frequency multiplied signal, and transmit it to the signal generating unit 3, and the signal generating unit 3 is within the period of the frequency multiplied signal
  • At least one control signal is output, that is, the control signal output by the signal generating unit 3 is generated according to the period of the frequency multiplied signal.
  • the control signal of the signal generating unit 3 is only generated at the beginning or end of one period of the frequency multiplied signal, and the output is stopped only at the beginning or end of one period of the frequency multiplied signal.
  • the signal generation unit 3 when the signal generation unit 3 outputs the control signal, the output voltage changes from high level to low level (or from low level to high level), and the output voltage of the signal generation unit 3 is only in the The timing of the rising or falling edge of the multiplier signal changes.
  • the control signal is configured to turn on or turn off the control switch 4; when the control switch 4 is turned on, the signal generation unit 3 changes the gray scale of the LED on the column management data line 8 through the voltage transmission circuit 7.
  • the LED grayscale is related to the light emitting time, and the essence of controlling the LED grayscale in this embodiment is the control of the LED light emitting time.
  • the different widths of Out(m) in Figure 2 can drive the LED to emit light for different times, thus presenting different gray scales.
  • the grayscale compensation circuit 1 of this embodiment changes the driving voltage on the column tube data line 8 by controlling the conduction of the switch 4, thereby changing the light-emitting time of the LED and achieving the purpose of changing the grayscale.
  • the grayscale compensation circuit 1 includes a signal synchronization unit 2, a signal generation unit 3, and a control switch 4.
  • the signal synchronization unit 2 is configured to receive the clock signal transmitted by the output terminal 5 of the clock signal, and perform the clock signal
  • the frequency multiplication signal is obtained by frequency multiplication, and transmitted to the signal generation unit 3, the signal generation unit 3 outputs at least one control signal in the period of the frequency multiplication signal, and the control signal is configured to turn on or cut off the control switch 4; the signal generation unit 3 is in When the control switch 4 is turned on, the grayscale of the LED on the tube data line 8 is changed through the voltage transmission circuit 7, so that the LED on the tube data line 8 can output a more delicate gray scale, which improves the display unit 9. display effect.
  • the grayscale of the LEDs on the columnar data line 8 is controlled by the driving voltage of the columnar data line 8, and when the drive voltage of the columnar data line 8 is low, the LEDs on the columnar data line 8 light up ;
  • the driving voltage of the row tube data line 8 is high, the LED on the row tube data line 8 is in a non-light state, therefore, the row tube data line can be changed by pulling down or raising the drive voltage of the row tube data line 8 8 on the gray scale of the LED.
  • the pipe data line 8 is also connected to the output terminal 5 of the clock signal, and the pipe data line 8 and the signal synchronization unit 2 receive the same CLK signal, thereby ensuring the synchronization between the pipe data line 8 and the signal synchronization unit 2 .
  • a multiplied signal has multiple periods, and one control signal corresponds to one period.
  • the signal synchronization unit 2 includes but not limited to a frequency multiplier 21 configured to multiply the frequency of the clock signal to obtain a frequency multiplied signal.
  • the frequency of the multiplied signal is N times that of the clock signal, and N is an integer not less than 2.
  • the frequency multiplier 21 multiplies the frequency of the received clock signal, so that the frequency of the output control signal is N times the frequency of the clock signal. Compared with the original clock signal, the period of the frequency multiplied signal is shorter. According to the frequency multiplied signal The period can produce narrower pulse width.
  • the frequency multiplier 21 refers to an electronic circuit or device that makes the output signal frequency an integer multiple of the input signal frequency. In some implementations, as shown in FIG.
  • the frequency multiplier 21 can be a phase-locked frequency multiplier, and the frequency multiplier 21 includes but not limited to a frequency divider 211 and a phase-locked loop 212, and the frequency divider 211 is configured to
  • the clock signal is frequency-divided to obtain a frequency-divided signal.
  • the frequency of the frequency-divided signal is one-Nth of the clock signal, and N is an integer not less than 2.
  • the phase-locked loop 212 is configured to generate a frequency-multiplied signal according to the frequency-divided signal.
  • the frequency divider 211 refers to an electronic circuit or device that makes the frequency of the output signal an integer fraction of the frequency of the input signal.
  • the frequency divider 211 includes but is not limited to: a pulse frequency divider (also known as a digital frequency divider) , a sinusoidal frequency divider, and an analog-to-digital conversion-digital frequency divider. In other implementation manners, the frequency multiplier 21 may also be of other types.
  • the signal generating unit 3 includes: a first voltage limiting module 31, the first voltage limiting module 31 is connected to the first end of the control switch 4 through the voltage transmission circuit 7, and is It is configured to pull down the driving voltage of the row tube data line 8 when the control switch 4 is turned on, so as to increase the gray scale of the LED on the row tube data line 8; the first timing controller 32, the first timing controller 32 is configured as When it is necessary to increase the gray scale, output at least one first control signal within the period of the frequency multiplier signal, and transmit it to the control terminal of the control switch 4 through the signal transmission circuit 6, and the first control signal is configured to turn on the control switch 4; The first timing controller 32 is also configured to output at least one second control signal within the period of the frequency multiplication signal when there is no need to increase the gray level, and transmit it to the control terminal of the control switch 4 through the signal transmission circuit 6, the second The control signal is configured to turn off the control switch 4 .
  • the voltage of the first voltage limiting module 31 may be a ground voltage, as shown in FIG. 9 , or a voltage provided by a constant voltage unit. It should be understood that the first voltage limiting module 31 is higher than the driving voltage of the tube data line 8, and then the driving voltage of the tube data line 8 is pulled down through the voltage transmission circuit 7 when the control switch 4 is turned on, thereby increasing the grayscale of the LED on the tube data line 8. Spend.
  • the first timing controller 32 is configured to output at least one first control signal within the period of the frequency-multiplied signal when the gray level needs to be increased, so as to turn on the control switch 4, and the first The voltage limiting module 31 pulls down the driving voltage of the tube data line 8 to increase the LED grayscale on the tube data line 8; specifically, as shown in FIG.
  • the first timing controller 32 outputs a first control signal to turn on the control switch 4 in the cycle of the frequency multiplier signal, so as to pull down the driving voltage of the row pipe data line 8, and then make the row pipe data line 8 output gray scale n+1 (the pulse width is the pulse width of grayscale n plus the width of t2)
  • t2 is the width of a grayscale in one period of a frequency multiplier signal, because the period of the frequency multiplier signal is shorter than the period of the clock signal, so , the width of t2 is shorter than the width of t1, then a new gray level n+ can be added between the original gray level n and the next gray level (the pulse width is the pulse width of gray level n plus the width of t1) 1.
  • the width of t2 is related to the multiple of the frequency multiplication, the higher the multiple, the smaller the width of t2.
  • the first The timing controller 32 is configured to output a first control signal to turn on the control switch 4 to increase the pulse width of the gray scale n+1 when the gray scale needs to be increased, and the increased width is the width of t2, as shown in FIG. 11
  • the first timing controller 32 can also output a plurality of first control signals within the period of the multiplied signal according to actual needs, so as to increase the width of multiple t2.
  • this embodiment does not limit the method for identifying whether the gray scale needs to be increased, for example, the gray scale can be monitored by a sensor to identify whether the gray scale needs to be increased; or when relevant designers perform external debugging, Debug the grayscale of the LED on the tube data line 8 to determine whether the grayscale needs to be increased.
  • the first control signal and the second control signal are opposite signals, wherein the first control signal and the second control signal may be one of a high-level signal and a low-level signal.
  • the first control signal is a high-level signal
  • the second control signal is a low-level signal. It should be understood that the first control signal can make the control switch 4 be in a conducting state, and the second control signal can make the control switch 4 be in a cut-off state. state.
  • the signal generating unit 3 further includes: a voltage speed controller 33; the voltage speed controller 33 is arranged between the first voltage limiting module 31 and the voltage transmission circuit 7, and is configured to control the switch 4 When it is turned on, the speed of pulling down the driving voltage of the tube data line 8 is controlled.
  • the voltage speed controller 33 includes but is not limited to: a resistor R, as shown in FIG. 12 ; wherein the resistor R can be a fixed resistor or a variable resistor. When the voltage speed controller 33 is a resistor R, the larger the resistance value of the resistor R is, the slower the speed of pulling down the driving voltage of the tube data line 8 is.
  • the signal generating unit 3 further includes: a second voltage limiting module 34, the second voltage limiting module 34 is connected to the first end of the control switch 4 through the voltage transmission circuit 7, It is configured to pull up the driving voltage of the row tube data line 8 when the control switch 4 is turned on, so as to reduce the LED gray scale on the row tube data line 8; the second timing controller 35, the second timing controller 35 is configured to When the display unit 9 needs to reduce the grayscale, at least one first control signal is output in the period of the frequency multiplier signal, and is transmitted to the control terminal of the control switch 4 through the signal transmission circuit 6, and the first control signal is configured as conduction control The switch 4; the second timing controller 35 is also configured to output at least one second control signal within the cycle of the multiplied signal when the display unit 9 does not need to reduce the grayscale, and transmit it to the control switch 4 through the signal transmission circuit 6 The control terminal of the second control signal is configured to turn off the control switch 4 .
  • the voltage of the second voltage limiting module 34 may be a voltage provided by a constant voltage voltage unit. It should be understood that the voltage of the second voltage limiting module 34 is higher than that of the tube data line 8 The driving voltage, and then pull up the driving voltage of the tube data line 8 through the voltage transmission circuit 7 when the control switch 4 is turned on, thereby reducing the gray scale of the LED on the tube data line 8 .
  • the second timing controller 35 is configured to output at least one first control signal within the period of the frequency multiplied signal when the display unit 9 needs to reduce the gray level, thereby turning on the control switch 4 , the second voltage limiting module 34 pulls up the driving voltage of the tube data line 8 to reduce the LED grayscale on the tube data line 8; specifically, as shown in FIG.
  • t2 is a cycle of a frequency multiplication signal
  • the pulse width of gray scale n-1 is shorter than the pulse width of the gray scale corresponding to one cycle of the clock signal, then it can be used in the original
  • the width of t2 is reduced, which avoids directly reducing the width corresponding to one clock signal and one cycle (that is, the width of t1), so as to achieve a smaller reduction in gray level and make the display effect more delicate the goal of.
  • the width of t2 is related to the multiple of the frequency multiplication, the higher the multiple, the smaller the width of t2.
  • the second timing controller 35 is configured to output the first control signal to turn on the control switch 4 when the gray level needs to be reduced.
  • the internal basis outputs a plurality of first control signals, so as to reduce the width of a plurality of t2. It should be understood that this embodiment does not limit the method for identifying whether the gray scale needs to be reduced.
  • the gray scale can be monitored by a sensor to identify whether the gray scale needs to be reduced; or when the relevant designer performs external debugging, Debug the LED grayscale on the tube data line 8 to determine whether the grayscale needs to be reduced.
  • first timing controller 32, the first voltage limiting module 31, the second timing controller 35, and the second voltage limiting module 34 may be installed in the signal generating unit 3 at the same time, so as to increase and decrease the gray level. Effect.
  • the control switch 4 includes but is not limited to: a field effect transistor; the control terminal of the field effect transistor is connected to the signal generating unit 3 through the signal transmission circuit 6, and the first field effect transistor One end is connected to the signal generating unit 3 through the voltage transmission circuit 7, and the second end of the field effect transistor is connected to the output end of the row tube data line 8; wherein, the field effect transistor is configured to be turned on or off according to the control signal, so that When the field effect transistor is turned on, the signal generating unit 3 changes the gray scale of the LED on the column tube data line 8 through the voltage transmission circuit 7 .
  • the field effect transistor includes but is not limited to: one of an N-type field effect transistor and a P-type field effect transistor.
  • the field effect transistor is an N-type field effect transistor
  • the gate of the N-type field effect transistor It is the control terminal
  • the source is the first terminal
  • the drain is the second terminal.
  • the control terminal of the N-type field effect transistor is connected to the signal transmission circuit 6 and the first timing controller 32, and the source of the N-type field effect transistor passes through the voltage transmission circuit.
  • the drain of the field effect transistor is connected to the output end of the data line 8 of the column tube, and then the first control signal is received at the control end, and when the source and drain are turned on, the voltage transmission
  • the circuit 7 pulls down the voltage of the output terminal of the tube data line 8 to increase the gray scale of the LED on the tube data line 8 .
  • the first control signal is a high-level signal
  • the second control signal is a low-level signal.
  • the gate of the N-type field effect transistor is the control terminal
  • the drain is the first terminal
  • the source is the second terminal
  • the control terminal of the N-type field effect transistor The terminal is connected with the signal transmission circuit 6 and the second timing controller 35
  • the drain of the N-type field effect transistor is connected with the second voltage limiting module 34 through the voltage transmission circuit 7, and the source of the field effect transistor is connected with the column tube data line 8.
  • the output terminal is connected, and then the control terminal receives the first control signal, and when the source and the drain are turned on, the voltage at the output terminal of the tube data line 8 is pulled up through the voltage transmission circuit 7, and the voltage on the tube data line 8 is reduced.
  • LED grayscale At this time, the first control signal is a high-level signal, and the second control signal is a low-level signal.
  • the field effect transistor is a P-type field effect transistor
  • the gate of the P-type field effect transistor is the control terminal
  • the drain is the first terminal
  • the source is the first terminal
  • the control terminal of the P-type field effect transistor is connected to the signal transmission terminal.
  • the circuit 6 is connected to the first timing controller 32
  • the drain of the P-type field effect transistor is connected to the first voltage limiting module 31 through the voltage transmission circuit 7
  • the source of the field effect transistor is connected to the output end of the row tube data line 8
  • the control end receives the first control signal and turns on the source and drain
  • the voltage at the output end of the tube data line 8 is pulled down through the voltage transmission circuit 7 to increase the LED gray scale on the tube data line 8 .
  • the first control signal is a low-level signal
  • the second control signal is a high-level signal.
  • the gate of the P-type field effect transistor is the control terminal
  • the source is the first terminal
  • the drain is the second terminal
  • the control terminal of the P-type field effect transistor is The terminal is connected with the signal transmission circuit 6 and the first timing controller 32
  • the source of the P-type field effect transistor is connected with the first voltage limiting module 31 through the voltage transmission circuit 7, and the drain of the field effect transistor is connected with the column tube data line 8.
  • the output end is connected, and then the first control signal is received at the control end, and when the source and drain are turned on, the voltage at the output end of the tube data line 8 is pulled up through the voltage transmission circuit 7, and the LED on the tube data line 8 is reduced. grayscale.
  • the first control signal is a low-level signal
  • the second control signal is a high-level signal.
  • control switch 4 does not limit the control switch 4 to be a field effect transistor, and the control switch 4 may also be other switches that can be turned on or off according to a control signal and limit the direction of the current.
  • this embodiment also provides a display device. As shown in FIG. There is a display unit 9 , and the output end of at least one columnar data line 8 is provided with the gray scale compensation circuit 1 as above.
  • the type of display unit 9 includes but not limited to: micro light emitting diode (Micro light emitting diode) At least one of Light Emitting Diode Display, Micro LED), Mini Light Emitting Diode (Mini Light Emitting Diode, Mini LED) and the like.
  • the display unit 9 includes a red light display unit, a green light display unit and a blue light display unit; or, the display unit 9 includes a red light display unit, a green light display unit, a blue light display unit and a yellow light display unit.
  • This embodiment provides a grayscale compensation method, as shown in Figure 17, which includes but is not limited to:
  • S102 Output at least one control signal to the control terminal of the control switch within the period of the multiplied signal through the signal generation unit, and the control signal is configured to turn on or off the control switch;
  • the signal generation unit changes the gray scale of the LED on the data line of the array tube when the control switch is turned on.
  • the first control signal is sent to change the driving voltage for driving the display unit, so that the display unit does not emit light within the time of the first control signal, reducing the display
  • the brightness of the unit avoids the problem of excessive brightness of the display unit, and improves the overall display uniformity of the display unit when there are multiple display units.
  • changing the gray scale of the LED on the row pipe data line includes: the signal generation unit pulls down the driving voltage of the row pipe data line when the control switch is turned on , to increase the gray scale of the LED on the data line of the column tube.
  • the present embodiment also provides a computer-readable storage medium comprising volatile memory implemented in any method or technology for storing information, such as instructions, data structures, computer program modules, or other data.
  • volatile or nonvolatile, removable or non-removable media include but are not limited to RAM (Random Access Memory, random access memory), ROM (Read-Only Memory, read-only memory), EEPROM (Electrically Erasable Programmable Read Only Memory, electrically erasable programmable read-only memory ), Flash or other memory technologies, CD-ROM (Compact Disc Read-Only Memory, Digital Versatile Disk (DVD) or other optical disk storage, magnetic cartridge, magnetic tape, magnetic disk storage or other magnetic storage device, or can be used to store desired information and can be accessed by a computer any other medium.
  • RAM Random Access Memory
  • ROM Read-Only Memory
  • EEPROM Electrically Erasable Programmable Read Only Memory
  • Flash or other memory technologies CD-ROM (Compact Disc Read-Only Memory, Digital Versatile Dis
  • the computer-readable storage medium in this embodiment can be used to store one or more computer programs, and the one or more computer programs stored therein can be executed by a processor to implement at least one step of the above gray scale compensation method.
  • the functional modules/units in the system and the device can be implemented as software (the computer program code executable by the computing device can be used to realize ), firmware, hardware, and appropriate combinations thereof.
  • the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be composed of several physical components. Components cooperate to execute.
  • Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit .
  • communication media typically embody instructions, data structures, computer program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and can include any information delivery media, as is well known to those of ordinary skill in the art. Therefore, the application is not limited to any specific combination of hardware and software.

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Abstract

A grayscale compensation circuit (1), a display apparatus, and a grayscale compensation method. The grayscale compensation circuit (1) comprises a signal synchronization unit (2), a signal generation unit (3) and a control switch (4). The signal synchronization unit (2) is configured to receive a clock signal that is transmitted by an output end (5) of the clock signal, perform frequency multiplication on the clock signal to obtain a frequency multiplication signal, and transmit the frequency multiplication signal to the signal generation unit (3); the signal generation unit (3) outputs at least one control signal within the period of the frequency multiplication signal, wherein the control signal is configured to turn on or turn off the control switch (4); and the signal generation unit (3) changes the grayscale of an LED on a column tube data line (8) by means of a voltage transmission circuit (7) when the control switch (4) is in an on state.

Description

一种灰度补偿电路、显示装置以及灰度补偿方法A gray scale compensation circuit, a display device and a gray scale compensation method 技术领域technical field
本申请涉及半导体器件领域，尤其涉及一种灰度补偿电路、显示装置以及灰度补偿方法。The present application relates to the field of semiconductor devices, and in particular to a gray scale compensation circuit, a display device and a gray scale compensation method.
背景技术Background technique
发光二极管(Light-emitting diode，LED)显示技术具有高亮度、高响应速度、低功耗、长寿命等优点，可以应用于超大屏高清显示，如监控指挥，高清演播，高端影院，医疗检测等专业领域或者户外广告，会议会展，办公显示等商业领域，成为人们追求新一代显示技术的研究热点。Light-emitting diode (Light-emitting diode, LED) display technology has the advantages of high brightness, high response speed, low power consumption, long life, etc., and can be applied to ultra-large-screen high-definition display, such as monitoring command, high-definition studio, high-end cinema, medical detection, etc. Professional fields or commercial fields such as outdoor advertising, conferences and exhibitions, and office displays have become research hotspots for people pursuing a new generation of display technology.
随着小间距的发展， LED显示装置对行驱动提出了更高的要求，从单纯的P-MOSFET（Positive Channel Metal Oxide Semiconductor Field-Effect Transistor，P型金属-氧化物半导体场效应晶体管）实现行切换，到集成度更高，功能更强的多功能行驱动，现目前，显示装置中显示单元的灰度受到时钟信号的控制，无法灵活改变列管数据线输出的灰度，进而使得列管数据线上的显示单元的灰度显示不够细腻，显示单元的显示效果差。With the development of small spacing, LED display devices put forward higher requirements for row driving, from pure P-MOSFET (Positive Channel Metal Oxide Semiconductor Field-Effect Transistor, P-type metal-oxide-semiconductor field-effect transistor) to realize row switching, to a multifunctional row driver with higher integration and stronger functions. At present, the gray scale of the display unit in the display device is controlled by the clock signal, and cannot The gray scale output by the tube data line is flexibly changed, so that the gray scale display of the display unit on the tube data line is not fine enough, and the display effect of the display unit is poor.
因此，如何使得显示单元的灰度显示更为细腻是亟需解决的问题。Therefore, how to make the grayscale display of the display unit more delicate is an urgent problem to be solved.
技术问题technical problem
鉴于上述相关技术的不足，本申请的目的在于提供一种灰度补偿电路、显示装置以及灰度补偿方法，旨在解决显示单元的灰度显示不够细腻，显示单元的显示效果差的问题。In view of the deficiencies of the above-mentioned related technologies, the purpose of this application is to provide a gray scale compensation circuit, a display device and a gray scale compensation method, aiming at solving the problem that the gray scale display of the display unit is not fine enough and the display effect of the display unit is poor.
技术解决方案technical solution
一种灰度补偿电路，灰度补偿电路包括A gray scale compensation circuit, the gray scale compensation circuit includes
控制开关；control switch;
通过信号传输电路与控制开关的控制端连接的信号发生单元，信号发生单元还通过电压传输电路与控制开关的第一端连接；A signal generating unit connected to the control end of the control switch through the signal transmission circuit, and the signal generating unit is also connected to the first end of the control switch through the voltage transmission circuit;
以及一端与时钟信号的输出端连接，另一端与信号发生单元的输入端连接的信号同步单元；And a signal synchronization unit connected to the output end of the clock signal at one end and connected to the input end of the signal generating unit at the other end;
控制开关的第二端与列管数据线的输出端连接；信号同步单元被配置为接收时钟信号的输出端传输的时钟信号，并将时钟信号进行倍频得到倍频信号，并传输到信号发生单元，信号发生单元被配置为在倍频信号的周期内输出至少一个控制信号，控制信号被配置为导通或者截止控制开关；信号发生单元在控制开关为导通状态时，通过电压传输电路改变列管数据线上的LED的灰度。The second end of the control switch is connected to the output end of the tube data line; the signal synchronization unit is configured to receive the clock signal transmitted by the output end of the clock signal, and perform frequency multiplication on the clock signal to obtain a frequency multiplied signal, and transmit it to the signal generator unit, the signal generation unit is configured to output at least one control signal within the period of the multiplied signal, and the control signal is configured to turn on or off the control switch; when the signal generation unit is in the on state of the control switch, it changes the The grayscale of the LEDs on the data line.
基于同样的发明构思，本申请还提供一种显示装置，显示装置包括多个行管数据线以及多个列管数据线，各行管数据线与各列管数据线之间设置有显示单元，至少一个列管数据线的输出端设置有如上任一项的灰度补偿电路。Based on the same inventive concept, the present application also provides a display device, the display device includes a plurality of row pipe data lines and a plurality of column pipe data lines, a display unit is arranged between each row pipe data line and each column pipe data line, at least The output end of one tube data line is provided with any one of the above gray scale compensation circuits.
基于同样的发明构思，本申请还提供一种灰度补偿方法，应用于如上的灰度补偿电路，灰度补偿方法包括：通过信号同步单元接收时钟信号的输出端传输的时钟信号，并将时钟信号进行倍频得到倍频信号，并传输到信号发生单元；通过信号发生单元在倍频信号的周期内输出至少一个控制信号到控制开关的控制端，控制信号被配置为导通或者截止控制开关；信号发生单元在控制开关为导通状态时，改变列管数据线上的LED的灰度。Based on the same inventive concept, this application also provides a gray scale compensation method, which is applied to the above gray scale compensation circuit. The gray scale compensation method includes: receiving the clock signal transmitted by the output terminal of the clock signal through the signal synchronization unit, and transferring the clock signal to The signal is multiplied to obtain a frequency multiplied signal, and transmitted to the signal generating unit; the signal generating unit outputs at least one control signal to the control terminal of the control switch within the period of the frequency multiplied signal, and the control signal is configured to turn on or off the control switch ; The signal generating unit changes the gray scale of the LED on the row tube data line when the control switch is in a conducting state.
有益效果Beneficial effect
上述灰度补偿电路，包括信号同步单元、信号发生单元、控制开关，信号同步单元被配置为接收时钟信号的输出端传输的时钟信号，并将时钟信号进行倍频得到倍频信号，并传输到信号发生单元，信号发生单元在倍频信号的周期内输出至少一个控制信号，控制信号被配置为导通或者截止控制开关；信号发生单元在控制开关为导通状态时，通过电压传输电路改变列管数据线上的LED的灰度，进而使得列管数据线能够输出更细腻的灰度，提升了显示单元的显示效果。The above-mentioned grayscale compensation circuit includes a signal synchronization unit, a signal generation unit, and a control switch. The signal synchronization unit is configured to receive the clock signal transmitted from the output end of the clock signal, and perform frequency multiplication on the clock signal to obtain a frequency multiplication signal, and transmit it to A signal generating unit, the signal generating unit outputs at least one control signal within the period of the multiplied signal, and the control signal is configured to turn on or off the control switch; when the signal generating unit is in the on state of the control switch, it changes the column through the voltage transmission circuit The gray scale of the LEDs on the tube data line enables the tube data line to output more delicate gray scales and improves the display effect of the display unit.
上述显示装置，通过灰度补偿电路中的信号同步单元、信号发生单元、控制开关，在接收时钟信号的输出端传输的时钟信号时，将时钟信号进行倍频得到倍频信号，并传输到信号发生单元，信号发生单元在倍频信号的周期内输出至少一个控制信号，控制信号被配置为导通或者截止控制开关；信号发生单元在控制开关为导通状态时，通过电压传输电路改变列管数据线上的LED的灰度，进而使得列管数据线能够输出更细腻的灰度，提升了显示单元的显示效果。The above-mentioned display device, through the signal synchronization unit, the signal generating unit, and the control switch in the grayscale compensation circuit, when receiving the clock signal transmitted by the output end of the clock signal, performs frequency multiplication of the clock signal to obtain a frequency multiplication signal, and transmits it to the signal A generating unit, the signal generating unit outputs at least one control signal within the period of the frequency multiplier signal, and the control signal is configured to turn on or off the control switch; when the signal generating unit is in the on state of the control switch, it changes the array tube through the voltage transmission circuit The gray scale of the LED on the data line further enables the column tube data line to output a finer gray scale and improves the display effect of the display unit.
上述灰度补偿方法，通过在接收时钟信号的输出端传输的时钟信号时，将时钟信号进行倍频得到倍频信号，并传输到信号发生单元，信号发生单元在倍频信号的周期内输出至少一个控制信号，控制信号被配置为导通或者截止控制开关；信号发生单元在控制开关为导通状态时，通过电压传输电路改变列管数据线上的LED的灰度，进而使得列管数据线能够输出更细腻的灰度，提升了显示单元的显示效果。In the above-mentioned gray scale compensation method, when receiving the clock signal transmitted from the output end of the clock signal, the clock signal is multiplied to obtain a frequency multiplied signal, and transmitted to the signal generating unit, and the signal generating unit outputs at least A control signal, the control signal is configured to turn on or off the control switch; when the control switch is in the on state, the signal generation unit changes the gray scale of the LED on the row tube data line through the voltage transmission circuit, thereby making the row tube data line It can output more delicate grayscale, which improves the display effect of the display unit.
附图说明Description of drawings
图1为本申请实施例提供的列管数据线输出端输出的灰度的波形图的波形图；Fig. 1 is the waveform diagram of the waveform diagram of the gray scale output by the output terminal of the tube data line provided by the embodiment of the present application;
图2为本申请实施例提供的显示单元根据灰度进行显示的基本示意图；FIG. 2 is a basic schematic diagram of displaying by a display unit according to the gray scale provided by the embodiment of the present application;
图3为本申请实施例提供的灰度与1个时钟信号的1个周期的宽度的基本示意图；FIG. 3 is a basic schematic diagram of the gray scale and the width of one period of one clock signal provided by the embodiment of the present application;
图4为本申请实施例提供的灰度n与灰度n+1的灰度对比基本示意图；FIG. 4 is a basic schematic diagram of the grayscale comparison between grayscale n and grayscale n+1 provided by the embodiment of the present application;
图5为本申请实施例提供的灰度补偿电路的基本结构示意图；FIG. 5 is a schematic diagram of the basic structure of the gray scale compensation circuit provided by the embodiment of the present application;
图6为本申请实施例提供的信号同步单元的基本结构示意图；FIG. 6 is a schematic diagram of the basic structure of the signal synchronization unit provided by the embodiment of the present application;
图7为本申请实施例提供的倍频器的基本结构示意图；FIG. 7 is a schematic diagram of the basic structure of a frequency multiplier provided in an embodiment of the present application;
图8为本申请实施例提供的信号发生单元的基本结构示意图；FIG. 8 is a schematic diagram of the basic structure of the signal generation unit provided by the embodiment of the present application;
图9为本申请实施例提供的第一电压限制模块的基本结构示意图；FIG. 9 is a schematic diagram of the basic structure of the first voltage limiting module provided by the embodiment of the present application;
图10为本申请实施例提供的灰度n+1的基本示意图；FIG. 10 is a basic schematic diagram of grayscale n+1 provided by the embodiment of the present application;
图11为本申请实施例提供的灰度n+1又一种的基本示意图；Fig. 11 is another basic schematic diagram of grayscale n+1 provided by the embodiment of the present application;
图12为本申请实施例提供的电压速度控制器的基本结构示意图；Figure 12 is a schematic diagram of the basic structure of the voltage speed controller provided by the embodiment of the present application;
图13为本申请实施例提供的又一信号发生单元的基本结构示意图；FIG. 13 is a schematic diagram of the basic structure of another signal generating unit provided by the embodiment of the present application;
图14为本申请实施例提供的灰度n-1的基本示意图；Fig. 14 is a basic schematic diagram of grayscale n-1 provided by the embodiment of the present application;
图15为本申请实施例提供的控制开关的基本结构示意图；FIG. 15 is a schematic diagram of the basic structure of the control switch provided by the embodiment of the present application;
图16为本申请实施例提供的显示装置的基本结构示意图；FIG. 16 is a schematic diagram of the basic structure of a display device provided by an embodiment of the present application;
图17为本申请另一可选实施例提供的灰度补偿方法的基本流程示意图；FIG. 17 is a schematic flowchart of a grayscale compensation method provided in another optional embodiment of the present application;
附图标记说明：Explanation of reference signs:
1-灰度补偿电路、2-信号同步单元、3-信号发生单元、4-控制开关、5-时钟信号的输出端、6-信号传输电路、7-电压传输电路、8-列管数据线、21-倍频器、211-分频器、212-锁相环、31-第一电压限制模块、32-第一时序控制器、33-电压速度控制器、34-第二电压限制模块、35-第二时序控制器、9-显示单元、R-电阻、Driver IC-驱动芯片。1-Gray scale compensation circuit, 2-Signal synchronization unit, 3-Signal generating unit, 4-Control switch, 5-Clock signal output terminal, 6-Signal transmission circuit, 7-Voltage transmission circuit, 8-Tube data line , 21-frequency multiplier, 211-frequency divider, 212-phase locked loop, 31-first voltage limiting module, 32-first timing controller, 33-voltage speed controller, 34-second voltage limiting module, 35-second timing controller, 9-display unit, R-resistor, Driver IC-driver chip.
本发明的实施方式Embodiments of the present invention
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳实施方式。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施方式。相反地，提供这些实施方式的目的是使对本申请的公开内容理解的更加透彻全面。In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Preferred embodiments of the application are shown in the accompanying drawings. However, the present application can be embodied in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the application more thorough and comprehensive.
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施方式的目的，不是旨在于限制本申请。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terminology used herein in the description of the application is only for the purpose of describing specific embodiments, and is not intended to limit the application.
相关技术中，随着小间距的发展，LED显示屏对行驱动提出了更高的要求，从单纯的P-MOSFET实现行切换，到集成度更高，功能更强的多功能行驱动，仅以显示单元9（以显示单元9为LED进行说明）共阳极（即显示单元9的阳极与行管数据线连接）为背景介绍，如图1所示，图1所示为列管数据线8输出端输出的灰度的波形图，当行管数据线的输出的信号Row（n+1）为低时，行管数据线的驱动电压则被拉高，行管数据线上的LED就会得到显示；如图2所示，当列管数据线8的输出信号Out的脉宽不同时，显示单元9的显示的灰度则不同，其中，Out（m）的脉宽最窄，Out（m+2）的脉宽最宽，则Out（m）上的显示单元9所显示的灰度低于Out（m+2）上的显示单元9所显示的灰度；In related technologies, with the development of small spacing, LED display screens have put forward higher requirements for row drivers. From simple P-MOSFET row switching to multifunctional row drivers with higher integration and stronger functions, only The introduction is based on the common anode of the display unit 9 (the display unit 9 is an LED) (that is, the anode of the display unit 9 is connected to the row pipe data line), as shown in Figure 1, and Figure 1 shows the row tube data line 8 The waveform diagram of the grayscale output at the output terminal, when the output signal Row (n+1) of the line pipe data line is low, the driving voltage of the line pipe data line is pulled up, and the LED on the line pipe data line will get display; as shown in Figure 2, when the pulse width of the output signal Out of the tube data line 8 is different, the grayscale displayed by the display unit 9 is different, wherein the pulse width of Out(m) is the narrowest, and Out(m +2) has the widest pulse width, the grayscale displayed by the display unit 9 on Out(m) is lower than the grayscale displayed by the display unit 9 on Out(m+2);
其中，列管数据线8上的LED灰度受时钟信号的控制，列管数据线8根据时钟信号的周期进行灰度控制，1个时钟信号的1个周期对应1个灰度，如图3所示，灰度1的脉宽t为1个GCLK（灰度时钟信号）的周期，以此类推，灰度2的脉宽为2个GCLK的周期，灰度3的脉宽为3个GCLK的周期，如图4所示，灰度n与灰度n+1相比，灰度n+1对应的脉宽增加了1个t1的宽度，宽度t1为图3中一个GCLK的周期，目前，驱动芯片Driver IC无法输出比时钟信号的一个周期更低的宽度的信号，进而列管数据线8在灰度n与灰度n+1的宽度之间无法输出灰度n+x的宽度，灰度n+x的脉宽可以视为在灰度n的脉宽基础上，增加x倍时钟周期的宽度，也即目前灰度的脉宽变化无法小于1个时钟周期的宽度。使得显示单元9的根据列管数据线8上的LED灰度进行显示时不够细腻，显示单元9的显示效果差。Among them, the LED gray scale on the tube data line 8 is controlled by the clock signal, and the tube data line 8 performs gray scale control according to the cycle of the clock signal, and one cycle of one clock signal corresponds to one gray scale, as shown in Figure 3 As shown, the pulse width t of grayscale 1 is 1 GCLK (grayscale clock signal) cycle, and so on, the pulse width of grayscale 2 is 2 GCLK cycles, and the pulse width of grayscale 3 is 3 GCLK As shown in Figure 4, compared with gray scale n+1, the pulse width corresponding to gray scale n+1 increases by 1 t1 width, and the width t1 is a GCLK cycle in Figure 3. Currently , the driver IC cannot output a signal with a width lower than one period of the clock signal, and then the tube data line 8 cannot output the width of grayscale n+x between the width of grayscale n and grayscale n+1, The pulse width of grayscale n+x can be regarded as increasing the width of x times the clock cycle on the basis of the pulse width of grayscale n, that is, the current pulse width of grayscale cannot change less than the width of 1 clock cycle. As a result, the display of the display unit 9 according to the gray scale of the LEDs on the data line 8 is not delicate enough, and the display effect of the display unit 9 is poor.
其中，x的取值大于0，且小于1，例如，x的取值可以是0.5。Wherein, the value of x is greater than 0 and less than 1, for example, the value of x may be 0.5.
当然，x的取值还可以是0.1、0.2、0.3、0.4、0.6、0.7、0.8、0.9等。当然x的取值还可以是百分数（例如，0.55或65%），在此，不作具体限定。Of course, the value of x can also be 0.1, 0.2, 0.3, 0.4, 0.6, 0.7, 0.8, 0.9 and so on. Of course, the value of x may also be a percentage (for example, 0.55 or 65%), which is not specifically limited here.
应理解，x的具体取值可以通过时间t2（具体参照下文所述）来决定。It should be understood that the specific value of x may be determined by the time t2 (refer to the description below for details).
基于此，本申请希望提供一种能够解决上述技术问题的方案，其详细内容将在后续实施例中得以阐述。Based on this, the present application hopes to provide a solution capable of solving the above-mentioned technical problems, the details of which will be described in subsequent embodiments.
本申请实施例Example of this application
本申请实施例提供一种灰度补偿电路1，如图5所示，灰度补偿电路1包括：信号同步单元2、信号发生单元3，控制开关4；The embodiment of the present application provides a grayscale compensation circuit 1. As shown in FIG. 5, the grayscale compensation circuit 1 includes: a signal synchronization unit 2, a signal generation unit 3, and a control switch 4;
信号同步单元2的一端与时钟信号的输出端5连接，信号同步单元2的另一端与信号发生单元3的输入端连接，信号发生单元3通过信号传输电路6与控制开关4的控制端连接，信号发生单元3还通过电压传输电路7与控制开关4的第一端连接，控制开关4的第二端与列管数据线8的输出端连接；One end of the signal synchronization unit 2 is connected with the output terminal 5 of the clock signal, and the other end of the signal synchronization unit 2 is connected with the input terminal of the signal generation unit 3, and the signal generation unit 3 is connected with the control end of the control switch 4 by the signal transmission circuit 6, The signal generating unit 3 is also connected to the first end of the control switch 4 through the voltage transmission circuit 7, and the second end of the control switch 4 is connected to the output end of the tube data line 8;
信号同步单元2被配置为接收时钟信号的输出端5传输的时钟信号，并将时钟信号进行倍频得到倍频信号，并传输到信号发生单元3，信号发生单元3在倍频信号的周期内输出至少一个控制信号，也即信号发生单元3输出的控制信号是根据倍频信号的周期而产生的。例如，信号发生单元3的控制信号只在倍频信号的一个周期开始或结束时产生，且也只在倍频信号的一个周期开始或结束时停止输出。作为更具体的示例，信号发生单元3输出控制信号时，其输出的电压由高电平变化为低电平（或由低电平变化为高电平），信号发生单元3输出的电压只在倍频信号上升沿或下降沿的时刻变化。控制信号被配置为导通或者截止控制开关4；信号发生单元3在控制开关4为导通状态时，通过电压传输电路7改变列管数据线8上的LED灰度。The signal synchronization unit 2 is configured to receive the clock signal transmitted by the output terminal 5 of the clock signal, and perform frequency multiplication on the clock signal to obtain a frequency multiplied signal, and transmit it to the signal generating unit 3, and the signal generating unit 3 is within the period of the frequency multiplied signal At least one control signal is output, that is, the control signal output by the signal generating unit 3 is generated according to the period of the frequency multiplied signal. For example, the control signal of the signal generating unit 3 is only generated at the beginning or end of one period of the frequency multiplied signal, and the output is stopped only at the beginning or end of one period of the frequency multiplied signal. As a more specific example, when the signal generation unit 3 outputs the control signal, the output voltage changes from high level to low level (or from low level to high level), and the output voltage of the signal generation unit 3 is only in the The timing of the rising or falling edge of the multiplier signal changes. The control signal is configured to turn on or turn off the control switch 4; when the control switch 4 is turned on, the signal generation unit 3 changes the gray scale of the LED on the column management data line 8 through the voltage transmission circuit 7.
可以理解的是，在LED显示中，LED灰度与发光时间相关，本实施例中对于LED灰度的控制实质就是对LED发光时间的控制。例如图2中的Out（m）所具有的不同宽度，则能够驱动LED发光不同的时间，从而呈现出不同的灰度。本实施例的灰度补偿电路1通过控制开关4的导通，改变列管数据线8上的驱动电压，从而改变了LED的发光时间，达到改变灰度的目的。而由于信号发生单元3的控制信号是在倍频信号的周期内输出，也即根据倍频信号的周期产生，控制信号能够具有更短的脉宽，对LED的发光时间的改变能够更短，从而实现更小粒度的发光时间变化，相当于能够划分出更多的灰度等级，由此在一些实施过程中可以让显示效果更细腻。本实施例提供的灰度补偿电路1，包括信号同步单元2、信号发生单元3，控制开关4，信号同步单元2被配置为接收时钟信号的输出端5传输的时钟信号，并将时钟信号进行倍频得到倍频信号，并传输到信号发生单元3，信号发生单元3在倍频信号的周期内输出至少一个控制信号，控制信号被配置为导通或者截止控制开关4；信号发生单元3在控制开关4为导通状态时，通过电压传输电路7改变列管数据线8上的LED灰度，进而使得列管数据线8上的LED能够输出更细腻的灰度，提升了显示单元9的显示效果。It can be understood that in the LED display, the LED grayscale is related to the light emitting time, and the essence of controlling the LED grayscale in this embodiment is the control of the LED light emitting time. For example, the different widths of Out(m) in Figure 2 can drive the LED to emit light for different times, thus presenting different gray scales. The grayscale compensation circuit 1 of this embodiment changes the driving voltage on the column tube data line 8 by controlling the conduction of the switch 4, thereby changing the light-emitting time of the LED and achieving the purpose of changing the grayscale. And because the control signal of the signal generation unit 3 is output in the period of the frequency multiplication signal, that is, it is generated according to the period of the frequency multiplication signal, the control signal can have a shorter pulse width, and the change of the light-emitting time of the LED can be shorter, In this way, the luminous time change with smaller granularity can be achieved, which is equivalent to being able to divide more gray levels, so that the display effect can be made more delicate in some implementation processes. The grayscale compensation circuit 1 provided in this embodiment includes a signal synchronization unit 2, a signal generation unit 3, and a control switch 4. The signal synchronization unit 2 is configured to receive the clock signal transmitted by the output terminal 5 of the clock signal, and perform the clock signal The frequency multiplication signal is obtained by frequency multiplication, and transmitted to the signal generation unit 3, the signal generation unit 3 outputs at least one control signal in the period of the frequency multiplication signal, and the control signal is configured to turn on or cut off the control switch 4; the signal generation unit 3 is in When the control switch 4 is turned on, the grayscale of the LED on the tube data line 8 is changed through the voltage transmission circuit 7, so that the LED on the tube data line 8 can output a more delicate gray scale, which improves the display unit 9. display effect.
应当理解的是，列管数据线8上的LED的灰度由列管数据线8的驱动电压控制，当列管数据线8的驱动电压为低时，列管数据线8上的LED点亮；列管数据线8的驱动电压为高时，列管数据线8上的LED处于非点亮状态，因此，可以通过拉低或抬高列管数据线8的驱动电压来改变列管数据线8上的LED的灰度。且，列管数据线8同样与时钟信号的输出端5连接，且列管数据线8与信号同步单元2接收同一个CLK信号，进而保证了列管数据线8与信号同步单元2同步。应当理解的是，一个倍频信号存在多个周期，一个控制信号对应一个周期。It should be understood that the grayscale of the LEDs on the columnar data line 8 is controlled by the driving voltage of the columnar data line 8, and when the drive voltage of the columnar data line 8 is low, the LEDs on the columnar data line 8 light up ; When the driving voltage of the row tube data line 8 is high, the LED on the row tube data line 8 is in a non-light state, therefore, the row tube data line can be changed by pulling down or raising the drive voltage of the row tube data line 8 8 on the gray scale of the LED. Moreover, the pipe data line 8 is also connected to the output terminal 5 of the clock signal, and the pipe data line 8 and the signal synchronization unit 2 receive the same CLK signal, thereby ensuring the synchronization between the pipe data line 8 and the signal synchronization unit 2 . It should be understood that a multiplied signal has multiple periods, and one control signal corresponds to one period.
在本实施例的一些示例中，如图6所示，信号同步单元2包括但不限于倍频器21，倍频器21被配置为将时钟信号进行倍频，得到倍频信号。该倍频信号的频率为时钟信号的N倍，N为不小于2的整数。倍频器21将接收到的时钟信号进行倍频，让输出的控制信号的频率是时钟信号的频率的N倍，与原本的时钟信号相比，倍频信号的周期更短，根据倍频信号的周期能够产生更窄的脉宽。毫无疑义的是，倍频器21是指使输出信号频率为输入信号频率整数倍的电子电路或器件。在一些实施方式中，如图7所示，倍频器21可以是锁相倍频器，倍频器21包括但不限于分频器211以及锁相环212，分频器211被配置为将时钟信号进行分频，得到分频信号，分频信号的频率为时钟信号的N分之一，N为不小于2的整数，锁相环212被配置为根据分频信号产生倍频信号。毫无疑义的是，分频器211是指使输出信号频率为输入信号频率整数分之一的电子电路或器件，分频器211包括但不限于：脉冲分频器（又称数字分频器）、正弦分频器、模数转换-数字分频器中的至少一个。在其他实施方式中，倍频器21也可以是其他类型。In some examples of this embodiment, as shown in FIG. 6 , the signal synchronization unit 2 includes but not limited to a frequency multiplier 21 configured to multiply the frequency of the clock signal to obtain a frequency multiplied signal. The frequency of the multiplied signal is N times that of the clock signal, and N is an integer not less than 2. The frequency multiplier 21 multiplies the frequency of the received clock signal, so that the frequency of the output control signal is N times the frequency of the clock signal. Compared with the original clock signal, the period of the frequency multiplied signal is shorter. According to the frequency multiplied signal The period can produce narrower pulse width. Undoubtedly, the frequency multiplier 21 refers to an electronic circuit or device that makes the output signal frequency an integer multiple of the input signal frequency. In some implementations, as shown in FIG. 7 , the frequency multiplier 21 can be a phase-locked frequency multiplier, and the frequency multiplier 21 includes but not limited to a frequency divider 211 and a phase-locked loop 212, and the frequency divider 211 is configured to The clock signal is frequency-divided to obtain a frequency-divided signal. The frequency of the frequency-divided signal is one-Nth of the clock signal, and N is an integer not less than 2. The phase-locked loop 212 is configured to generate a frequency-multiplied signal according to the frequency-divided signal. There is no doubt that the frequency divider 211 refers to an electronic circuit or device that makes the frequency of the output signal an integer fraction of the frequency of the input signal. The frequency divider 211 includes but is not limited to: a pulse frequency divider (also known as a digital frequency divider) , a sinusoidal frequency divider, and an analog-to-digital conversion-digital frequency divider. In other implementation manners, the frequency multiplier 21 may also be of other types.
在本实施例的一些示例中，如图8所示，信号发生单元3包括：第一电压限制模块31，第一电压限制模块31通过电压传输电路7与控制开关4的第一端连接，被配置为在控制开关4导通时拉低列管数据线8的驱动电压，以增加列管数据线8上的LED的灰度；第一时序控制器32，第一时序控制器32被配置为在需要增加灰度时，在倍频信号的周期内输出至少一个第一控制信号，并通过信号传输电路6传输到控制开关4的控制端，第一控制信号被配置为导通控制开关4；第一时序控制器32还被配置为在不需要增加灰度时，在倍频信号的周期内输出至少一个第二控制信号，并通过信号传输电路6传输到控制开关4的控制端，第二控制信号被配置为截止控制开关4。In some examples of this embodiment, as shown in FIG. 8 , the signal generating unit 3 includes: a first voltage limiting module 31, the first voltage limiting module 31 is connected to the first end of the control switch 4 through the voltage transmission circuit 7, and is It is configured to pull down the driving voltage of the row tube data line 8 when the control switch 4 is turned on, so as to increase the gray scale of the LED on the row tube data line 8; the first timing controller 32, the first timing controller 32 is configured as When it is necessary to increase the gray scale, output at least one first control signal within the period of the frequency multiplier signal, and transmit it to the control terminal of the control switch 4 through the signal transmission circuit 6, and the first control signal is configured to turn on the control switch 4; The first timing controller 32 is also configured to output at least one second control signal within the period of the frequency multiplication signal when there is no need to increase the gray level, and transmit it to the control terminal of the control switch 4 through the signal transmission circuit 6, the second The control signal is configured to turn off the control switch 4 .
承接上例，在一些示例中，第一电压限制模块31的电压可以是接地电压，如图9所示，或是由恒压电压单元提供的一个电压，应当理解的是，第一电压限制模块31的电压高于列管数据线8的驱动电压，进而在控制开关4导通时通过电压传输电路7拉低列管数据线8的驱动电压，进而增加列管数据线8上的LED的灰度。Following the above example, in some examples, the voltage of the first voltage limiting module 31 may be a ground voltage, as shown in FIG. 9 , or a voltage provided by a constant voltage unit. It should be understood that the first voltage limiting module 31 is higher than the driving voltage of the tube data line 8, and then the driving voltage of the tube data line 8 is pulled down through the voltage transmission circuit 7 when the control switch 4 is turned on, thereby increasing the grayscale of the LED on the tube data line 8. Spend.
承接上例，在一些示例中，第一时序控制器32被配置为在需要增加灰度时，在倍频信号的周期内输出至少一个第一控制信号，进而使得控制开关4导通，第一电压限制模块31拉低列管数据线8的驱动电压，以增加列管数据线8上的LED灰度；具体的，如图10所示，其中，t1为一个时钟信号一个周期的一个灰度的宽度，第一时序控制器32在倍频信号的周期内输出一个第一控制信号导通控制开关4，以拉低列管数据线8的驱动电压，进而使得列管数据线8输出灰度n+1（脉宽为灰度n的脉宽加上t2的宽度），t2为一个倍频信号一个周期内一个灰度的宽度，因为倍频信号的周期比时钟信号的周期更短，因此，t2的宽度比t1的宽度更短，则即可在原有的灰度n与下一灰度（脉宽为灰度n的脉宽加上t1的宽度）之间新增加一个灰度n+1，避免了直接增加一个t1的宽度，从而实现新增灰度，让显示效果更细腻的目的。应当理解的是，t2的宽度与倍频的倍数相关，倍数越高，t2的宽度越小。Continuing from the above example, in some examples, the first timing controller 32 is configured to output at least one first control signal within the period of the frequency-multiplied signal when the gray level needs to be increased, so as to turn on the control switch 4, and the first The voltage limiting module 31 pulls down the driving voltage of the tube data line 8 to increase the LED grayscale on the tube data line 8; specifically, as shown in FIG. 10 , where t1 is a grayscale of one period of a clock signal width, the first timing controller 32 outputs a first control signal to turn on the control switch 4 in the cycle of the frequency multiplier signal, so as to pull down the driving voltage of the row pipe data line 8, and then make the row pipe data line 8 output gray scale n+1 (the pulse width is the pulse width of grayscale n plus the width of t2), t2 is the width of a grayscale in one period of a frequency multiplier signal, because the period of the frequency multiplier signal is shorter than the period of the clock signal, so , the width of t2 is shorter than the width of t1, then a new gray level n+ can be added between the original gray level n and the next gray level (the pulse width is the pulse width of gray level n plus the width of t1) 1. Avoid directly increasing the width of a t1, so as to achieve the purpose of adding grayscale and making the display effect more delicate. It should be understood that the width of t2 is related to the multiple of the frequency multiplication, the higher the multiple, the smaller the width of t2.
应当理解的是，本实施例并不限制增加脉宽宽度的位置，也即本实施例所指的脉宽宽度是各段脉宽的宽度的总和，并不局限于连续的脉宽，第一时序控制器32被配置为在需要增加灰度时，输出第一控制信号，以导通控制开关4，增加灰度n+1的脉宽宽度，增加的宽度为t2的宽度，如图11所示；在一些示例中，第一时序控制器32还可以按照实际需求，在倍频信号的周期内根据输出多个第一控制信号，以实现增加多个t2的宽度。应当理解的是，本实施例并不限制识别是否需要增加灰度的方法，例如，可以通过传感器对灰度进行监测，以识别是否需要增加灰度；或是相关设计人员在外部进行调试时，对列管数据线8上的LED灰度进行调试，以判断是否需要增加灰度。It should be understood that this embodiment does not limit the position of increasing the pulse width, that is, the pulse width referred to in this embodiment is the sum of the widths of each pulse width, and is not limited to continuous pulse widths. The first The timing controller 32 is configured to output a first control signal to turn on the control switch 4 to increase the pulse width of the gray scale n+1 when the gray scale needs to be increased, and the increased width is the width of t2, as shown in FIG. 11 In some examples, the first timing controller 32 can also output a plurality of first control signals within the period of the multiplied signal according to actual needs, so as to increase the width of multiple t2. It should be understood that this embodiment does not limit the method for identifying whether the gray scale needs to be increased, for example, the gray scale can be monitored by a sensor to identify whether the gray scale needs to be increased; or when relevant designers perform external debugging, Debug the grayscale of the LED on the tube data line 8 to determine whether the grayscale needs to be increased.
在本实施例的一些示例中，第一控制信号与第二控制信号为相反信号，其中，第一控制信号、第二控制信号可以为高电平信号、低电平信号中的一个，当第一控制信号为高电平信号时，第二控制信号为低电平信号，应当理解的是，其中第一控制信号能够使得控制开关4为导通状态，第二控制信号能够使得控制开关为截止状态。In some examples of this embodiment, the first control signal and the second control signal are opposite signals, wherein the first control signal and the second control signal may be one of a high-level signal and a low-level signal. When the first control signal is a high-level signal, the second control signal is a low-level signal. It should be understood that the first control signal can make the control switch 4 be in a conducting state, and the second control signal can make the control switch 4 be in a cut-off state. state.
在本实施例的一些示例中，信号发生单元3还包括：电压速度控制器33；电压速度控制器33设置在第一电压限制模块31与电压传输电路7之间，被配置为在控制开关4导通时，控制拉低列管数据线8的驱动电压的速度。其中电压速度控制器33包括但不限于：电阻R，如图12所示；其中电阻R可以为固定电阻，也可以是可变电阻。当电压速度控制器33为电阻R时，电阻R的阻值越大，拉低列管数据线8的驱动电压的状态的速度越慢。In some examples of this embodiment, the signal generating unit 3 further includes: a voltage speed controller 33; the voltage speed controller 33 is arranged between the first voltage limiting module 31 and the voltage transmission circuit 7, and is configured to control the switch 4 When it is turned on, the speed of pulling down the driving voltage of the tube data line 8 is controlled. The voltage speed controller 33 includes but is not limited to: a resistor R, as shown in FIG. 12 ; wherein the resistor R can be a fixed resistor or a variable resistor. When the voltage speed controller 33 is a resistor R, the larger the resistance value of the resistor R is, the slower the speed of pulling down the driving voltage of the tube data line 8 is.
在本实施例的一些示例中，如图13所示，信号发生单元3还包括： 第二电压限制模块34，第二电压限制模块34通过电压传输电路7与控制开关4的第一端连接，被配置为在控制开关4导通时拉高列管数据线8的驱动电压，以减少列管数据线8上的LED灰度；第二时序控制器35，第二时序控制器35被配置为在显示单元9需要减少灰度时，在倍频信号的周期内输出至少一个第一控制信号，并通过信号传输电路6传输到控制开关4的控制端，第一控制信号被配置为导通控制开关4；第二时序控制器35还被配置为在显示单元9不需要减少灰度时，在倍频信号的周期内输出至少一个第二控制信号，并通过信号传输电路6传输到控制开关4的控制端，第二控制信号被配置为截止控制开关4。In some examples of this embodiment, as shown in FIG. 13 , the signal generating unit 3 further includes: a second voltage limiting module 34, the second voltage limiting module 34 is connected to the first end of the control switch 4 through the voltage transmission circuit 7, It is configured to pull up the driving voltage of the row tube data line 8 when the control switch 4 is turned on, so as to reduce the LED gray scale on the row tube data line 8; the second timing controller 35, the second timing controller 35 is configured to When the display unit 9 needs to reduce the grayscale, at least one first control signal is output in the period of the frequency multiplier signal, and is transmitted to the control terminal of the control switch 4 through the signal transmission circuit 6, and the first control signal is configured as conduction control The switch 4; the second timing controller 35 is also configured to output at least one second control signal within the cycle of the multiplied signal when the display unit 9 does not need to reduce the grayscale, and transmit it to the control switch 4 through the signal transmission circuit 6 The control terminal of the second control signal is configured to turn off the control switch 4 .
承接上例，在一些示例中，第二电压限制模块34的电压可以是由恒压电压单元提供的一个电压，应当理解的是，第二电压限制模块34的电压高于列管数据线8的驱动电压，进而在控制开关4导通时通过电压传输电路7拉高列管数据线8的驱动电压，进而减少列管数据线8上的LED灰度。Following the above example, in some examples, the voltage of the second voltage limiting module 34 may be a voltage provided by a constant voltage voltage unit. It should be understood that the voltage of the second voltage limiting module 34 is higher than that of the tube data line 8 The driving voltage, and then pull up the driving voltage of the tube data line 8 through the voltage transmission circuit 7 when the control switch 4 is turned on, thereby reducing the gray scale of the LED on the tube data line 8 .
承接上例，在一些示例中，第二时序控制器35被配置为在显示单元9需要减少灰度时，在倍频信号的周期内输出至少一个第一控制信号，进而使得控制开关4导通，第二电压限制模块34拉高列管数据线8的驱动电压，以减少列管数据线8上的LED灰度；具体的，如图14所示，其中，t2为一个倍频信号一个周期内一个灰度的宽度，因为倍频信号的周期比时钟信号的周期更短，因此，灰度n-1的脉宽比时钟信号一个周期对应的灰度的脉宽更短，则即可在原有的灰度n的基础之上减少一个t2的宽度，避免了直接减少1个时钟信号1个周期对应的宽度（即t1的宽度），从而实现更小的降低灰度，让显示效果更细腻的目的。应当理解的是，t2的宽度与倍频的倍数相关，倍数越高，t2的宽度越小。Continuing from the above example, in some examples, the second timing controller 35 is configured to output at least one first control signal within the period of the frequency multiplied signal when the display unit 9 needs to reduce the gray level, thereby turning on the control switch 4 , the second voltage limiting module 34 pulls up the driving voltage of the tube data line 8 to reduce the LED grayscale on the tube data line 8; specifically, as shown in FIG. 14 , where t2 is a cycle of a frequency multiplication signal The width of a gray scale, because the period of the frequency multiplier signal is shorter than the period of the clock signal, therefore, the pulse width of gray scale n-1 is shorter than the pulse width of the gray scale corresponding to one cycle of the clock signal, then it can be used in the original On the basis of some gray levels n, the width of t2 is reduced, which avoids directly reducing the width corresponding to one clock signal and one cycle (that is, the width of t1), so as to achieve a smaller reduction in gray level and make the display effect more delicate the goal of. It should be understood that the width of t2 is related to the multiple of the frequency multiplication, the higher the multiple, the smaller the width of t2.
应当理解的是，第二时序控制器35被配置为在需要减少灰度时，输出第一控制信号，以导通控制开关4，在一些示例中，可以按照实际需求，在倍频信号的周期内根据输出多个第一控制信号，以实现减少多个t2的宽度。应当理解的是，本实施例并不限制识别是否需要减少灰度的方法，例如，可以通过传感器对灰度进行监测，以识别是否需要减少灰度；或是相关设计人员在外部进行调试时，对列管数据线8上的LED灰度进行调试，以判断是否需要减少灰度。It should be understood that the second timing controller 35 is configured to output the first control signal to turn on the control switch 4 when the gray level needs to be reduced. The internal basis outputs a plurality of first control signals, so as to reduce the width of a plurality of t2. It should be understood that this embodiment does not limit the method for identifying whether the gray scale needs to be reduced. For example, the gray scale can be monitored by a sensor to identify whether the gray scale needs to be reduced; or when the relevant designer performs external debugging, Debug the LED grayscale on the tube data line 8 to determine whether the grayscale needs to be reduced.
一些实施方式中，还可以根据显示过程中的实际要显示的画面决定，例如所要显示的画面对显示效果的要求更高，更多种灰度能够帮助画面呈现出更好的显示效果，则可以根据画面的需求，在原有的灰度基础上增加或减少，从而实现更细腻的灰度过渡。In some implementations, it can also be determined according to the actual picture to be displayed during the display process. For example, the picture to be displayed has higher requirements on the display effect, and more gray scales can help the picture to show a better display effect. According to the needs of the picture, increase or decrease on the basis of the original gray scale, so as to achieve a more delicate gray scale transition.
应当理解的是，信号发生单元3内可以同时设置有第一时序控制器32、第一电压限制模块31，第二时序控制器35、第二电压限制模块34，以达到在增加和减少灰度的效果。It should be understood that the first timing controller 32, the first voltage limiting module 31, the second timing controller 35, and the second voltage limiting module 34 may be installed in the signal generating unit 3 at the same time, so as to increase and decrease the gray level. Effect.
在本实施例的一些示例中，如图15所示，控制开关4包括但不限于：场效应晶体管；场效应晶体管的控制端通过信号传输电路6与信号发生单元3连接，场效应晶体管的第一端通过电压传输电路7与信号发生单元3连接，场效应晶体管的第二端与列管数据线8的输出端连接；其中，场效应晶体管被配置为根据控制信号导通或者截止，以使得信号发生单元3在场效应晶体管为导通状态时，通过电压传输电路7改变列管数据线8上的LED灰度。In some examples of this embodiment, as shown in FIG. 15 , the control switch 4 includes but is not limited to: a field effect transistor; the control terminal of the field effect transistor is connected to the signal generating unit 3 through the signal transmission circuit 6, and the first field effect transistor One end is connected to the signal generating unit 3 through the voltage transmission circuit 7, and the second end of the field effect transistor is connected to the output end of the row tube data line 8; wherein, the field effect transistor is configured to be turned on or off according to the control signal, so that When the field effect transistor is turned on, the signal generating unit 3 changes the gray scale of the LED on the column tube data line 8 through the voltage transmission circuit 7 .
在本实施例的一些示例中，场效应晶体管包括但不限于：N型场效应晶体管、P型场效应晶体管中的一个，当场效应晶体管为N型场效应晶体管时，N型场效应晶体管的栅极为控制端、源极为第一端、漏极为第二端，N型场效应晶体管的控制端与信号传输电路6与第一时序控制器32连接，N型场效应晶体管的源极通过电压传输电路7与第一电压限制模块31连接，场效应晶体管的漏极与列管数据线8的输出端连接，进而在控制端接收到第一控制信号，导通源极与漏极时，通过电压传输电路7拉低列管数据线8的输出端的电压，增加列管数据线8上的LED灰度。此时，第一控制信号为高电平信号，第二控制信号为低电平信号。In some examples of this embodiment, the field effect transistor includes but is not limited to: one of an N-type field effect transistor and a P-type field effect transistor. When the field effect transistor is an N-type field effect transistor, the gate of the N-type field effect transistor It is the control terminal, the source is the first terminal, and the drain is the second terminal. The control terminal of the N-type field effect transistor is connected to the signal transmission circuit 6 and the first timing controller 32, and the source of the N-type field effect transistor passes through the voltage transmission circuit. 7 is connected to the first voltage limiting module 31, the drain of the field effect transistor is connected to the output end of the data line 8 of the column tube, and then the first control signal is received at the control end, and when the source and drain are turned on, the voltage transmission The circuit 7 pulls down the voltage of the output terminal of the tube data line 8 to increase the gray scale of the LED on the tube data line 8 . At this time, the first control signal is a high-level signal, and the second control signal is a low-level signal.
承接上例，在一些示例中，当场效应晶体管为N型场效应晶体管时，N型场效应晶体管的栅极为控制端、漏极为第一端、源极为第二端，N型场效应晶体管的控制端与信号传输电路6与第二时序控制器35连接，N型场效应晶体管的漏极通过电压传输电路7与第二电压限制模块34连接，场效应晶体管的源极与列管数据线8的输出端连接，进而在控制端接收到第一控制信号，导通源极与漏极时，通过电压传输电路7拉高列管数据线8的输出端的电压，减小列管数据线8上的LED灰度。此时，第一控制信号为高电平信号，第二控制信号为低电平信号。Following the above example, in some examples, when the field effect transistor is an N-type field effect transistor, the gate of the N-type field effect transistor is the control terminal, the drain is the first terminal, and the source is the second terminal, and the control terminal of the N-type field effect transistor The terminal is connected with the signal transmission circuit 6 and the second timing controller 35, the drain of the N-type field effect transistor is connected with the second voltage limiting module 34 through the voltage transmission circuit 7, and the source of the field effect transistor is connected with the column tube data line 8. The output terminal is connected, and then the control terminal receives the first control signal, and when the source and the drain are turned on, the voltage at the output terminal of the tube data line 8 is pulled up through the voltage transmission circuit 7, and the voltage on the tube data line 8 is reduced. LED grayscale. At this time, the first control signal is a high-level signal, and the second control signal is a low-level signal.
应当理解的是，当场效应晶体管为P型场效应晶体管时，P型场效应晶体管的栅极为控制端、漏极为第一端、源极为第一端，P型场效应晶体管的控制端与信号传输电路6与第一时序控制器32连接，P型场效应晶体管的漏极通过电压传输电路7与第一电压限制模块31连接，场效应晶体管的源极与列管数据线8的输出端连接，进而在控制端接收到第一控制信号，导通源极与漏极时，通过电压传输电路7拉低列管数据线8的输出端的电压，增加列管数据线8上的LED灰度。此时，第一控制信号为低电平信号，第二控制信号为高电平信号。It should be understood that when the field effect transistor is a P-type field effect transistor, the gate of the P-type field effect transistor is the control terminal, the drain is the first terminal, and the source is the first terminal, and the control terminal of the P-type field effect transistor is connected to the signal transmission terminal. The circuit 6 is connected to the first timing controller 32, the drain of the P-type field effect transistor is connected to the first voltage limiting module 31 through the voltage transmission circuit 7, and the source of the field effect transistor is connected to the output end of the row tube data line 8, Furthermore, when the control end receives the first control signal and turns on the source and drain, the voltage at the output end of the tube data line 8 is pulled down through the voltage transmission circuit 7 to increase the LED gray scale on the tube data line 8 . At this time, the first control signal is a low-level signal, and the second control signal is a high-level signal.
承接上例，在一些示例中，当场效应晶体管为P型场效应晶体管时，P型场效应晶体管的栅极为控制端、源极为第一端、漏极为第二端，P型场效应晶体管的控制端与信号传输电路6与第一时序控制器32连接，P型场效应晶体管的源极通过电压传输电路7与第一电压限制模块31连接，场效应晶体管的漏极与列管数据线8的输出端连接，进而在控制端接收到第一控制信号，导通源极与漏极时，通过电压传输电路7拉高列管数据线8的输出端的电压，减少列管数据线8上的LED灰度。此时，第一控制信号为低电平信号，第二控制信号为高电平信号。Following the above example, in some examples, when the field effect transistor is a P-type field effect transistor, the gate of the P-type field effect transistor is the control terminal, the source is the first terminal, and the drain is the second terminal, and the control terminal of the P-type field effect transistor is The terminal is connected with the signal transmission circuit 6 and the first timing controller 32, the source of the P-type field effect transistor is connected with the first voltage limiting module 31 through the voltage transmission circuit 7, and the drain of the field effect transistor is connected with the column tube data line 8. The output end is connected, and then the first control signal is received at the control end, and when the source and drain are turned on, the voltage at the output end of the tube data line 8 is pulled up through the voltage transmission circuit 7, and the LED on the tube data line 8 is reduced. grayscale. At this time, the first control signal is a low-level signal, and the second control signal is a high-level signal.
应当理解的是，本实施例并不限定控制开关4为场效应晶体管，控制开关4还可以是其它能够根据控制信号导通或截止并限制电流方向的开关。It should be understood that this embodiment does not limit the control switch 4 to be a field effect transistor, and the control switch 4 may also be other switches that can be turned on or off according to a control signal and limit the direction of the current.
基于相同的构思，本实施例还提供一种显示装置，如图16所示，多个行管数据线、多个列管数据线8，各行管数据线与各列管数据线8之间设置有显示单元9，至少一个列管数据线8的输出端设置有如上的灰度补偿电路1。Based on the same idea, this embodiment also provides a display device. As shown in FIG. There is a display unit 9 , and the output end of at least one columnar data line 8 is provided with the gray scale compensation circuit 1 as above.
其中，其中，显示单元9的种类包括但不限于：微发光二极管(Micro Light Emitting Diode Display，Micro LED)，迷你发光二极管(Mini Light Emitting Diode，MiniLED)等中的至少一个。显示单元9包括红光显示单元、绿光显示单元和蓝光显示单元；或，显示单元9包括红光显示单元、绿光显示单元、蓝光显示单元和黄光显示单元。Among them, the type of display unit 9 includes but not limited to: micro light emitting diode (Micro light emitting diode) At least one of Light Emitting Diode Display, Micro LED), Mini Light Emitting Diode (Mini Light Emitting Diode, Mini LED) and the like. The display unit 9 includes a red light display unit, a green light display unit and a blue light display unit; or, the display unit 9 includes a red light display unit, a green light display unit, a blue light display unit and a yellow light display unit.
本申请另一可选实施例Another optional embodiment of the application
本实施例提供一种灰度补偿方法，请参见图17所示，其包括但不限于：This embodiment provides a grayscale compensation method, as shown in Figure 17, which includes but is not limited to:
S101、通过信号同步单元接收时钟信号的输出端传输的时钟信号，并将时钟信号进行倍频得到倍频信号，并传输到信号发生单元；S101. Receive the clock signal transmitted by the output end of the clock signal through the signal synchronization unit, and perform frequency multiplication on the clock signal to obtain a frequency multiplication signal, and transmit it to the signal generation unit;
S102、通过信号发生单元在倍频信号的周期内输出至少一个控制信号到控制开关的控制端，控制信号被配置为导通或者截止控制开关；S102. Output at least one control signal to the control terminal of the control switch within the period of the multiplied signal through the signal generation unit, and the control signal is configured to turn on or off the control switch;
S103、信号发生单元在控制开关为导通状态时，改变列管数据线上的LED的灰度。S103. The signal generation unit changes the gray scale of the LED on the data line of the array tube when the control switch is turned on.
上述灰度补偿方法，通过在显示单元的发光亮度超出阈值时，发出第一控制信号，以改变驱动显示单元的驱动电压，进而使得显示单元在第一控制信号的时间内不发光，降低了显示单元的亮度，避免了显示单元的亮度过度的问题，在具有多个显示单元时，提升了显示单元整体的显示均一性。In the above gray scale compensation method, when the luminous brightness of the display unit exceeds the threshold, the first control signal is sent to change the driving voltage for driving the display unit, so that the display unit does not emit light within the time of the first control signal, reducing the display The brightness of the unit avoids the problem of excessive brightness of the display unit, and improves the overall display uniformity of the display unit when there are multiple display units.
在一些实施例中，信号发生单元在控制开关为导通状态时，改变列管数据线上的LED的灰度包括：信号发生单元在控制开关导通时，拉低列管数据线的驱动电压，以增加列管数据线上的LED的灰度。In some embodiments, when the control switch is turned on by the signal generation unit, changing the gray scale of the LED on the row pipe data line includes: the signal generation unit pulls down the driving voltage of the row pipe data line when the control switch is turned on , to increase the gray scale of the LED on the data line of the column tube.
本实施例还提供了一种计算机可读存储介质，该计算机可读存储介质包括在用于存储信息(诸如指令、数据结构、计算机程序模块或其他数据)的任何方法或技术中实施的易失性或非易失性、可移除或不可移除的介质。计算机可读存储介质包括但不限于RAM（Random Access Memory，随机存取存储器），ROM（Read-Only Memory，只读存储器），EEPROM（Electrically Erasable Programmable Read Only Memory，带电可擦可编程只读存储器）、闪存或其他存储器技术、CD-ROM（Compact Disc Read-Only Memory，光盘只读存储器），数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。The present embodiment also provides a computer-readable storage medium comprising volatile memory implemented in any method or technology for storing information, such as instructions, data structures, computer program modules, or other data. volatile or nonvolatile, removable or non-removable media. Computer-readable storage media include but are not limited to RAM (Random Access Memory, random access memory), ROM (Read-Only Memory, read-only memory), EEPROM (Electrically Erasable Programmable Read Only Memory, electrically erasable programmable read-only memory ), Flash or other memory technologies, CD-ROM (Compact Disc Read-Only Memory, Digital Versatile Disk (DVD) or other optical disk storage, magnetic cartridge, magnetic tape, magnetic disk storage or other magnetic storage device, or can be used to store desired information and can be accessed by a computer any other medium.
本实施例中的计算机可读存储介质可用于存储一个或者多个计算机程序，其存储的一个或者多个计算机程序可被处理器执行，以实现上述灰度补偿方法的至少一个步骤。The computer-readable storage medium in this embodiment can be used to store one or more computer programs, and the one or more computer programs stored therein can be executed by a processor to implement at least one step of the above gray scale compensation method.
可见，本领域的技术人员应该明白，上文中所公开方法中的全部或某些步骤、***、装置中的功能模块/单元可以被实施为软件（可以用计算装置可执行的计算机程序代码来实现）、固件、硬件及其适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分；例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以由若干物理组件合作执行。某些物理组件或所有物理组件可以被实施为由处理器，如中央处理器、数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。It can be seen that those skilled in the art should understand that all or some of the steps in the methods disclosed above, the functional modules/units in the system and the device can be implemented as software (the computer program code executable by the computing device can be used to realize ), firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be composed of several physical components. Components cooperate to execute. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit .
此外，本领域普通技术人员公知的是，通信介质通常包含指令、数据结构、计算机程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。所以，本申请不限制于任何特定的硬件和软件结合。In addition, communication media typically embody instructions, data structures, computer program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and can include any information delivery media, as is well known to those of ordinary skill in the art. Therefore, the application is not limited to any specific combination of hardware and software.
应当理解的是，本申请的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本申请所附权利要求的保护范围。It should be understood that the application of the present application is not limited to the above examples, and those skilled in the art can make improvements or changes based on the above descriptions, and all these improvements and changes should belong to the protection scope of the appended claims of the present application.

Claims (17)

  1. 一种灰度补偿电路，所述灰度补偿电路包括：A gray scale compensation circuit, the gray scale compensation circuit comprising:
    控制开关；control switch;
    通过信号传输电路与所述控制开关的控制端连接的信号发生单元，所述信号发生单元还通过电压传输电路与所述控制开关的第一端连接；a signal generating unit connected to the control end of the control switch through a signal transmission circuit, and the signal generating unit is also connected to the first end of the control switch through a voltage transmission circuit;
    以及一端与时钟信号的输出端连接，另一端与所述信号发生单元的输入端连接的信号同步单元；And a signal synchronization unit connected to the output end of the clock signal at one end and connected to the input end of the signal generating unit at the other end;
    所述控制开关的第二端与列管数据线的输出端连接；所述信号同步单元被配置为接收所述时钟信号的输出端传输的时钟信号，并将所述时钟信号进行倍频得到倍频信号，并传输到所述信号发生单元；所述信号发生单元被配置为在所述倍频信号的周期内输出至少一个控制信号，所述控制信号被配置为导通或者截止所述控制开关；所述信号发生单元在所述控制开关为导通状态时，通过所述电压传输电路改变所述列管数据线上的LED的灰度。The second end of the control switch is connected to the output end of the tube data line; the signal synchronization unit is configured to receive the clock signal transmitted by the output end of the clock signal, and perform frequency multiplication on the clock signal to obtain a multiplied The frequency signal is transmitted to the signal generation unit; the signal generation unit is configured to output at least one control signal within the period of the frequency multiplied signal, and the control signal is configured to turn on or off the control switch ; the signal generation unit changes the gray scale of the LED on the row tube data line through the voltage transmission circuit when the control switch is in a conducting state.
  2. 如权利要求1所述的灰度补偿电路，其中，所述信号同步单元包括：The gray scale compensation circuit according to claim 1, wherein the signal synchronization unit comprises:
    倍频器，所述倍频器被配置为将所述时钟信号进行倍频，得到所述倍频信号，所述倍频信号的频率为所述时钟信号的N倍，所述N为不小于2的整数。a frequency multiplier, the frequency multiplier is configured to multiply the frequency of the clock signal to obtain the frequency multiplied signal, the frequency of the frequency multiplied signal is N times that of the clock signal, and the N is not less than Integer of 2.
  3. 如权利要求2所述的灰度补偿电路，其中，所述倍频器包括分频器以及锁相环，所述分频器被配置为将所述时钟信号进行分频，得到分频信号，所述分频信号的频率为所述时钟信号的N分之一，所述N为不小于2的整数，所述锁相环被配置为根据所述分频信号产生所述倍频信号。The gray scale compensation circuit according to claim 2, wherein the frequency multiplier includes a frequency divider and a phase-locked loop, and the frequency divider is configured to divide the frequency of the clock signal to obtain a frequency-divided signal, The frequency of the frequency-divided signal is N/N of the clock signal, where N is an integer not less than 2, and the phase-locked loop is configured to generate the frequency-multiplied signal according to the frequency-divided signal.
  4. 如权利要求2所述的灰度补偿电路，其中，所述信号发生单元包括：The gray scale compensation circuit according to claim 2, wherein the signal generating unit comprises:
    第一电压限制模块，所述第一电压限制模块通过所述电压传输电路与所述控制开关的第一端连接，被配置为在所述控制开关导通时拉低所述列管数据线的驱动电压，以增加所述列管数据线上的LED的灰度；A first voltage limiting module, the first voltage limiting module is connected to the first end of the control switch through the voltage transmission circuit, and is configured to pull down the row tube data line when the control switch is turned on Driving voltage, to increase the gray scale of the LED on the column tube data line;
    第一时序控制器，所述第一时序控制器被配置为在需要增加灰度时，在所述倍频信号的周期内输出至少一个第一控制信号，并通过所述信号传输电路传输到所述控制开关的控制端，所述第一控制信号被配置为导通所述控制开关；A first timing controller, the first timing controller is configured to output at least one first control signal within the period of the frequency multiplied signal when the gray level needs to be increased, and transmit it to the a control terminal of the control switch, the first control signal is configured to turn on the control switch;
    所述第一时序控制器还被配置为在不需要增加灰度时，在所述倍频信号的周期内输出至少一个第二控制信号，并通过所述信号传输电路传输到所述控制开关的控制端，所述第二控制信号被配置为截止所述控制开。The first timing controller is further configured to output at least one second control signal within the period of the frequency multiplied signal when there is no need to increase the gray level, and transmit it to the control switch through the signal transmission circuit. The control terminal, the second control signal is configured to cut off the control on.
  5. 如权利要求4所述的灰度补偿电路，其中，所述信号发生单元还包括：电压速度控制器；The gray scale compensation circuit according to claim 4, wherein the signal generation unit further comprises: a voltage speed controller;
    所述电压速度控制器设置在所述第一电压限制模块与所述电压传输电路之间，被配置为在所述控制开关导通时，控制拉低所述列管数据线的驱动电压的速度。The voltage speed controller is arranged between the first voltage limiting module and the voltage transmission circuit, and is configured to control the speed of pulling down the driving voltage of the column management data line when the control switch is turned on. .
  6. 如权利要求5所述的灰度补偿电路，其中，所述电压速度控制器包括电阻。The gray scale compensation circuit as claimed in claim 5, wherein said voltage speed controller comprises a resistor.
  7. 如权利要求2所述的灰度补偿电路，其中，所述信号发生单元包括：The gray scale compensation circuit according to claim 2, wherein the signal generating unit comprises:
    第二电压限制模块，所述第二电压限制模块通过所述电压传输电路与所述控制开关的第一端连接，被配置为在所述控制开关导通时拉高所述列管数据线的驱动电压，以减少所述列管数据线上的LED的灰度；The second voltage limiting module, the second voltage limiting module is connected to the first end of the control switch through the voltage transmission circuit, and is configured to pull up the row tube data line when the control switch is turned on. Driving voltage, to reduce the gray scale of the LED on the column tube data line;
    第二时序控制器，所述第二时序控制器被配置为在需要减少灰度时，在所述倍频信号的周期内输出至少一个第一控制信号，并通过所述信号传输电路传输到所述控制开关的控制端，所述第一控制信号被配置为导通所述控制开关；A second timing controller, the second timing controller is configured to output at least one first control signal within the cycle of the frequency multiplied signal when the gray level needs to be reduced, and transmit it to the a control terminal of the control switch, the first control signal is configured to turn on the control switch;
    所述第二时序控制器还被配置为在不需要减少灰度时，在所述倍频信号的周期内输出至少一个第二控制信号，并通过所述信号传输电路传输到所述控制开关的控制端，所述第二控制信号被配置为截止所述控制开关。The second timing controller is further configured to output at least one second control signal within the period of the frequency multiplied signal when there is no need to reduce the gray level, and transmit it to the control switch through the signal transmission circuit. A control terminal, the second control signal is configured to turn off the control switch.
  8. 如权利要求1所述的灰度补偿电路，其中，所述控制开关包括：The gray scale compensation circuit according to claim 1, wherein the control switch comprises:
    场效应晶体管，所述场效应晶体管的控制端通过所述信号传输电路与所述信号发生单元连接，所述场效应晶体管的第一端通过所述电压传输电路与所述信号发生单元连接，所述场效应晶体管的第二端与所述列管数据线的输出端连接；A field effect transistor, the control terminal of the field effect transistor is connected to the signal generation unit through the signal transmission circuit, and the first end of the field effect transistor is connected to the signal generation unit through the voltage transmission circuit, so The second end of the field effect transistor is connected to the output end of the row tube data line;
    其中，所述场效应晶体管被配置为根据所述控制信号导通或者截止，以使得所述信号发生单元在所述场效应晶体管为导通状态时，通过所述电压传输电路改变所述列管数据线上的LED的灰度。Wherein, the field effect transistor is configured to be turned on or off according to the control signal, so that when the field effect transistor is in the on state, the signal generating unit can change the The gray scale of the LED on the data line.
  9. 一种显示装置，包括多个行管数据线以及多个列管数据线，各所述行管数据线与各所述列管数据线之间设置有显示单元，至少一个所述列管数据线的输出端设置有如权利要求1所述的灰度补偿电路。A display device, comprising a plurality of row pipe data lines and a plurality of column pipe data lines, a display unit is arranged between each of the row pipe data lines and each of the column pipe data lines, and at least one of the column pipe data lines The output terminal is provided with the gray scale compensation circuit as claimed in claim 1.
  10. 如权利要求9所述的显示装置，其中，所述列管数据线和所述信号同步单元接收同一个所述时钟信号。The display device according to claim 9, wherein the column pipe data line and the signal synchronization unit receive the same clock signal.
  11. 如权利要求9所述的显示装置，其中，所述显示单元包括红光显示单元、绿光显示单元和蓝光显示单元。The display device according to claim 9, wherein the display unit comprises a red light display unit, a green light display unit and a blue light display unit.
  12. 如权利要求9所述的显示装置，其中，所述显示单元包括红光显示单元、绿光显示单元、蓝光显示单元和黄光显示单元。The display device according to claim 9, wherein the display unit comprises a red light display unit, a green light display unit, a blue light display unit and a yellow light display unit.
  13. 一种灰度补偿方法，应用于如权利要求1所述的灰度补偿电路，所述灰度补偿方法包括：A gray scale compensation method applied to the gray scale compensation circuit according to claim 1, the gray scale compensation method comprising:
    通过信号同步单元接收时钟信号的输出端传输的时钟信号，并将所述时钟信号进行倍频得到倍频信号，并传输到信号发生单元；Receive the clock signal transmitted by the output end of the clock signal through the signal synchronization unit, and perform frequency multiplication on the clock signal to obtain a frequency multiplication signal, and transmit it to the signal generation unit;
    通过所述信号发生单元在所述倍频信号的周期内输出至少一个控制信号到控制开关的控制端，所述控制信号被配置为导通或者截止所述控制开关；Outputting at least one control signal to the control terminal of the control switch within the period of the frequency multiplied signal by the signal generating unit, the control signal is configured to turn on or off the control switch;
    以及所述信号发生单元在所述控制开关为导通状态时，改变列管数据线上的LED的灰度。And the signal generating unit changes the gray scale of the LED on the column pipe data line when the control switch is in the conduction state.
  14. 如权利要求13所述的灰度补偿方法，其中，所述信号发生单元在所述控制开关为导通状态时，改变所述列管数据线上的LED的灰度包括：The grayscale compensation method according to claim 13, wherein, when the control switch is turned on by the signal generating unit, changing the grayscale of the LED on the column pipe data line includes:
    所述信号发生单元在所述控制开关导通时，拉低所述列管数据线的驱动电压，以增加所述列管数据线上的LED的灰度。When the control switch is turned on, the signal generating unit pulls down the driving voltage of the column pipe data line, so as to increase the grayscale of the LED on the column pipe data line.
  15. 如权利要求13所述的灰度补偿方法，其中，所述信号发生单元在所述控制开关为导通状态时，改变所述列管数据线上的LED的灰度包括：The grayscale compensation method according to claim 13, wherein, when the control switch is turned on by the signal generating unit, changing the grayscale of the LED on the column pipe data line includes:
    所述信号发生单元在所述控制开关导通时，拉高所述列管数据线的驱动电压，以减少所述列管数据线上的LED的灰度。When the control switch is turned on, the signal generating unit pulls up the driving voltage of the column pipe data line, so as to reduce the gray scale of the LED on the column pipe data line.
  16. 如权利要求13所述的灰度补偿方法，其中，所述控制信号的脉宽小于所述时钟信号的一个周期的宽度。The gray scale compensation method according to claim 13, wherein the pulse width of the control signal is smaller than the width of one period of the clock signal.
  17. 如权利要求16所述的灰度补偿方法，其中，所述控制信号的脉宽为所述倍频信号的一个周期的宽度。The gray scale compensation method according to claim 16, wherein the pulse width of the control signal is the width of one cycle of the frequency multiplied signal.
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