CN103390387B - A kind of frequency multiplication display control method and system - Google Patents
A kind of frequency multiplication display control method and system Download PDFInfo
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- CN103390387B CN103390387B CN201310311857.0A CN201310311857A CN103390387B CN 103390387 B CN103390387 B CN 103390387B CN 201310311857 A CN201310311857 A CN 201310311857A CN 103390387 B CN103390387 B CN 103390387B
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Abstract
The invention belongs to display control technology field, provide a kind of frequency multiplication display control method and system.The method and system utilize frequency doubling technology, by the figure place of high-positioned counter and low counter in adjustment gray scale counter, make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple, and then refresh rate can be made to increase corresponding frequency multiplication multiple, and frequency multiplication multiple is larger, the multiple that refresh rate increases is more, thus improving the refresh rate of dynamic scan screen further, dynamic scan can be made to shield the occasion adapting to the higher refresh rate of requirement, and application is expanded.
Description
Technical field
The invention belongs to display control technology field, particularly relate to and be a kind ofly mainly used in LED display and control aspect, based on the display control method of frequency doubling technology and system.
Background technology
In LED display and control field, adopt pulse-length modulation (Pulse Width Modulation, PWM) mode, realize the adjustment to each LED luminosity.Specifically, be within the fixing display cycle, by regulate LED bright/the time ratio that goes out, reach the object that LED luminance regulates.
For LED dynamic scan screen, it utilizes the vision of human eye to stop, and is only showing a certain scan line sometime, is showing next scan line afterwards, so analogize, Circulating fibrocytes at future time.In order to promote display refresh rates, in prior art, be generally the disposable transmission of whole frame gradation data of dynamic scan being shielded by master control set and be stored in driving chip, afterwards, driving chip, in conjunction with gradation data and outside grayscale clock, generates the pulse width modulating signal in order to driving LED luminescence.As shown in Figure 1, wherein, the gray scale counter in driving chip is used for counting grayscale clock GCLK, and export i position count value Q0 ~ Qi, afterwards, the Pulse width modulation module in driving chip according to gradation data D0 ~ Di and count value Q0 ~ Qi, production burst bandwidth modulation signals.According to this pulse width modulating signal, a fixing display cycle is divided into N number of equal displaying time, in each displaying time, shows each scan line in turn, and the displaying time non-overlapping copies of each scan line.That is to say, each scan line is divided into N display, if m dynamic scan shields, then each displaying time display m scan line, the mode of display is: after first scan line completes first time display, carry out the first time display of second scan line again, until the first time display of m scan line is complete; Then the second time display of each scan line is carried out, so repeatedly, until complete the N time display of all scan lines, as shown in Figure 2.In addition, when the display of front frame, driving chip must receive the gradation data of next frame, thisly gradation data is stored into driving chip and the method for gated sweep is simple automatically, improves the refresh rate of LED display, effectively can eliminate fringe phenomena during shooting.
But the product along with application LED display is more and more abundanter and the requirement of people to LED display is more and more higher, needs LED display to have higher refresh rate, meets the requirements such as such as high-speed capture.And the above-mentioned LED display and control mode that prior art provides still exists room for promotion in refresh rate, cannot adapt to the application scenario requiring higher refresh rate, application is restricted.
Summary of the invention
The object of the embodiment of the present invention is to provide a kind of frequency multiplication display control method, although be intended to solve the LED display and control mode that provides of prior art by driving chip that whole frame gradation data is prestored to improve refresh rate, but still there is room for promotion and cannot adapt to require the application scenario of higher refresh rate in its refresh rate, the problem that application is restricted.
The embodiment of the present invention is achieved in that a kind of frequency multiplication display control method, said method comprising the steps of:
Receive enable signal, search the frequency multiplication multiple corresponding with described enable signal;
According to described frequency multiplication multiple, and in the gray scale counter prestored, high-positioned counter and low counter divide other raw bits number, obtain the current figure place of described high-positioned counter and the current figure place of described low counter;
According to the current figure place of described high-positioned counter and the current figure place of described low counter, control described gray scale counter and grayscale clock is counted and exports count value;
Receive gradation data, and according to the count value that described gradation data and described gray scale counter export, export the pulse width modulating signal in order to drive display unit luminescence, to make within the fixing display cycle, the display number of times of each scan line increases corresponding described frequency multiplication multiple.
Another object of the embodiment of the present invention is to provide a kind of frequency multiplication display control program, and described system comprises:
Gray scale counter;
Searching module, for receiving enable signal, searching the frequency multiplication multiple corresponding with described enable signal;
Computing module, for according to described frequency multiplication multiple, and in the gray scale counter prestored, high-positioned counter and low counter divide other raw bits number, obtain the current figure place of described high-positioned counter and the current figure place of described low counter;
Control module, for according to the current figure place of described high-positioned counter and the current figure place of described low counter, controls described gray scale counter and counts grayscale clock and export count value;
Pulse width modulation module, for receiving gradation data, and according to the count value that described gradation data and described gray scale counter export, export the pulse width modulating signal in order to drive display unit luminescence, to make within the fixing display cycle, the display number of times of each scan line increases corresponding described frequency multiplication multiple.
The frequency multiplication display control method that the present invention proposes and system utilize frequency doubling technology, by the figure place of high-positioned counter and low counter in adjustment gray scale counter, make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple, and then refresh rate can be made to increase corresponding frequency multiplication multiple, and frequency multiplication multiple is larger, the multiple that refresh rate increases is more, thus improve the refresh rate of dynamic scan screen further, dynamic scan can be made to shield the occasion adapting to the higher refresh rate of requirement, and application is expanded.
Accompanying drawing explanation
Fig. 1 is the display and control schematic diagram of the LED dynamic scan screen that prior art provides;
Fig. 2 is the display timing generator figure of each scan line within the fixing display cycle in prior art;
Fig. 3 is the process flow diagram of the frequency multiplication display control method that the embodiment of the present invention one provides;
Fig. 4 is the display timing generator figure fixing each scan line in the display cycle in the embodiment of the present invention one;
Fig. 5 is the structural drawing of the frequency multiplication display control program that the embodiment of the present invention two provides.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
For prior art Problems existing, the present invention proposes a kind of frequency multiplication display control method, the method utilizes frequency doubling technology, by the figure place of high-positioned counter and low counter in adjustment gray scale counter, make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple.Implementation of the present invention is described in detail below with reference to embodiment:
embodiment one
The embodiment of the present invention one proposes a kind of frequency multiplication display control method, as shown in Figure 3, comprising:
Step S1: receive enable signal, search the frequency multiplication multiple corresponding with enable signal.
In the embodiment of the present invention one, preset the contingency table characterizing corresponding relation between enable signal and frequency multiplication multiple, and according to the difference of selectable frequency multiplication multiple number, the figure place of enable signal also can be different, by searching this contingency table, the frequency multiplication multiple corresponding with enable signal can be obtained.Such as, when enable signal is 2, if enable signal is 00, then frequency multiplication multiple can be 1, if enable signal is 01, then frequency multiplication multiple can be 2, if enable signal is 10, then frequency multiplication multiple can be 4, if enable signal is 11, then frequency multiplication multiple can be 8.
Step S2: according to frequency multiplication multiple, and in the gray scale counter prestored, high-positioned counter and low counter divide other raw bits number, obtain the current figure place of high-positioned counter and the current figure place of low counter.
In the embodiment of the present invention one, the figure place of gray scale counter equals the figure place of high-positioned counter and the figure place sum of low counter, and when low counter count down to everybody and is " 0 ", high-positioned counter counting once.
In the embodiment of the present invention one, original figure place to refer to when not needing to carry out process of frequency multiplication the figure place of high-positioned counter and the figure place of low counter in gray scale counter.Suppose that the original figure place of high-positioned counter is b, the original figure place of low counter is a, and frequency multiplication multiple is n, and has n=2
n'wherein, n and n' is positive integer, and the current figure place of high-positioned counter is b', and the current figure place of low counter is a', then step S2 is specially, according to frequency multiplication multiple n, and the original figure place b of high-positioned counter and the original figure place a of low counter, utilize expression formula: a'=a+n', b'=b-n', the current figure place obtaining high-positioned counter is the current figure place of b' and low counter is a'.
Such as, if frequency multiplication multiple n is 1, then n' is 0, a'=a, b'=b; If frequency multiplication multiple n is 2, then n' is 1, a'=a+1, b'=b-1; If frequency multiplication multiple n is 4, then n' is 2, a'=a+2, b'=b-2; If frequency multiplication multiple n is 8, then n' is 3, a'=a+3, b'=b-3.
Step S3: according to the current figure place of high-positioned counter and the current figure place of low counter, controls gray scale counter and counts grayscale clock and export count value.
Step S4: receive gradation data, and according to the count value that gradation data and gray scale counter export, export the pulse width modulating signal driving display unit luminescence, to make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple, as shown in Figure 4.
In the embodiment of the present invention one, display unit is preferably LED luminescence unit.
In the embodiment of the present invention one, suppose that the figure place of the count value that gray scale counter exports is I, grayscale clock is T, and the fixing display cycle is t, and the line number of scan line is m, then have t=2
i× T × m.Suppose after step S4, the display number of times of each scan line is N', then have N'=2
a', and then obtain t/N'=2
b'× T × m, and the dutycycle of the effective displaying time of each scan line in each procedure for displaying representated by gradation data determines.
The frequency multiplication display control method that the embodiment of the present invention one proposes utilizes frequency doubling technology, and by the figure place of high-positioned counter and low counter in adjustment gray scale counter, make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple.Shown in composition graphs 2, for a m Mobile state scan screen, if do not adopt the frequency doubling technology that the embodiment of the present invention one provides, then in the prior art, in a fixing display cycle t, the display number of times of each scan line is N, whole scan line display time is once t/N grayscale clock cycle, concrete procedure for displaying is: the first scan line shows first time within t/N grayscale clock cycle, after display terminates, second scan line shows first time within t/N grayscale clock cycle, by that analogy, until m scan line shows first time within t/N grayscale clock cycle, after whole scan line all completes first time display, according to the method described above, enter second time display, until all m scan line all completes N display.The time once required due to whole scan line display is t/N grayscale clock cycle, then the refresh rate of this m dynamic scan screen is N/t.And according to the frequency doubling technology that the embodiment of the present invention one provides, as shown in Figure 4, for a m dynamic scan screen, in a fixing display cycle t, the display number of times of each scan line is N', whole scan line display time is once t/N' grayscale clock cycle, procedure for displaying is same as the prior art, then the refresh rate of this m dynamic scan screen is N'/t, due to N'=n × N, refresh rate then can be made to increase corresponding frequency multiplication multiple, and frequency multiplication multiple n is larger, the multiple that refresh rate increases is more, thus improve the refresh rate of dynamic scan screen further, dynamic scan can be made to shield the occasion adapting to the higher refresh rate of requirement, application is expanded.
embodiment two
The embodiment of the present invention two proposes a kind of frequency multiplication display control program, as shown in Figure 5, for convenience of explanation, illustrate only the part relevant to the embodiment of the present invention two.
Specifically, the frequency multiplication display control program that the embodiment of the present invention two proposes comprises: gray scale counter 11; Searching module 12, for receiving enable signal, searching the frequency multiplication multiple corresponding with enable signal; Computing module 13, for according to frequency multiplication multiple, and in the gray scale counter prestored, high-positioned counter and low counter divide other raw bits number, obtain the current figure place of high-positioned counter and the current figure place of low counter; Control module 14, for according to the current figure place of high-positioned counter and the current figure place of low counter, controls gray scale counter and counts grayscale clock and export count value; Pulse width modulation module 15, for receiving gradation data, and according to the count value that gradation data and gray scale counter export, export the pulse width modulating signal in order to drive display unit luminescence, to make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple.Wherein, the detailed implementation of each module, as described in embodiment one, is not repeated herein.
The frequency multiplication display control method that the present invention proposes and system utilize frequency doubling technology, by the figure place of high-positioned counter and low counter in adjustment gray scale counter, make within the fixing display cycle, the display number of times of each scan line increases corresponding frequency multiplication multiple, and then refresh rate can be made to increase corresponding frequency multiplication multiple, and frequency multiplication multiple is larger, the multiple that refresh rate increases is more, thus improve the refresh rate of dynamic scan screen further, dynamic scan can be made to shield the occasion adapting to the higher refresh rate of requirement, and application is expanded.
One of ordinary skill in the art will appreciate that all or part of step realized in above-described embodiment method is that the hardware that can control to be correlated with by program completes, described program can be stored in a computer read/write memory medium, described storage medium, as ROM/RAM, disk, CD etc.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. a frequency multiplication display control method, is characterized in that, said method comprising the steps of:
Receive enable signal, search the frequency multiplication multiple corresponding with described enable signal;
According to described frequency multiplication multiple, and in the gray scale counter prestored, high-positioned counter and low counter divide other raw bits number, obtain the current figure place of described high-positioned counter and the current figure place of described low counter;
According to the current figure place of described high-positioned counter and the current figure place of described low counter, control described gray scale counter and grayscale clock is counted and exports count value;
Receive gradation data, and according to the count value that described gradation data and described gray scale counter export, export the pulse width modulating signal in order to drive display unit luminescence, to make within the fixing display cycle, the display number of times of each scan line increases corresponding described frequency multiplication multiple;
If the original figure place of described high-positioned counter is b, the original figure place of described low counter is a, and described frequency multiplication multiple is n, and has n=2
n'described n and described n' is positive integer, the current figure place of described high-positioned counter is b', the current figure place of described low counter is a', then described according to described frequency multiplication multiple, and high-positioned counter and low counter divide other raw bits number in the gray scale counter prestored, the step obtaining the current figure place of described high-positioned counter and the current figure place of described low counter is specially:
According to described frequency multiplication multiple n, and the original figure place b of described high-positioned counter and the original figure place a of described low counter, utilize expression formula: a'=a+n', b'=b-n', the current figure place obtaining described high-positioned counter is the current figure place of b' and described low counter is a'.
2. frequency multiplication display control method as claimed in claim 1, it is characterized in that, when described enable signal is 00, described frequency multiplication multiple is 1; When described enable signal is 01, described frequency multiplication multiple is 2; When described enable signal is 10, described frequency multiplication multiple is 4; When described enable signal is 11, described frequency multiplication multiple is 8.
3. frequency multiplication display control method as claimed in claim 1, it is characterized in that, if the figure place of the count value that described gray scale counter exports is I, described grayscale clock is T, the described fixing display cycle is t, and the line number of scan line is m, and the current figure place of described high-positioned counter is b', the display number of times of each scan line described is N', then have t=2
i× T × m, and have t/N'=2
b'× T × m.
4. the frequency multiplication display control method as described in any one of claims 1 to 3, is characterized in that, described display unit is LED luminescence unit.
5. a frequency multiplication display control program, is characterized in that, described system comprises:
Gray scale counter;
Searching module, for receiving enable signal, searching the frequency multiplication multiple corresponding with described enable signal;
Computing module, for according to described frequency multiplication multiple, and in the gray scale counter prestored, high-positioned counter and low counter divide other raw bits number, obtain the current figure place of described high-positioned counter and the current figure place of described low counter;
Control module, for according to the current figure place of described high-positioned counter and the current figure place of described low counter, controls described gray scale counter and counts grayscale clock and export count value;
Pulse width modulation module, for receiving gradation data, and according to the count value that described gradation data and described gray scale counter export, export the pulse width modulating signal in order to drive display unit luminescence, to make within the fixing display cycle, the display number of times of each scan line increases corresponding described frequency multiplication multiple;
If the original figure place of described high-positioned counter is b, the original figure place of described low counter is a, and described frequency multiplication multiple is n, and has n=2
n'described n and described n' is positive integer, the current figure place of described high-positioned counter is b', the current figure place of described low counter is a', then described computing module is according to described frequency multiplication multiple n, and the original figure place b of described high-positioned counter and the original figure place a of described low counter, utilizes expression formula: a'=a+n', b'=b-n', the current figure place obtaining described high-positioned counter is the current figure place of b' and described low counter is a'.
6. frequency multiplication display control program as claimed in claim 5, it is characterized in that, when described enable signal is 00, described frequency multiplication multiple is 1; When described enable signal is 01, described frequency multiplication multiple is 2; When described enable signal is 10, described frequency multiplication multiple is 4; When described enable signal is 11, described frequency multiplication multiple is 8.
7. frequency multiplication display control program as claimed in claim 5, it is characterized in that, if the figure place of the count value that described gray scale counter exports is I, described grayscale clock is T, the described fixing display cycle is t, and the line number of scan line is m, and the current figure place of described high-positioned counter is b', the display number of times of each scan line described is N', then have t=2
i× T × m, and have t/N'=2
b'× T × m.
8. the frequency multiplication display control program as described in any one of claim 5 to 7, is characterized in that, described display unit is LED luminescence unit.
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| CN112785965B (en) * | 2019-11-11 | 2022-03-25 | 杭州海康威视数字技术股份有限公司 | Data display method, device and system |
| CN111161670B (en) * | 2020-03-02 | 2022-03-29 | 南京浣轩半导体有限公司 | Multi-line scanning and line changing display method and chip |
| CN114078419B (en) * | 2020-08-11 | 2023-01-10 | 西安钛铂锶电子科技有限公司 | Display control method and display control device |
| CN114038398B (en) * | 2021-08-18 | 2022-09-13 | 重庆康佳光电技术研究院有限公司 | Gray scale compensation circuit, display device and gray scale compensation method |
| CN114613314B (en) * | 2022-05-10 | 2022-08-26 | 深圳市时代华影科技股份有限公司 | Picture display control method, device, equipment and medium |
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