WO2022102181A1 - Procédé de fabrication de dispositif à semi-conducteur, et adhésif utilisé dans ledit procédé - Google Patents

Procédé de fabrication de dispositif à semi-conducteur, et adhésif utilisé dans ledit procédé Download PDF

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Publication number
WO2022102181A1
WO2022102181A1 PCT/JP2021/029407 JP2021029407W WO2022102181A1 WO 2022102181 A1 WO2022102181 A1 WO 2022102181A1 JP 2021029407 W JP2021029407 W JP 2021029407W WO 2022102181 A1 WO2022102181 A1 WO 2022102181A1
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WIPO (PCT)
Prior art keywords
adhesive
semiconductor device
temporary crimping
manufacturing
pressurized
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PCT/JP2021/029407
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English (en)
Japanese (ja)
Inventor
恵子 上野
理子 平
慎 佐藤
Original Assignee
昭和電工マテリアルズ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 昭和電工マテリアルズ株式会社 filed Critical 昭和電工マテリアルズ株式会社
Priority to CN202180005952.0A priority Critical patent/CN116490583A/zh
Priority to KR1020227006209A priority patent/KR20230107467A/ko
Publication of WO2022102181A1 publication Critical patent/WO2022102181A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02—Non-macromolecular additives
    • C09J11/06—Non-macromolecular additives organic
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/08—Macromolecular additives
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00—Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors

Definitions

  • the present disclosure relates to a method for manufacturing a semiconductor device and an adhesive used for the method.
  • FC connection method A flip-chip connection method (FC connection method) that directly connects a circuit board or another semiconductor chip is widely adopted.
  • the FC connection method is, for example, a COB (Chip On Board) type connection method for connecting a semiconductor chip and a wiring circuit board, and a CoC in which a bump or wiring is provided as a connection portion on the semiconductor chip and the semiconductor chips are connected to each other.
  • FC connection method Chip On Chip type connection method, COW (Chip On Wafer) that manufactures a semiconductor package by connecting a semiconductor chip on a wafer and then individualizing it, and WOW that manufactures a semiconductor package by crimping the wafers together. (Wafer On Wafer) or POP (Package On Package) for crimping semiconductor packages to each other.
  • the FC connection method is also used in the manufacture of a chip stack type package in which a semiconductor chip is arranged three-dimensionally instead of in a plane, and a semiconductor device having a TSV (Through-Silicon Via) structure.
  • Patent Document 1 As a method for manufacturing a semiconductor device using such an FC connection method, for example, a manufacturing method disclosed in Patent Document 1 below is known.
  • a step of temporarily crimping semiconductor chips having a connecting portion to each other via a thermosetting adhesive at a temperature lower than the melting point of the connecting portion, and a pair of obtained temporary crimping bodies are arranged facing each other.
  • the process of manufacturing a crimped body by heating while pressurizing at a temperature equal to or higher than the melting point of at least one of the connecting portions of the two semiconductor chips by sandwiching it between the pressing members of the above, and heating the crimped body in a pressurized atmosphere.
  • a method of manufacturing a semiconductor device through the steps of the process is disclosed.
  • the method for manufacturing a semiconductor device described in Patent Document 1 has the following problems. That is, in the method for manufacturing a semiconductor device described in Patent Document 1, although connection reliability is ensured, there is room for improvement in suppressing the generation of voids generated in the temporary crimping process.
  • an object of the present disclosure is to provide a method for manufacturing a semiconductor device capable of manufacturing a semiconductor device in which the generation of voids is suppressed while ensuring good connection reliability, and an adhesive used therefor.
  • a first member having a first connecting portion and a second member having a second connecting portion are connected via an adhesive layer, and the first member is described.
  • the temperature is lower than the melting point of the first connecting portion and the melting point of the second connecting portion, and in the temporary crimping body pressurizing step, the pressure of the temporary crimping body is applied to the melting point of the first connecting portion and the said.
  • the pressure is lower than the melting point of the second connecting portion, and in the main crimping step, the pressurized crimping body is heated at a temperature equal to or higher than the melting point of at least one of the first connecting portion and the second connecting portion.
  • the heating of the pressurized temporary crimping body is performed on the first connection portion and the second connection portion. Since it is performed at a temperature equal to or higher than the melting point of at least one of them, the connection between the first connection portion and the second connection portion is performed.
  • the temporary crimping body pressurizing step performed before the main crimping step the temporary crimping body is pressurized at a temperature lower than the melting point of the first connection portion and the melting point of the second connection portion.
  • the adhesive has not been sufficiently cured and the viscosity of the adhesive is low. Therefore, when the first member and the second member are crimped in this crimping step, the repulsive force from the adhesive to the first member or the second member becomes small, and the first member and the second member Since it becomes easy to pressurize the member, the connection between the first connection portion and the second connection portion can be easily performed. As a result, it is possible to ensure good connection reliability.
  • a gap is likely to be formed between the adhesive and the first member and at least one between the adhesive and the second member, and this gap is likely to be formed. If remains as it is, it will remain as a void in the semiconductor device.
  • the voids can be eliminated by pressurizing and compressing.
  • this pressurization is performed after the main crimping step, the adhesive is heated to a temperature equal to or higher than the melting point of at least one of the first connection portion and the second connection portion in the main crimping step. Curing has progressed and the viscosity of the adhesive has already increased.
  • the connection between the first connecting portion and the second connecting portion is completed, and the position of the second member with respect to the first member is fixed. Therefore, even if the adhesive is pressed, it is difficult to apply sufficient pressure to the adhesive. Therefore, after the main crimping step, the voids cannot be sufficiently compressed and are likely to be left as voids in the adhesive layer of the semiconductor device.
  • the temperature at which the pressure of the void is lower than the melting point of the first connecting portion and the melting point of the second connecting portion in the temporary crimping body pressurizing step before the main crimping step.
  • the adhesive is not cured as compared with the case where it is carried out at a temperature equal to or higher than the melting point of at least one of the first connection portion and the second connection portion, and the viscosity of the adhesive is low. It becomes easy to compress the voids, and the voids are less likely to be left as voids in the adhesive layer of the semiconductor device.
  • the manufacturing method of the present disclosure it is possible to manufacture a semiconductor device in which the generation of voids is suppressed. From the above, according to the method for manufacturing a semiconductor device of the present disclosure, it is possible to manufacture a semiconductor device in which the generation of voids is suppressed while ensuring good connection reliability.
  • the temporary crimping step it is preferable to pressurize the temporary crimping body at a temperature lower than the reaction start temperature of the adhesive.
  • the reaction of the adhesive is less likely to start, and the adhesive has not been cured at the start of the temporary crimping body pressurizing step. Therefore, voids generated in the temporary crimping step can be easily eliminated. can.
  • the temporary crimping body pressurizing step it is preferable to pressurize the temporary crimping body at a pressure of 0.05 to 0.8 MPa in the temporary crimping body pressurizing step.
  • the generation of voids can be suppressed in the adhesive layer of the semiconductor device, and the connection reliability of the semiconductor device can be further improved.
  • the temporary crimping body pressurizing step it is preferable to pressurize the temporary crimping body at a temperature equal to or higher than the reaction start temperature of the adhesive.
  • the voids can be compressed more effectively while the adhesive is flowing.
  • thermosetting adhesive used for adhering the first member and the second member in the method for manufacturing a semiconductor device.
  • the adhesive contains an epoxy resin, a curing agent and a flux agent, exhibits a minimum melt viscosity of 1500 Pa ⁇ s or less, and exhibits a gel time of 35 seconds or more and 80 seconds or less at 150 ° C.
  • the adhesive is less likely to get caught between the first connection portion and the second connection portion as compared with the case where the minimum melt viscosity of the adhesive exceeds 1500 Pa ⁇ s, and the first connection portion and the second connection portion are difficult to bite. Since the connection failure with the semiconductor device is less likely to occur, the connection reliability of the semiconductor device is further improved. Further, as compared with the case where the gel time is longer than 80 seconds, the adhesive is more likely to be cured in the temporary crimping body pressurizing step and the main crimping step, and voids are less likely to remain in the adhesive layer of the semiconductor device, so that voids are generated. It is possible to manufacture a more suppressed semiconductor device.
  • the reaction of the adhesive is less likely to proceed during the temporary crimping step, and the adhesive is less likely to be cured before the voids are removed in the temporary crimping body pressurizing step. Since it becomes easy to remove voids, it is possible to manufacture a semiconductor device in which the generation of voids is further suppressed.
  • the weight average molecular weight of the epoxy resin contained in the adhesive is preferably less than 10,000.
  • the adhesive further contains a polymer component and the weight average molecular weight of the polymer component is 10,000 or more.
  • the adhesive is more excellent in heat resistance and film forming property than in the case where the weight average molecular weight of the polymer component is less than 10,000. Therefore, if an adhesive is used, a semiconductor device having higher heat resistance can be manufactured. Further, the shape of the adhesive is easily maintained in the temporary crimping step, the temporary crimping body pressurizing step, and the main crimping step, and the semiconductor device can be efficiently manufactured.
  • the weight average molecular weight of the polymer component is 30,000 or more and the glass transition temperature of the polymer component is 200 ° C. or less.
  • the adhesive can have good film-forming properties by itself, and the shape of the adhesive can be easily maintained in the temporary crimping step, the temporary crimping body pressurizing step, and the main crimping step. Manufacturing efficiency is further improved. Further, the adhesive makes it easier to embed the unevenness on the surface of the second member side of the first member or the unevenness on the surface of the first member side of the second member, and the effect of suppressing voids is relative. Tends to grow.
  • the adhesive is preferably a film-like adhesive.
  • the adhesive is in the form of a film, the manufacturing efficiency of the semiconductor device is further improved.
  • the "melting point of the first connection portion” means the melting point of the material forming the surface portion of the first connection portion.
  • the “melting point of the second connecting portion” means the melting point of the material forming the surface portion of the second connecting portion.
  • a method for manufacturing a semiconductor device capable of manufacturing a semiconductor device in which the generation of voids is suppressed while ensuring good connection reliability, and an adhesive used therefor.
  • FIG. 1 is a partial cross-sectional view showing a semiconductor device manufactured by one embodiment of the method for manufacturing a semiconductor device of the present disclosure.
  • the semiconductor device 100 includes a semiconductor chip (first member) 1 having a bump 30 as a first connection portion, and a wiring circuit board (second member) having a wiring 16 as a second connection portion.
  • the member) 2 is electrically connected to the member) 2 via the adhesive layer 40A.
  • the semiconductor chip 1 includes a semiconductor chip main body 10, a wiring 15 provided on one surface of the semiconductor chip main body 10, and a bump 30 provided on the wiring 15.
  • the wiring circuit board 2 includes a board main body 20 and a wiring 16 provided on one surface of the board main body 20. In the semiconductor device 100, the bump 30 on the semiconductor chip 1 and the wiring 16 on the wiring circuit board 2 are electrically connected.
  • FIG. 2 is a process diagram showing a temporary crimping process in one embodiment of the semiconductor device manufacturing method of the present disclosure
  • FIG. 3 shows a temporary crimping body pressurizing step in one embodiment of the semiconductor device manufacturing method of the present disclosure.
  • the process diagram and FIG. 4 are process diagrams showing the present crimping process in one embodiment of the method for manufacturing a semiconductor device of the present disclosure.
  • a semiconductor chip 1 having a bump 30 and a wiring circuit board 2 having a wiring 16 are provided with an adhesive layer 40A.
  • a temporary crimping step (see FIG. 2) in which the bump 30 and the wiring 16 are temporarily crimped to obtain a temporary crimping body 4 in a state where the bump 30 and the wiring 16 are opposed to each other via a thermosetting adhesive 40 for forming, and a temporary crimping.
  • a temporary crimping body pressurizing step see FIG.
  • the present crimping step (see FIG. 4) of connecting the bump 30 and the wiring 16 to obtain a crimping body 6 by crimping the chip 1 and the wiring circuit board 2 is included. Then, in the temporary crimping step, the semiconductor chip 1 and the wiring circuit board 2 are temporarily crimped at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16, and in the temporary crimping body pressurizing step, the temporary crimping body is used.
  • the pressurization of 4 is performed at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16. Further, in this crimping step, the pressurized temporary crimping body 5 is heated at a temperature equal to or higher than the melting point of at least one of the bump 30 and the wiring 16.
  • the heating of the pressurized temporary crimping body 5 is performed at least among the bump 30 and the wiring 16. Since it is heated to a temperature equal to or higher than one melting point, the bump 30 and the wiring 16 are connected.
  • the pressure of the temporary crimping body 4 is performed at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16. At the starting point, the adhesive 40 has not been sufficiently cured, and the viscosity of the adhesive 40 is low.
  • the temporary crimping body 4 obtained in the temporary crimping step a gap is likely to be formed between the adhesive 40 and the semiconductor chip 1 and at least one between the adhesive 40 and the wiring circuit board 2. If this void remains as it is, it will remain as a void in the semiconductor device 100.
  • the voids can be eliminated by pressurizing and compressing.
  • this pressurization is performed after the main crimping step, the adhesive 40 is heated to a temperature equal to or higher than the melting point of at least one of the bump 30 and the wiring 16 in the main crimping step, and the curing proceeds. , The viscosity of the adhesive 40 is already high.
  • the connection between the bump 30 and the wiring 16 is completed, and the position of the semiconductor chip 1 with respect to the wiring circuit board 2 is fixed. Therefore, even if the adhesive 40 is pressed, it is difficult to apply sufficient pressure to the adhesive 40. Therefore, after the main crimping step, the voids cannot be sufficiently compressed and are likely to be left as voids in the adhesive layer 40A of the semiconductor device 100.
  • the pressure of the void is heated at a temperature lower than the melting point of the bump 30 and the melting point of the wiring 16 in the temporary crimping body pressurizing step before the main crimping step.
  • the adhesive 40 is not cured as compared with the case where the adhesive 40 is performed at a temperature equal to or higher than the melting point of at least one of the bump 30 and the wiring 16, and the viscosity of the adhesive 40 is low. It becomes easy to compress, and voids are less likely to be left as voids in the adhesive layer 40A of the semiconductor device 100.
  • the manufacturing method of the present embodiment it is possible to manufacture the semiconductor device 100 in which the generation of voids is suppressed. From the above, according to the method for manufacturing a semiconductor device of the present embodiment, it is possible to manufacture a semiconductor device 100 in which the generation of voids is suppressed while ensuring good connection reliability.
  • the semiconductor chip main body 10 and the semiconductor chip 1 having the bump 30 as the first connection portion are used as the substrate main body 20 and the second connection portion.
  • the laminated body 3 is formed by superimposing the adhesive 40 on the wiring circuit board 2 having the wiring 16 while arranging the adhesive 40 between them.
  • the semiconductor chip 1 is formed, for example, by dicing a semiconductor wafer, then is picked up and conveyed onto the wiring circuit board 2, and is aligned so that the bump 30 as the first connection portion and the wiring 16 are arranged so as to face each other. Will be done.
  • the laminated body 3 is formed on the stage 42 of the pressing device 43 having the crimping head 41 and the stage 42 as a pair of temporarily crimping pressing members arranged so as to face each other.
  • the bump 30 is provided on the wiring 15 provided on the semiconductor chip main body 10.
  • the wiring 16 of the wiring circuit board 2 is provided at a predetermined position on the board main body 20.
  • the bump 30 and the wiring 16 each have a surface portion formed of a metal material.
  • the adhesive 40 may be applied to the surface of the semiconductor chip 1 on the wiring circuit board 2 side, or may be applied to the surface of the wiring circuit board 2 on the semiconductor chip 1 side, and is in the form of a film prepared in advance.
  • the adhesive may be attached to the wiring circuit board 2.
  • the film-shaped adhesive 40 can be attached by a heat press, a roll laminate, a vacuum laminate, or the like.
  • the area and thickness of the adhesive 40 are appropriately set according to the size of the semiconductor chip 1 or the wiring circuit board 2, the heights of the bumps 30 and the wiring 16, and the like.
  • the film-shaped adhesive 40 may be attached to the semiconductor chip 1. In this case, for example, by attaching a film-shaped adhesive to a semiconductor wafer and then dicing the semiconductor wafer to separate the semiconductor wafer, a semiconductor chip 1 to which the film-shaped adhesive 40 is attached can be obtained.
  • the laminated body 3 is pressed by being sandwiched between the stage 42 as the temporary crimping pressing member and the crimping head 41, whereby the semiconductor chip 1 and the wiring circuit are pressed.
  • the crimping head 41 is arranged on the semiconductor chip 1 side, and the stage 42 is arranged on the wiring circuit board 2 side.
  • a flip chip bonder or the like can be used as the temporary crimping pressing device 43 having the stage 42 and the crimping head 41.
  • At least one of the stage 42 and the crimping head 41 has the melting point of the bump 30 as the first connection portion of the semiconductor chip 1 and the second connection portion of the wiring circuit board 2.
  • the wiring is performed at a temperature lower than the melting point of the wiring 16.
  • the temporary crimping step from the viewpoint of suppressing transfer of heat to the semiconductor chip 1 due to contact of the temporary crimping pressing member with the semiconductor chip 1 when picking up the semiconductor chip 1 as the first member, temporary crimping is performed. It is preferable that the pressing member is set to a low temperature. On the other hand, while the laminated body 3 is pressed for temporary crimping, the temporary crimping pressing member may be heated to a high temperature to some extent in order to increase the fluidity of the adhesive 40 to the extent that the entrained voids can be eliminated.
  • the temperature of the temporary crimping pressing member when the semiconductor chip 1 is picked up and the laminated body 3 are heated and applied in order to obtain the temporary crimping body 4.
  • this temperature difference is preferably 100 ° C. or lower, more preferably 60 ° C. or lower, and even more preferably substantially 0 ° C. This temperature difference may be constant. When the temperature difference is 100 ° C. or less, the time required for cooling the temporary crimping pressing member can be further shortened.
  • the temperature of the temporary crimping pressing member when the laminated body 3 is pressed to obtain the temporary crimping body 4 may be a temperature equal to or higher than the reaction starting temperature of the adhesive 40, and is lower than the reaction starting temperature of the adhesive 40.
  • the temperature may be, but it is preferably a temperature lower than the reaction start temperature of the adhesive 40. In this case, the reaction of the adhesive 40 is less likely to start, and the adhesive 40 has not been cured at the start of the temporary crimping body pressurizing step. Therefore, voids generated in the temporary crimping step are easily eliminated. be able to.
  • the reaction start temperature was measured using DSC (manufactured by PerkinElmer, product name "DSC-Pyrs1") under the conditions of a sample amount of 10 mg of the adhesive 40, a heating rate of 10 ° C./min, and a measurement atmosphere: nitrogen. It refers to the On-set temperature in the DSC thermogram that is sometimes obtained.
  • the temperature of the temporary crimping pressing member is preferably 70 ° C. or higher from the viewpoint of more easily eliminating the void generated in the temporary crimping step.
  • the pressing load for pressurizing the laminated body 3 in order to obtain the temporary crimping body 4 is appropriately set in consideration of the number of bumps 30, absorption of height variations of the bumps 30, and the amount of deformation of the bumps 30. At this time, it is preferable that the pressing load is set so that the bump 30 of the semiconductor chip 1 and the wiring 16 of the wiring circuit board 2 come into contact with each other in the temporary crimping body 4 by pressurizing the laminated body 3. In this case, a metal bond between the bump 30 and the wiring 16 is likely to be formed in the main crimping step to be performed later, and the adhesive 40 tends to be less likely to be caught between the bump 30 and the wiring 16.
  • the pressing load for pressurizing the laminated body 3 in order to obtain the temporary crimping body 4 is, for example, 0.009 or more per bump 30 of the semiconductor chip 1. It may be set to 0.5N.
  • the time for pressurizing the laminated body 3 to obtain the temporary pressure-bonded body 4 is not particularly limited, but from the viewpoint of improving productivity, it is preferably 5 seconds or less, and preferably 3 seconds or less. It is more preferably 2 seconds or less, and particularly preferably 2 seconds or less. However, the time for pressurizing the laminated body 3 to obtain the temporary crimped body 4 may be 0.1 seconds or longer. Further, when the bump 30 and the wiring 16 are brought into contact with each other, it is desirable that the time for pressurizing the laminated body 3 to obtain the temporary crimping body 4 is the time until the bump 30 and the wiring 16 come into contact with each other.
  • the semiconductor chip main body 10 is not particularly limited, and various semiconductors such as elemental semiconductors composed of elements of the same type such as silicon and germanium, and compound semiconductors such as gallium arsenide and indium phosphorus can be used.
  • the wiring circuit board 2 is not particularly limited, and has an insulating substrate containing glass epoxy, polyimide, polyester, ceramic, epoxy, bismaleimide triazine and the like as a main component as the substrate main body 20, and a metal formed on the surface thereof.
  • a circuit board or the like on which a conductive material is printed and wiring (wiring pattern) is formed can be used.
  • the materials of the bump 30 and the wiring 16 are, for example, gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), tin, and so on. Contains metals such as nickel as the main component.
  • the bump 30 and the wiring 16 may be composed of only a single component, or may be composed of a plurality of components.
  • the bump 30 and the wiring 16 may have a structure in which these metals are laminated.
  • gold, silver or copper is preferable, and silver or copper is more preferable, from the viewpoint of manufacturing a semiconductor device (package) 100 having excellent electrical conductivity and thermal conductivity of the bump 30 and the wiring 16.
  • inexpensive silver, copper or solder is preferable, copper or solder is more preferable, and solder is particularly preferable.
  • Gold, silver, copper or solder is preferable, gold, silver or solder is more preferable, and gold or gold is preferable from the viewpoint of suppressing the formation of an oxide film on the metal surface at room temperature to suppress a decrease in productivity and an increase in cost.
  • Silver is more preferred.
  • Solder is preferable from the viewpoint of improving the connection reliability of the semiconductor device 100 and suppressing warpage.
  • the bump 30 and the wiring 16 are mainly composed of gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel and the like as surface portions. It may have a metal layer. Such a metal layer can be formed, for example, by plating. This metal layer may be composed of only a single component or may be composed of a plurality of components. Further, the metal layer may have a structure composed of a single layer or a structure in which a plurality of metal layers are laminated.
  • Temporal crimping body pressurizing process In the temporary crimping body pressurizing step, after the temporary crimping body 4 is obtained, as shown in FIG. 3, the temporary crimping body 4 is heated while being pressurized under the pressurized atmosphere in the heating furnace 60. At this time, it is preferable to pressurize a plurality of temporary crimping bodies 4 at once in one heating furnace 60. This is due to the following reasons. That is, when a plurality of temporary crimping bodies 4 are collectively pressed by using the pressing member, it is difficult to uniformly pressurize the plurality of temporary crimping bodies 4.
  • a large number of temporary crimping bodies 4 can be easily and uniformly pressed, thereby increasing the productivity of the semiconductor device 100. Is improved.
  • a heating furnace 60 a reflow furnace, a pressure oven, or the like can be used.
  • the fillet suppression means that the fillet width is suppressed to be small, and the fillet width is the length of the adhesive protruding from the outer peripheral portion of the semiconductor device 100.
  • the fillet width can be measured, for example, by taking an external image of the semiconductor device 100 with a digital microscope (manufactured by KEYENCE, product name "VHX-5000") and measuring the obtained image.
  • the fillet value is preferably 150 ⁇ m or less from the viewpoint of mounting many semiconductor chips 1 on the wiring circuit board 2.
  • the atmosphere in the heating furnace 60 is not particularly limited, and may be, for example, air, nitrogen, formic acid, or the like.
  • the pressure (atmospheric pressure) of the pressurized atmosphere in the heating furnace 60 is appropriately set according to the size and number of the semiconductor chips 1 or the wiring circuit board 2 to be connected.
  • the pressure for pressurization is not particularly limited, but may be, for example, higher than atmospheric pressure and 1 MPa or less. At this time, it is preferable that the pressure is large from the viewpoint of suppressing voids and improving connection reliability. On the other hand, from the viewpoint of fillet suppression, it is preferable that the pressure is small. Therefore, in consideration of void suppression and improvement of connection reliability, the pressure for pressurization is preferably 0.05 to 0.8 MPa.
  • the set temperature of the heating furnace 60 is the melting point of the bump 30 as the first connecting portion of the semiconductor chip 1 and the second connecting portion of the wiring circuit board 2.
  • the temperature is lower than the melting point of the wiring 16.
  • the set temperature of the heating furnace 60 is set to a temperature equal to or higher than the melting point of at least one of the bump 30 as the first connection portion of the semiconductor chip 1 and the wiring 16 as the second connection portion of the wiring circuit board 2.
  • the gap between the semiconductor chip 1 and the adhesive 40 or between the wiring circuit board 2 and the adhesive 40 can be easily compressed, and the gap is sufficiently in the adhesive layer 40A of the semiconductor device 100.
  • the generation of voids can be further suppressed. Further, since the curing of the adhesive 40 does not proceed excessively, in the main crimping step, the bump 30 and the wiring 16 can be easily connected in the pressurized temporary crimping body 5, and the semiconductor device 100 can be connected. The reliability can be further improved.
  • the set temperature of the heating furnace 60 when the temporary crimping body 4 is pressurized may be equal to or higher than the reaction start temperature of the adhesive 40, and may be lower than the reaction start temperature. , It is preferable that the temperature is equal to or higher than the reaction start temperature of the adhesive 40. In this case, the voids can be compressed more effectively while the adhesive 40 is made to flow.
  • the difference ( ⁇ T2) between the set temperature of the heating furnace 60 and the reaction start temperature of the adhesive 40 is 5 ° C. or higher. Is preferable, and the temperature is more preferably 10 ° C. or higher. However, ⁇ T2 is preferably 100 ° C. or lower.
  • the set temperature of the heating furnace 60 when the temporary crimping body 4 is pressurized is set when the laminated body 3 is pressed in order to obtain the temporary crimping body 4 (temporary crimping of the semiconductor chip 1 and the wiring circuit board 2).
  • the temperature may be lower than or equal to the temperature of the temporary crimping pressing member (at the time of performing), or higher than the temperature of the temporary crimping pressing member when the laminated body 3 is pressed to obtain the temporary crimping body 4.
  • it is preferable that the temperature is higher than the temperature of the temporary crimping pressing member when the laminated body 3 is pressed in order to obtain the temporary crimping body 4.
  • the set temperature of the heating furnace 60 when the temporary crimping body 4 is pressurized is preferably 140 ° C. or higher, more preferably 145 ° C. or higher, and 150 ° C. or higher, from the viewpoint of effectively compressing the voids while flowing. It is particularly preferable that the temperature is above ° C. However, the set temperature of the heating furnace 60 when pressurizing the temporary crimping body 4 is preferably 260 ° C. or lower.
  • the stage 45 and the crimping head 44 arranged to face each other are used for a pair of main crimping.
  • the pressing device 46 as a member, the pressurized temporary crimping body 5 is pressed while being heated by a hot press sandwiched between the stage 45 and the crimping head 44 to form the crimping body 6.
  • the pressing device 46 may be the same as the pressing device 43, or may be prepared separately.
  • At least one of the stage 45 and the crimping head 44 is heated to a temperature equal to or higher than the melting point of at least one of the melting point of the bump 30 and the melting point of the wiring 16 when the pressurized temporary crimping body 5 is pressurized.
  • the melting point Further, in the crimping body 6, the semiconductor chip 1 and the wiring circuit board 2 are usually electrically connected by metal bonding of the bump 30 and the wiring 16.
  • the crimping body 6 may be used as it is as a semiconductor device, or after the main crimping step, the crimping body 6 is further heated under a pressurized atmosphere to further cure the adhesive 40 to form the adhesive layer 40A, and then the semiconductor. It may be the device 100.
  • the crimping head 44 is arranged on the semiconductor chip 1 side of the pressurized temporary crimping body, and the stage 45 is arranged on the wiring circuit board 2 side of the pressurized temporary crimping body.
  • the wiring 16 and the bump 30 are sealed by the adhesive 40 so as to be shielded from the external environment.
  • the temperature of at least one of the stage 45 and the crimping head 44 may be set to a temperature higher than the temperature at which the oxide film on the surface of at least one of the bump 30 and the wiring 16 is efficiently removed. From this point of view, the temperature of at least one of the stage 45 and the crimping head 44 is preferably 220 ° C. or higher and 330 ° C. or lower.
  • the solder of the bump 30 or the wiring 16 melts as compared with the case where the temperature of at least one of the stage 45 and the crimping head 44 is lower than 220 ° C. Sufficient metal bonds are likely to be formed.
  • the temperature is 330 ° C. or lower, voids are less likely to occur and solder is less likely to scatter than when the temperature exceeds 330 ° C.
  • the temperature of at least one of the stage 45 and the crimping head 44 may be 220 ° C. or higher even when the metal material of at least one of the bump 30 and the wiring 16 contains Sn / Ag having a melting point of about 220 ° C.
  • the pressing load is the removal of the oxide film on the surface of at least one of the bump 30 and the wiring 16, the number of bumps 30, and the number of bumps 30. It is appropriately set in consideration of absorption of height variation, control of the amount of deformation of the bump 30 and the like.
  • the pressing load may be, for example, 0.009 to 0.2 N per bump 30 of the semiconductor chip 1.
  • this pressing load is 0.009 N or more, the oxide film formed on at least one of the bump 30 and the wiring 16 can be easily removed, or the adhesive 40 is applied to at least one of the bump 30 and the wiring 16. It becomes difficult to be trapped. Further, when the pressing load is 0.2 N or less, problems such as bumps containing solder and the like being crushed or scattered are unlikely to occur.
  • the time for pressurizing the pressed temporary crimping body 5 while heating to obtain the crimping body 6 is preferably 5 seconds or less, more preferably 3 seconds or less, and 2 It is particularly preferably less than a second.
  • the time for pressurizing the pressed temporary crimping body 5 while heating to obtain the crimping body 6 may be 0.1 seconds or longer.
  • the method of heating and pressurizing the pressurized temporary crimping body 5 is not limited to the hot press as shown in FIG. 4, for example, using a heating furnace, the pressurized temporary crimping body 5 is pressurized in a pressurized atmosphere in the heating furnace. May be heated.
  • a heating furnace a reflow furnace, a pressure oven, or the like can be used.
  • the atmosphere in the heating furnace is not particularly limited, but may be air, nitrogen, formic acid, or the like.
  • the adhesive used in the embodiment of the above-mentioned method for manufacturing a semiconductor device will be described.
  • the adhesive of the present embodiment is not particularly limited as long as it is a thermosetting adhesive, and contains, for example, an epoxy resin, a curing agent, and a flux agent.
  • Epoxy resin The epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule.
  • the epoxy resin bisphenol A type epoxy resin, bisphenol F type epoxy resin, naphthalene type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, phenol aralkyl type epoxy resin, biphenyl type epoxy resin, triphenylmethane type epoxy
  • Various polyfunctional epoxy resins such as resins and dicyclopentadiene type epoxy resins can be used. These can be used alone or in combination of two or more.
  • the weight average molecular weight of the epoxy resin is not particularly limited, but is preferably less than 10,000.
  • Epoxy resin is an epoxy resin with a thermogravimetric reduction rate of 5% or less at the temperature at the time of connection (heating temperature in this crimping process) from the viewpoint of suppressing decomposition and generation of volatile components at the time of connection at high temperature. It is preferable to use it. For example, when the temperature at the time of connection is 250 ° C., it is preferable to use an epoxy resin having a thermogravimetric reduction rate of 5% or less at 250 ° C., and when the temperature is 300 ° C., the thermogravimetric analysis rate at 300 ° C. is 5%. It is preferable to use the following epoxy resin.
  • the content of the epoxy resin is, for example, 5 to 75% by mass, preferably 10 to 50% by mass, and more preferably 15 to 35% by mass based on the total amount of the adhesive 40.
  • the curing agent examples include a phenol resin-based curing agent, an acid anhydride-based curing agent, an amine-based curing agent, an imidazole-based curing agent, and a phosphine-based curing agent.
  • the curing agent is a phenolic resin-based curing agent, an acid anhydride-based curing agent, and the like. It is preferable to contain at least one selected from an amine-based curing agent and an imidazole-based curing agent, and it is more preferable to contain an imidazole-based curing agent.
  • each curing agent will be described.
  • the phenol resin-based curing agent is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule, and examples thereof include phenol novolac resin, cresol novolak resin, phenol aralkyl resin, and cresol naphthol formaldehyde polycondensation. Examples thereof include triphenylmethane-type polyfunctional phenols and various polyfunctional phenol resins. These can be used alone or as a mixture of two or more.
  • the equivalent ratio (phenolic hydroxyl group / epoxy group, molar ratio) of the phenol resin-based curing agent to the epoxy resin is preferably 0.3 to 1.5 from the viewpoint of good curability, adhesiveness and storage stability, and is 0. .4 to 1.0 is more preferable, and 0.5 to 1.0 is even more preferable.
  • the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved, and when it is 1.5 or less, unreacted phenolic hydroxyl groups do not remain excessively and the water absorption rate is high. It is kept low and tends to improve the insulation reliability of the semiconductor device 100.
  • the equivalent ratio is 0.3 to 1.5, it is easy to adjust the gel time to an appropriate range.
  • acid anhydride-based curing agent examples include methylcyclohexanetetracarboxylic acid dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic acid dianhydride, and ethylene glycol bisanhydrotrimeritate. These can be used alone or as a mixture of two or more.
  • the equivalent ratio of the acid anhydride-based curing agent to the epoxy resin is preferably 0.3 to 1.5 from the viewpoint of good curability, adhesiveness and storage stability. , 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is even more preferable.
  • the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved, and when it is 1.5 or less, unreacted acid anhydride does not remain excessively and the water absorption rate is high. It is kept low and tends to improve the insulation reliability of the semiconductor device 100.
  • the equivalent ratio is 0.3 to 1.5, it is easy to adjust the gel time to an appropriate range.
  • amine-based curing agent for example, dicyandiamide can be used.
  • the equivalent ratio (amino group / epoxy group, molar ratio) of the amine-based curing agent to the epoxy resin is preferably 0.3 to 1.5, preferably 0.4 to 1.5, from the viewpoint of good curability, adhesiveness and storage stability. 1.0 is more preferable, and 0.5 to 1.0 is even more preferable.
  • the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved, and when it is 1.5 or less, unreacted amine does not remain excessively, and the insulation of the semiconductor device 100 is insulated. Reliability tends to improve.
  • the equivalent ratio is 0.3 to 1.5, it is easy to adjust the gel time to an appropriate range.
  • imidazole-based curing agent examples include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, and 1-cyanoethyl-2-undecylimidazole.
  • the imidazole-based curing agent may be selected from the body, 2-phenylimidazole isocyanuric acid ad
  • the content of the imidazole-based curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, and further preferably 3.2 to 5.5 parts by mass with respect to 100 parts by mass of the epoxy resin. preferable.
  • the content of the imidazole-based curing agent is 0.1 parts by mass or more, the curability of the adhesive 40 tends to be improved, and when it is 20 parts by mass or less, a metal bond is formed between the bump 30 and the wiring 16.
  • the adhesive 40 does not harden before the adhesive 40 is formed, and there is a tendency that a poor connection between the bump 30 and the wiring 16 is less likely to occur.
  • the content of the imidazole-based curing agent is 0.1 to 20 parts by mass, it is easy to adjust the gel time to an appropriate range.
  • phosphine-based curing agent examples include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate and tetraphenylphosphonium (4-fluorophenyl) borate.
  • the content of the phosphine-based curing agent is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass with respect to 100 parts by mass of the epoxy resin.
  • the content of the phosphine-based curing agent is 0.1 parts by mass or more, the curability of the adhesive 40 tends to be improved, and when it is 10 parts by mass or less, a metal bond is formed between the bump 30 and the wiring 16.
  • the adhesive 40 does not cure before the adhesive 40 is formed, and there is a tendency that poor connection between the bump 30 and the wiring 16 is unlikely to occur.
  • the phenolic resin-based curing agent, acid anhydride-based curing agent, and amine-based curing agent can be used alone or as a mixture of two or more.
  • the imidazole-based curing agent and the phosphine-based curing agent may be used alone, or may be used together with a phenol resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.
  • the flux agent is, for example, a compound having a group represented by the formula (1).
  • the flux agent one containing only one type of group represented by the following formula (1) or two or more types can be used.
  • R 1 represents a hydrogen atom or an electron donating group.
  • the electron donating group include an alkyl group, a hydroxyl group, an amino group, an alkoxy group, and an alkylamino group.
  • the electron donating group is preferably one that does not easily react with other components (epoxy resin or the like), preferably an alkyl group, a hydroxyl group or an alkoxyl group, and more preferably an alkyl group.
  • the alkyl group an alkyl group having 1 to 10 carbon atoms is preferable, and an alkyl group having 1 to 5 carbon atoms is more preferable.
  • the alkyl group may be linear or branched, but is preferably linear.
  • the carbon number of the alkyl group is preferably equal to or less than the carbon number of the main chain containing the carboxy group from the viewpoint of reducing steric hindrance. ..
  • the alkoxy group an alkoxy group having 1 to 10 carbon atoms is preferable, and an alkoxy group having 1 to 5 carbon atoms is more preferable.
  • the carbon number thereof is equal to or less than the carbon number of the main chain containing the carboxylic acid from the viewpoint of reducing steric hindrance. Is preferable.
  • alkylamino group examples include a monoalkylamino group and a dialkylamino group.
  • a monoalkylamino group having 1 to 10 carbon atoms is preferable, and a monoalkylamino group having 1 to 5 carbon atoms is more preferable.
  • the alkyl group portion of the monoalkylamino group may be linear or branched, and is preferably linear.
  • dialkylamino group a dialkylamino group having 1 to 20 carbon atoms is preferable, and a dialkylamino group having 1 to 10 carbon atoms is more preferable.
  • the alkyl group portion of the dialkylamino group may be linear or branched, and is preferably linear.
  • the flux agent is preferably a compound (dicarboxylic acid) having two carboxy groups.
  • a compound having two carboxy groups is less likely to volatilize even at a high temperature at the time of connection as compared with a compound having one carboxy group (monocarboxylic acid), and the generation of voids can be further suppressed.
  • a compound represented by the following formula (2) can be preferably used. According to the flux agent composed of the compound represented by the following formula (2), the reflow resistance and the connection reliability of the semiconductor device 100 can be further improved.
  • R 1 and R 2 each independently represent a hydrogen atom or an electron donating group, and n represents an integer of 0 to 10.
  • N in the formula (2) is preferably an integer of 2 to 10, and more preferably an integer of 2 to 8.
  • n 10 or less, the flux activity is expressed in a shorter time, and further excellent connection reliability can be obtained particularly when the connection time is short. Further, when n is 2 or more, it is difficult to volatilize even at a high temperature at the time of connection, and the generation of voids can be further suppressed.
  • R 1 and R 2 may be a hydrogen atom or an electron donating group.
  • R 1 and R 2 are hydrogen atoms, the melting point of the adhesive 40 tends to be low, and the connection reliability (solder wettability) may be improved.
  • a flux agent having the same methyl group in both R 1 and R 2 has a higher melting point than one having a methyl group in one (R 1 or R 2 ), and the wettability of the solder depends on the melting point (for example,). It tends to decrease (above 150 ° C).
  • the flux agent examples include an electron donating group at the 2-position of a dicarboxylic acid selected from succinic acid, glutaric acid, adipic acid, pimelli acid, suberic acid, azelaic acid, sebacic acid, undecanoic acid and dodecanedioic acid. Substituted compounds can be used.
  • the melting point of the flux agent is preferably 150 ° C. or lower, more preferably 140 ° C. or lower, and even more preferably 130 ° C. or lower.
  • a flux agent sufficiently develops the flux activity before the curing reaction between the epoxy resin and the curing agent occurs. Therefore, according to the adhesive 40 containing such a flux agent, it is possible to realize the semiconductor device 100 having further excellent connection reliability.
  • the flux agent is preferably solid at room temperature, and the melting point of the flux agent is preferably 25 ° C. or higher, more preferably 50 ° C. or higher.
  • the melting point of the flux agent can be measured, for example, by a device in which a capillary tube filled with a sample is attached to a double-tube thermometer and heated in a hot bath.
  • the melting point of the flux agent contained in the adhesive 40 of the present embodiment is preferably higher than the temperature of the stage 42 of the pressing device 43 for forming the temporary pressure-bonding body 4.
  • the melting point of the flux agent is higher than the stage temperature of the pressing device 43, the bump 30 and the wiring 16 can be easily brought into contact with each other in the main crimping step, so that the first and last thermal histories of the main crimping step are recorded. Even if they are different, it is possible to manufacture the semiconductor device 100 having excellent connection reliability.
  • the content of the flux agent is preferably 0.5 to 10% by mass, more preferably 0.5 to 5% by mass, based on the total amount of the adhesive 40.
  • the adhesive 40 may further contain a polymer component.
  • the polymer component is composed of a polymer different from the epoxy resin.
  • examples of such polymer components include phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, polyether sulfone resin, polyetherimide resin, and polyvinyl acetal resin. , Urethane resin and acrylic rubber.
  • phenoxy resin, polyimide resin, acrylic rubber, cyanate ester resin and polycarbodiimide resin are preferable, and phenoxy resin, polyimide resin and acrylic rubber are more preferable from the viewpoint of excellent heat resistance and film forming property.
  • These polymer components can also be used alone or as a mixture or copolymer of two or more kinds.
  • the weight average molecular weight of the polymer component is not particularly limited, but is preferably 10,000 or more.
  • the adhesive 40 containing the polymer component is further excellent in heat resistance and film forming property. Therefore, if the adhesive 40 is used, the semiconductor device 100 having higher heat resistance can be manufactured. Further, the shape of the adhesive 40 is easily maintained in the temporary crimping step, the temporary crimping body pressurizing step, and the main crimping step, and the semiconductor device 100 can be efficiently manufactured.
  • the weight average molecular weight of the polymer component imparts good film forming property to the adhesive 40 by itself, and makes it easy to maintain the shape of the adhesive 40 in the temporary crimping step, the temporary crimping body pressurizing step, and the main crimping step. From the viewpoint of efficiently manufacturing the semiconductor device 100, it is preferably 30,000 or more, more preferably 40,000 or more, and further preferably 50,000 or more.
  • the ratio C a / C d of the epoxy resin content Ca to the content C d of the polymer component having a weight average molecular weight of 10,000 or more is preferably 0.01 to 5, more preferably 0.05 to 3, and even more preferably 0.1 to 2.
  • the ratio C a / C d is preferably 0.01 to 5, more preferably 0.05 to 3, and even more preferably 0.1 to 2.
  • the glass transition temperature (Tg) of the polymer component is not particularly limited, but is preferably 200 ° C. or lower, more preferably 180 ° C. or lower, and even more preferably 150 ° C. or lower.
  • the adhesive 40 tends to embed the adhesive 40 in the bumps 30 of the semiconductor chip 1, the electrodes formed on the wiring circuit board 2, and the unevenness of the wiring pattern, and the effect of suppressing voids becomes relatively large.
  • Tg is measured using DSC (manufactured by PerkinElmer Co., Ltd., product name "DSC-7 type") under the conditions of a sample amount of 10 mg, a heating rate of 10 ° C./min, and an air atmosphere.
  • the glass transition temperature (Tg) of the polymer component is preferably 50 ° C. or higher.
  • Tg of the polymer component is 50 ° C. or higher, the tack (viscous) force of the adhesive 40 tends to be moderately weakened.
  • the glass transition temperature (Tg) of the polymer component may be 50 ° C. or higher and 200 ° C. or lower, and may be 50 ° C. or higher, from the viewpoint of excellent adhesion of the adhesive 40 to the wiring circuit board 2 or the semiconductor chip 1.
  • the temperature is preferably 180 ° C. or lower, and more preferably 50 ° C. or higher and 150 ° C. or lower.
  • the adhesive 40 may contain a filler in order to control the viscosity and the physical characteristics of the cured product, and to suppress the generation of voids and the hygroscopicity when the semiconductor chip 1 and the wiring circuit board 2 are connected.
  • the filler may be an inorganic filler, and examples thereof include an insulating inorganic filler such as glass, silica, alumina, titanium oxide, mica, and boron nitride, and a conductive inorganic filler such as carbon black.
  • an insulating inorganic filler selected from silica, alumina, titanium oxide, and boron nitride is used.
  • the filler may be whisker, and examples thereof include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride.
  • the filler may be a resin filler (organic filler), and examples thereof include polyurethane resin, polyimide resin, methyl methacrylate resin, and methyl methacrylate-butadiene-styrene copolymer resin (MBS). These fillers can also be used alone or in combination of two or more.
  • the shape, average particle size, and content of the filler are not particularly limited.
  • the filler may have its physical properties adjusted appropriately by surface treatment.
  • the content of the filler is preferably 10 to 80% by mass, more preferably 15 to 60% by mass, based on the total amount of the adhesive 40, from the viewpoint of adjusting the minimum melt viscosity to an appropriate range.
  • the adhesive 40 may further contain other components such as an ion trapper, an antioxidant, a silane coupling agent, a titanium coupling agent, and a leveling agent. These may be used individually by 1 type, or may be used in combination of 2 or more type. The blending amount of these may be appropriately adjusted so that the effect of each additive is exhibited.
  • the adhesive 40 may be in the form of a film from the viewpoint of improving the manufacturing efficiency of the semiconductor device 100.
  • a resin varnish containing an epoxy resin, a curing agent, a flux agent, and if necessary, an organic solvent and other components is applied onto the base film to form a coating film, and the coating film is dried. It can be manufactured by the method.
  • the resin varnish is prepared by mixing an epoxy resin, a curing agent and a flux agent, and a polymer component and a filler added as necessary with an organic solvent, and dissolving or dispersing them by stirring or kneading.
  • the resin varnish is applied onto the release-treated base film using, for example, a knife coater, a roll coater, an applicator, a die coater, or a comma coater.
  • the organic solvent is reduced from the coating film of the resin varnish by heating, that is, the coating film is dried to form a film-like adhesive on the base film.
  • a film of a resin varnish may be formed on a semiconductor wafer or the like by a method such as spin coating, and then a film-like adhesive may be formed on the semiconductor wafer by a method of drying the coating film.
  • the organic solvent used for the preparation of the resin varnish is preferably one having the property of uniformly dissolving or dispersing each component, and for example, dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethylsulfoxide, diethyleneglycoldimethylether, etc.
  • examples thereof include toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, and ethyl acetate.
  • These organic solvents can be used alone or in combination of two or more.
  • Stirring and kneading at the time of preparing the resin varnish can be performed by using, for example, a stirrer, a raider, a three-roll, a ball mill, a bead mill or a homodisper
  • the base film is not particularly limited as long as it has heat resistance that can withstand the heating conditions when the organic solvent is volatilized, and is a polyolefin film such as a polypropylene film or a polymethylpentene film, a polyethylene terephthalate film, or a polyethylene naphthalate. Examples thereof include polyester films such as films, polyimide films, and polyetherimide films.
  • the base film is not limited to a single-layer film made of these films, and may be a multilayer film made of two or more kinds of materials.
  • the heating performed to volatilize the organic solvent from the resin varnish after application may be heating at 50 to 200 ° C. for 0.1 to 90 minutes.
  • the organic solvent may be removed until the residual amount becomes 1.5% by mass or less within a range that does not substantially affect the suppression of void generation and the viscosity adjustment in the adhesive layer 40A in the semiconductor device 100.
  • the minimum melt viscosity of the adhesive 40 is preferably 1500 Pa ⁇ s or less. When the minimum melt viscosity of the adhesive 40 is in this range, voids are less likely to remain in the adhesive layer 40A of the semiconductor device 100, and good connection reliability between the semiconductor chip 1 and the wiring circuit board 2 can be easily achieved. Can be secured. Further, as compared with the case where the minimum melt viscosity of the adhesive 40 is larger than 1500 Pa ⁇ s, the adhesive 40 is less likely to bite between the bump 30 and the wiring 16, resulting in poor connection between the bump 30 and the wiring 16. Since it becomes difficult, the connection reliability of the semiconductor device 100 is further improved. The minimum melt viscosity of the adhesive 40 can be adjusted to a range of 1500 Pa ⁇ s or less by adjusting the composition of the components in the adhesive 40.
  • the minimum melt viscosity of the adhesive 40 is the viscoelasticity of the adhesive 40 while giving a 1% strain to the test piece and raising the temperature in the temperature range of 35 to 150 ° C. under the conditions of a temperature rise rate of 10 ° C./min and a frequency of 10 Hz. Is the lowest value of viscosity in the relationship between the viscosity (complex viscoelasticity) obtained when measuring.
  • a test piece for measuring viscoelasticity for example, a laminate obtained by laminating a plurality of film-shaped adhesives 40 so as to have a thickness of 400 ⁇ m may be used.
  • a dynamic viscoelasticity measuring device product name "ARES" manufactured by TA Instruments Co., Ltd. is used.
  • the minimum melt viscosity of the adhesive 40 is preferably 1500 Pa ⁇ s or less from the viewpoint of further improving the connection reliability of the semiconductor device 100.
  • the minimum melt viscosity of the adhesive 40 is preferably 100 Pa ⁇ s or more.
  • the adhesive 40 can be easily handled as a film, and the manufacturing efficiency of the semiconductor device 100 is further improved, as compared with the case where the minimum melt viscosity is smaller than 100 Pa ⁇ s.
  • the adhesive 40 preferably exhibits a gel time of 35 seconds or more and 80 seconds or less at 150 ° C. When the gel time is in this range, voids are less likely to remain in the adhesive layer 40A of the semiconductor device 100, and good connection reliability can be ensured between the semiconductor chip 1 and the wiring circuit board 2.
  • the gel time of the adhesive 40 can be adjusted in the range of 35 seconds or more and 80 seconds or less depending on the type and content of the curing agent. By setting the gel time of the adhesive 40 to 35 seconds or more and 80 seconds or less at 150 ° C., voids are less likely to remain in the adhesive layer 40A of the semiconductor device 100 as compared with the case where the gel time is longer than 80 seconds, and voids are generated. A more suppressed semiconductor device 100 can be manufactured.
  • the curing reaction is less likely to proceed during the temporary crimping process (because it is less likely to be cured at a low temperature such as 80 ° C.), and it becomes easier to remove voids, making it easier to remove semiconductors. Since voids are less likely to remain in the adhesive layer 40A of the device 100, the semiconductor device 100 in which the generation of voids is more suppressed can be manufactured.
  • the gel time is the time from when the adhesive 40 is placed on a hot plate at 150 ° C. until the adhesive 40 gels. Specifically, the gel time is the time until the film is cured.
  • the gel time of the adhesive 40 is more preferably 38 seconds or more and 78 seconds or less from the viewpoint of further suppressing the generation of voids in the adhesive layer 40A of the semiconductor device 100.
  • the present disclosure is not limited to the above embodiment.
  • the manufacturing method of the semiconductor device of the present disclosure is the semiconductor device 200 shown in FIGS. 5, 6 and 7.
  • 300, 400, 500 can also be applied when manufacturing.
  • 5, 6 and 7, respectively, are partial cross-sectional views showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present disclosure.
  • the semiconductor chip 1 (first member) having the semiconductor chip body 10 and the wiring circuit board 2 (second member) having the substrate body 20 are bonded to each other.
  • a layer 40A is provided.
  • the semiconductor chip 1 has a bump 32 arranged on the surface of the semiconductor chip 1 on the wiring circuit board 2 side as a first connection portion.
  • the wiring circuit board 2 has a bump 33 arranged on the surface of the board body 20 on the semiconductor chip 1 side as a second connection portion.
  • the bump 32 of the semiconductor chip 1 and the bump 33 of the wiring circuit board 2 are electrically connected by metal bonding. That is, the semiconductor chip 1 and the wiring circuit board 2 are flip-chip connected by bumps 32 and 33.
  • the bumps 32 and 33 are shielded from the external environment by being sealed by the adhesive layer 40A.
  • FIG. 6 and 7 show CoC-type semiconductor devices 300 and 400, which are connectors in which semiconductor chips 1 are connected to each other.
  • the configuration of the semiconductor device 300 shown in FIG. 6 is that the two semiconductor chips 1 are connected to the semiconductor device 100 as the first member and the second member by flip-chip connection via the wiring 15 and the bump 30.
  • the configuration of the semiconductor device 400 shown in FIG. 7 is the same as that of the semiconductor device 200, except that the two semiconductor chips 1 having the bumps 32 are flip-chip connected via the bumps 32.
  • the first connection portion or the second connection portion such as the wiring 15 and the bump 32 is a metal film (for example, a pad) called a pad. , Gold plating) or post electrodes (eg, copper pillars).
  • a metal film for example, a pad
  • Gold plating Gold plating
  • post electrodes eg, copper pillars
  • one semiconductor chip 1 has a copper pillar and a connection bump (solder: tin-silver) as a first connection
  • the other semiconductor chip 1 or a wiring circuit board 2 has gold plating as a second connection. May be.
  • FIG. 8 is a partial cross-sectional view showing a semiconductor device manufactured by another embodiment of the method for manufacturing a semiconductor device of the present disclosure.
  • FIG. 8 is a cross-sectional view showing another embodiment of the semiconductor device.
  • the semiconductor device 500 shown in FIG. 8 has a TSV structure in which a plurality of semiconductor chips 1 are laminated.
  • the wiring 15 formed on the interposer main body 50 of the interposer 501 as a second member is connected to the bump 30 of the semiconductor chip 1 to connect the semiconductor chip 1 and the interposer. It is flip-chip connected to 501.
  • An adhesive layer 40A is interposed between the semiconductor chip 1 and the interposer 501.
  • the semiconductor chip 1 is repeatedly laminated on the surface of the semiconductor chip 1 opposite to the interposer 501 via the wiring 15, the bump 30, and the adhesive layer 40A.
  • the wiring 15 on the pattern surface on the front and back of the semiconductor chip 1 is connected to each other by a through electrode 34 filled in a hole penetrating the inside of the semiconductor chip main body 10.
  • a through electrode 34 filled in a hole penetrating the inside of the semiconductor chip main body 10.
  • copper, aluminum, or the like can be used as the material of the through electrode 34.
  • a plurality of semiconductor chips 1 are stacked one by one and temporarily crimped in sequence, and the plurality of semiconductor chips 1 are collectively heated in a heating furnace 60 while being pressurized in a pressurized atmosphere. It can be manufactured by crimping by a crimping process.
  • a motherboard may be used instead of the interposer 501.
  • the semiconductor chip 1 is directly mounted on the motherboard without going through the interposer 501.
  • the semiconductor device having a multi-layered semiconductor chip there are also a chip stack type package and a POP (Package On Package), and the method for manufacturing a semiconductor device of the present disclosure relates to the manufacture of such a semiconductor device. Is also applicable. These semiconductor devices can be manufactured by the same method as the semiconductor device 500 having a TSV structure.
  • Epoxy resin / EP1032H60 Polyphenol methane skeleton-containing polyfunctional solid epoxy resin (manufactured by Japan Epoxy Resin Co., Ltd., trade name "EP1032H60", weight average molecular weight: 800-2000)
  • -YL983U Bisphenol F type liquid epoxy resin (manufactured by Japan Epoxy Resin Co., Ltd., trade name "YL983U", weight average molecular weight: about 336)
  • -YL7175 Flexible epoxy resin (manufactured by Japan Epoxy Resin Co., Ltd., trade name "YL7175", weight average molecular weight: 1000 to 5000)
  • Curing agent, 2MAOK-PW 2,4-diamino-6- [2'-methylimidazolyl- (1')]-ethyl-s-triazine isocyanuric acid adduct (manufactured by Shikoku Chemicals Corporation
  • Example 1 Preparation of film-shaped adhesive 3.1 g of epoxy resin (“EP1032”: 2.4 g, “YL983”: 0.5 g, “YL7175”: 0.2 g), 0.1 g of curing agent “2MAOK” , 0.1 g (0.7 mmol) of glutaric acid, 1.9 g of filler (inorganic filler) (0.4 g of "SE2050", 0.4 g of "SE2050-SEJ", 1.1 g of "SM nanosilica”) , 0.3 g of organic filler (EXL-2655) and methyl ethyl ketone (amount having a solid content of 63% by mass) were charged in a container of a bead mill (Fritsch Japan Co., Ltd., planetary pulverizer P-7).
  • Beads having a diameter of 0.8 mm and beads having a diameter of 2.0 mm were added in the same weight as the total weight of the solid content and stirred for 30 minutes to obtain a mixture.
  • 1.7 g of phenoxy resin (ZX1356-2) was added to the container, and the mixture was stirred again with a bead mill for 30 minutes. Then, the beads used for stirring were removed by filtration to obtain a resin varnish.
  • the obtained resin varnish is coated on a base film (manufactured by Teijin Film Solution Co., Ltd., trade name "Purex A53") with a small precision coating device (manufactured by Yasui Seiki Co., Ltd.) to form a coating film. Formed. Then, this coating film was dried at 70 ° C. for 10 minutes using a clean oven (manufactured by ESPEC) to obtain a film-like adhesive (thickness 0.040 mm). The reaction start temperature of this film-like adhesive was 135 ° C.
  • the average value of the two measured values is used for the test piece. Recorded as gel time. If the higher of the two measurements is greater than 1.05 times the lower, the third measurement is performed and the average of the three measurements from the three measurements is the gel time of the test piece. Recorded as. The results are shown in Table 1.
  • a semiconductor device was manufactured as follows using the film-like adhesive prepared as described above. (Making a temporary crimping body) The produced film-shaped adhesive was cut out to prepare a film-shaped adhesive having a size of 8 mm ⁇ 8 mm ⁇ thickness 0.045 mm. This was attached to a semiconductor chip (10 mm ⁇ 10 mm), thickness 0.1 mm, connection metal: Au, product name: WALTS-TEG IP80, manufactured by WALTS).
  • a semiconductor chip with solder bumps (chip size: 7.3 mm x 7.3 mm x thickness 0.05 mm, solder bump melting point: about 220 ° C, bump height: about 45 ⁇ m in total of copper pillars and solder, number of bumps 1048 A pin, a pitch of 80 ⁇ m, and a product name: WALTS-TEG CC80, manufactured by WALTS) were attached to obtain a laminated body.
  • this laminate is placed on a stage at 80 ° C. of a flip-chip bonder (product name "FCB3", manufactured by Panasonic Corporation) having a stage and a crimping head, and is sandwiched between the stage and the crimping head by a hot press for 3 seconds.
  • the laminate was heated to 80 ° C. while being pressurized with a load of 25 N. In this way, a temporary pressure-bonded body was produced.
  • the temporary crimping body produced as described above was placed in the oven of a pressurized oven device (product name: PCOA-01T, manufactured by NTT-AT Creative Co., Ltd.). Then, first, the pressure in the oven was set to 0.7 MPa, and the temperature was raised from room temperature to 150 ° C. at a heating rate of 20 ° C./min. Then, while maintaining the pressure and temperature, the temporary pressure-bonded body was heated while being pressurized for 30 minutes in a pressurized atmosphere. In this way, a pressurized temporary pressure-bonded body was produced.
  • a pressurized oven device product name: PCOA-01T, manufactured by NTT-AT Creative Co., Ltd.
  • the pressurized temporary crimping body produced as described above is moved onto a stage at 80 ° C. of another flip-chip bonder (product name: FCB3, manufactured by Panasonic Corporation), and the stage and crimping head are loaded with 25 N.
  • a hot press was performed in which the pressed temporary crimping body was heated at 230 ° C. for 1 second while being pressurized. In this way, the semiconductor device was manufactured. This semiconductor device was used as a semiconductor device sample for evaluation.
  • Example 2 to 4 The semiconductor devices of Examples 2 to 4 were produced in the same manner as in Example 1 except that the composition of the adhesive used was changed as shown in Table 1 below.
  • Example 1 The film-like adhesive prepared in the same manner as in Example 1 was cut out, and a film-like adhesive having a size of 8 mm ⁇ 8 mm ⁇ thickness 0.045 mm was prepared. This was attached to a semiconductor chip (10 mm, thickness 0.1 mm, connection metal: Au, product name: WALTS-TEG IP80, manufactured by WALTS).
  • a semiconductor chip with solder bumps (chip size: 7.3 mm x 7.3 mm x thickness 0.05 mm, solder bump melting point: about 220 ° C, bump height: about 45 ⁇ m in total of copper pillars and solder, number of bumps 1048 A pin, pitch 80um, product name: WALTS-TEG CC80, manufactured by WALTS) was attached to obtain a laminated body.
  • the laminate is installed on the stage of a flip-chip bonder (FCB3, manufactured by Panasonic Corporation) having a stage and a crimping head, and the laminate is pressed with a load of 25N for 1 second by a hot press sandwiched between the stage and the crimping head. While heating to 80 ° C. In this way, a temporary pressure-bonded body was produced.
  • the temporary crimping body produced as described above is moved onto the stage of another flip-chip bonder (FCB3, manufactured by Panasonic Corporation) and sandwiched between the stage and the crimping head to pressurize at 230 ° C. with a load of 25N. A hot press was performed to heat the mixture for 3 seconds. In this way, the crimped body was produced.
  • FCB3 flip-chip bonder
  • the crimped body produced as described above was placed in the oven of a pressure oven device (product name: PCOA-01T, manufactured by NTT-AT Creative Co., Ltd.). Then, the pressure in the oven was first set to 0.7 MPa, and the temperature was raised from room temperature to 175 ° C. at a heating rate of 20 ° C./min. Then, the pressure-bonded body was heated while being pressurized for 10 minutes in a pressurized atmosphere while maintaining the pressure and temperature. In this way, the semiconductor device was manufactured. This semiconductor device was used as a semiconductor device sample for evaluation.
  • connection resistance value is within the optimum connection resistance value range (10.0 to 15.0 ⁇ in this example and comparative example) for the semiconductor chip in the evaluation semiconductor device sample.
  • B The connection resistance value is A. The connection resistance value is not measured because it is out of the range (10.0 to 15.0 ⁇ ) or due to a connection failure.
  • To check whether a connection failure has occurred in the evaluation semiconductor device sample check the cross section of the sample and solder. It was determined by confirming that the bumps were not wet, that is, the solder bumps of the semiconductor chip with the solder bumps did not reach the connection portion of the opposing semiconductor chips.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Die Bonding (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un dispositif à semi-conducteur dans lequel un premier et un second élément sont reliés par l'intermédiaire d'une couche adhésive, et des parties de liaison des premier et second éléments sont reliées l'une à l'autre. Le procédé de fabrication comprend : une étape de pré-collage au cours de laquelle les premier et second éléments sont pré-collés à l'aide d'un adhésif thermodurcissable pour former la couche adhésive, ce qui permet d'obtenir un corps pré-collé ; une étape de pressage de corps pré-collé au cours de laquelle le corps pré-collé est pressé dans une atmosphère sous pression, ce qui permet d'obtenir un corps pré-collé pressé ; et une étape de collage principale au cours de laquelle les premier et second éléments du corps pré-collé pressé sont collés, ce qui amène les parties de liaison de ceux-ci à être reliées l'une à l'autre, ce qui permet d'obtenir un corps collé. Lors de l'étape de pré-collage, le pré-collage des premier et second éléments est réalisé à une température inférieure au point de fusion des parties de liaison. Lors de l'étape de pressage de corps pré-collé, le pressage du corps pré-collé est réalisé à une température inférieure au point de fusion des parties de liaison. Lors de l'étape de collage principale, le chauffage du corps pré-collé pressé est réalisé à une température qui est au moins égale au point de fusion des parties de liaison.
PCT/JP2021/029407 2020-11-13 2021-08-06 Procédé de fabrication de dispositif à semi-conducteur, et adhésif utilisé dans ledit procédé WO2022102181A1 (fr)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008144021A (ja) * 2006-12-08 2008-06-26 Sekisui Chem Co Ltd 半導体チップ接合用接着剤
JP2016072400A (ja) * 2014-09-29 2016-05-09 積水化学工業株式会社 半導体装置の製造方法
WO2018194156A1 (fr) * 2017-04-21 2018-10-25 日立化成株式会社 Dispositif à semi-conducteur et son procédé de fabrication

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Publication number Priority date Publication date Assignee Title
CN111480218B (zh) 2017-12-18 2023-07-21 株式会社力森诺科 半导体装置、半导体装置的制造方法和粘接剂

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008144021A (ja) * 2006-12-08 2008-06-26 Sekisui Chem Co Ltd 半導体チップ接合用接着剤
JP2016072400A (ja) * 2014-09-29 2016-05-09 積水化学工業株式会社 半導体装置の製造方法
WO2018194156A1 (fr) * 2017-04-21 2018-10-25 日立化成株式会社 Dispositif à semi-conducteur et son procédé de fabrication

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