WO2022032756A1 - 源驱动芯片以及显示装置 - Google Patents
源驱动芯片以及显示装置 Download PDFInfo
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- WO2022032756A1 WO2022032756A1 PCT/CN2020/113203 CN2020113203W WO2022032756A1 WO 2022032756 A1 WO2022032756 A1 WO 2022032756A1 CN 2020113203 W CN2020113203 W CN 2020113203W WO 2022032756 A1 WO2022032756 A1 WO 2022032756A1
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- data line
- preset
- preset voltage
- switch element
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/041—Temperature compensation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
Definitions
- the present application relates to the field of display technology, and in particular, to a source driver chip and a display device.
- the efficiency of the source driver chip needs to be increased, so that the temperature of the source driver chip is relatively high, that is, the heat generation is relatively serious, so the source driver chip is easily damaged.
- Embodiments of the present application provide a source driver chip and a display device, which can reduce the temperature of the source driver chip and avoid damage to the source driver chip.
- An embodiment of the present application provides a source driver chip, which is applied to a display panel, where the display panel includes a plurality of first data lines and a plurality of second data lines, and the first data lines are used for inputting first data signals, the second data line is used for inputting a second data signal, the first data line and the second data line are alternately arranged, and the first data signal and the second data signal are not equal;
- the source driver chip includes:
- a first power supply module configured to provide a power supply voltage of a first voltage range
- a second power supply module configured to provide a power supply voltage of a second voltage range; the second voltage range and the first voltage range are symmetrical with respect to a preset reference voltage;
- a first pre-charging module for pre-charging the first data line to a first predetermined voltage and pre-charging the second data line when the voltage of the first data signal is greater than the predetermined reference voltage charging to a second preset voltage; when the voltage of the first data signal is less than the preset reference voltage, precharging the first data line to a second preset voltage and precharging the second data line charging to a first preset voltage; the first preset voltage is greater than the second preset voltage;
- a selection module for selecting one of the first power supply module and the second power supply module to be connected to the first data line according to the voltage of the first data signal; One of the first power supply module and the second power supply module is selected to be connected to the second data line to charge the first data line to a first preset target voltage and to charge the second data line to The second preset target voltage.
- the present invention also provides a display device comprising the above-mentioned source driver chip.
- the source driver chip and the display device include a first precharging module, configured to precharge the first data line to the first data line when the voltage of the first data signal is greater than the preset reference voltage a preset voltage and pre-charging the second data line to a second preset voltage; when the voltage of the first data signal is lower than the preset reference voltage, pre-charging the first data line to a second preset voltage two preset voltages and precharging the second data line to a first preset voltage; the first preset voltage is greater than the second preset voltage; therefore, the increase in the charging voltage is reduced, thereby reducing the The temperature of the source driver chip, so as to avoid damage to the source driver chip.
- FIG. 1 is a schematic structural diagram of a conventional source driver chip.
- FIG. 2 is a timing diagram of one of the signals in the conventional source driver chip.
- FIG. 3 is a schematic structural diagram of a source driver chip according to an embodiment of the present application.
- FIG. 4 is a timing diagram of one of the signals in the source driver chip in FIG. 3 .
- FIG. 5 is a schematic structural diagram of a source driver chip according to another embodiment of the present application.
- FIG. 6 is a timing diagram of one of the signals in the source driver chip in FIG. 5 .
- FIG. 7 is a schematic structural diagram of a source driver chip according to another embodiment of the present application.
- FIG. 8 is a timing diagram of one of the signals in the source driver chip in FIG. 7 .
- first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more of said features. In the description of the present application, “plurality” means two or more, unless otherwise expressly and specifically defined.
- the terms “installed”, “connected” and “connected” should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
- installed should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
- a first feature "on” or “under” a second feature may include direct contact between the first and second features, or may include the first and second features Not directly but through additional features between them.
- the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
- the first feature is “below”, “below” and “below” the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
- an existing source driver chip is applied to a display panel, and the display panel includes a plurality of first data lines 11 and a plurality of second data lines 12 , and the first data lines 11 are used to input the first data lines 11 .
- a data signal, the second data line 12 is used for inputting a second data signal, the first data line 11 and the second data line 12 are alternately arranged, the first data signal and the second data signal Range, the source driver chip includes:
- the first power supply module 13 is used to provide a power supply voltage of a first voltage range; the first power supply module 13 is connected to first preset pixel data, and the power supply voltage of the first voltage range is obtained according to the first pixel data.
- the second power supply module 14 is configured to provide a power supply voltage of a second voltage range; the first voltage range is, for example, 8 to 16V, and the second voltage range is, for example, 0 to 8V.
- the second power module 14 accesses the second preset pixel data.
- the power supply voltage of the second voltage range is obtained according to the second pixel data.
- the selection module 30 includes a first switch K9', a second switch K10', a third switch K11', and a fourth switch K12', wherein both ends of the first switch K9' and the second switch K10' are connected to the first power module
- the output end of 13 is connected, and the other end of the first switch K9 ′ is connected to the first data line 11 .
- the other end of the second switch K10 ′ is connected to the second data line 12 .
- Both ends of the third switch K11 ′ and the fourth switch K12 are connected to the output end of the second power module 14 , and the other end of the third switch K11 ′ is connected to the first data line 11 .
- the other end of the fourth switch K12 ′ is connected to the second data line 12 .
- K9' and K12' are turned on, and K10' and K11' are turned off, so that the brightness of the pixel corresponding to the first data line is greater than that of the second data line The brightness of the pixel corresponding to the line.
- K10' and K11' are closed, and K9' and K12' are open, so that the brightness of the pixel corresponding to the first data line is smaller than that of the second data line The brightness of the pixel corresponding to the line.
- TP represents a touch signal
- S1 represents a data signal input from the first data line 11
- S2 represents a data signal input from the second data line 12 .
- the first data line 11 needs to rise from 8V to 16V during the charging process
- the second data line 12 needs to rise from 8V to 0V during the charging process, thus increasing the charging efficiency of the source driver chip.
- FIG. 3 is a schematic structural diagram of a source driver chip according to an embodiment of the present application.
- the source driver chip 100 of this embodiment is applied to a display panel, and the display panel includes a plurality of first data lines 11 and a plurality of second data lines 12 , and the first data lines 11 are used for The first data signal is input, the second data line 12 is used for inputting the second data signal, the first data line 11 and the second data line 12 are alternately arranged, the first data signal and the second data signal Data signals are not equal.
- the source driver chip 100 includes: a first power supply module 21 , a second power supply module 22 , a selection module 30 and a first precharging module 40 .
- the first power module 21 is used to provide a power supply voltage of a first voltage range
- the second power supply module 22 is configured to provide a power supply voltage of a second voltage range; the second voltage range and the first voltage range are symmetrical with respect to a preset reference voltage; in one embodiment, the first voltage range is, for example, 8 To 16V, the second voltage range is for example 0 to 8V, and the preset reference voltage is 8V.
- the first voltage range and the second voltage range are not limited to this, and can be set according to requirements.
- the selection module 30 is configured to select one of the first power supply module 21 and the second power supply module 22 to be connected to the first data line 11 according to the voltage of the first data signal; and according to the voltage of the second data signal Select another power supply module from the first power supply module 21 and the second power supply module 22 to be connected to the second data line 12; to charge the first data line to a first preset target voltage and to charge the first data line
- the second data line is charged to a second predetermined target voltage.
- the first preset target voltage is the maximum value of the voltage of the first data signal
- the second preset target voltage is the maximum value of the voltage of the second data signal.
- the selection module 30 includes a ninth switch element K9, a tenth switch element K10, an eleventh switch element K11 and a twelfth switch element K12;
- the input terminal of the ninth switch element K9 and the input terminal of the tenth switch element K10 are both connected to the first power supply module 21, and the control terminal of the ninth switch element K9 is connected to the first data signal , the output end of the ninth switching element K9 is connected to the first data line 11;
- the control terminals of the tenth switch element K10 are all connected to the second data signal, and the output terminal of the tenth switch element K10 is connected to the second data line 12 ;
- the input terminal of the eleventh switch element K11 and the input terminal of the twelfth switch element K12 are both connected to the second power module 22, and the control terminal of the eleventh switch element K11 is connected to the first data signal; the control terminal of the twelfth switch element K12 is connected to the second data signal, the output terminal of the eleventh switch element K11 is connected to the first data line 11; the twelfth switch element The output end of K12 is connected to the second data line 12 .
- the first precharging module 40 is configured to precharge the first data line 11 to a first predetermined voltage V1 and to charge the second data line 11 to a first predetermined voltage V1 when the voltage of the first data signal is greater than the predetermined reference voltage.
- the line 12 is precharged to the second preset voltage V2; when the voltage of the first data signal is less than the preset reference voltage, the first data line 11 is precharged to the second preset voltage V2 and all
- the second data line 12 is precharged to a first predetermined voltage V1; the first predetermined voltage V1 is greater than the second predetermined voltage V2.
- the first precharging module 40 includes a first precharging unit 41 and a second precharging unit 42;
- the first precharging unit 41 is used for precharging the first data line 11 to a first predetermined voltage V1 and precharging the second data line 12 to a first predetermined voltage V1 under the control of the first control signal S5.
- Two preset voltages V2, the first control signal S5 is generated according to the difference between the voltage of the first data signal and the preset reference voltage;
- the second precharging unit 42 is used for precharging the first data line 11 to the second predetermined voltage V2 and precharging the second data line 12 to the second predetermined voltage V2 under the control of the second control signal S6.
- a preset voltage V1 the second control signal S6 is generated according to the difference between the voltage of the second data signal and the preset reference voltage; the first control signal S5 and the second control signal S6 are The level is opposite.
- the first precharging unit 41 includes a first switching element K1 and a second switching element K2;
- the input terminal of the first switching element K1 is connected to the first preset voltage V1; the output terminal of the first switching element K1 is connected to the first data line 11; the first switching element K1 and the The control terminals of the second switching element K2 are all connected to the first control signal S5;
- the input end of the second switch element K2 is connected to the second preset voltage V2 ; the output end of the second switch element K2 is connected to the second data line 12 .
- the second precharging unit 42 includes a third switching element K3 and a fourth switching element K4;
- the input terminal of the third switching element K3 is connected to the second preset voltage V2, and the control terminal of the third switching element K3 and the control terminal of the fourth switching element K4 are both connected to the second control terminal Signal S6; the output end of the third switching element K3 is connected to the first data line 11;
- the input end of the fourth switch element K4 is connected to the first preset voltage V1, and the output end of the fourth switch element K4 is connected to the second data line 12.
- the first control signal S5 is at an active level; the second control signal S6 is an invalid level;
- the second control signal S6 When the voltage of the second data signal is greater than the preset reference voltage, the second control signal S6 is at an active level; the first control signal S5 is at an inactive level.
- An active level is a level at which the switching element is turned on, and an inactive level is a level at which the switching element is turned off. That is, when the voltage of the first data signal is greater than the voltage of the second data signal, the first switching element K1 and the second switching element K2 are closed, and the third switching element K3 and the first switching element K3 are closed.
- Four switching elements K4 are turned off; when the voltage of the first data signal is lower than the voltage of the second data signal, the first switching element K1 and the second switching element K2 are turned off, and the third switch The element K3 and the fourth switching element K4 are closed.
- the voltage of the first data signal is greater than the preset reference voltage, the first preset target voltage is 16V, and the second preset target voltage is 8V as an example, as shown in FIG. 4 , S3 represents the first data signal, S4 represents the second data signal.
- the first control signal S5 is at an active level, the first switching element K1 and the second switching element K2 are closed, the third switching element K3 and the fourth switching element K4 disconnect.
- the first data line 11 needs to rise from 8V to V1 during the charging process, and then rise from V1 to 16V, and during the falling process, it drops from 16V to V1, and then from V1 to 8V.
- the first preset voltage V1 is 3/4 or 1/4 of the highest voltage of the first data signal and the second data signal. That is, the first preset voltage is within the first voltage range.
- the second data line 12 rises from 0V to V2, and then rises from V2 to 8V. During the falling process, it needs to drop from 8V to V2, and then from V2 to 0V; the increase in the charging voltage is reduced, Thus, the temperature of the source driver chip is lowered, and damage to the source driver chip is avoided.
- the second preset voltage V2 is 1/4 or 8/1 of the highest voltage of the second data signal. The second preset voltage is within the first voltage range.
- the second preset voltage V2 is 1/4 of the highest voltage of the second data signal.
- the first preset voltage is 1/4 of the highest voltage of the first data signal
- the second preset voltage V2 is the highest voltage of the first data signal and the second data signal 1/8 of .
- the magnitudes of the first preset voltage and the second preset voltage are not limited thereto.
- the highest voltage in the first data signal and the second data signal is, for example, 16V.
- the second control signal S6 when the voltage of the first data signal is lower than the preset reference voltage, when the rising edge of the touch signal arrives, the second control signal S6 is at an active level, and the first switching element K1 and the second control signal S6 are at an active level.
- the switching element K2 is turned off, and the third switching element K3 and the fourth switching element K4 are turned on.
- the switching element is not limited to the switch shown in FIG. 3 , but may also be other elements such as thin film transistors, and the specific working process is similar to this, and will not be repeated here.
- the structure of the first precharging module is not limited to this.
- FIG. 5 is a schematic structural diagram of a source driver chip according to another embodiment of the present application.
- the difference between the source driver chip of this embodiment and the previous embodiment is that the source driver chip 100 of this embodiment further includes: a second precharging module 50 .
- the second precharging module 50 is configured to charge the first data line 11 from the first preset voltage V1 to the third when the voltage of the first data signal is greater than the preset reference voltage a preset voltage V3 and charging the second data line 12 from the second preset voltage V2 to the fourth preset voltage V4;
- the first data line 11 is charged from the second preset voltage V2 to the fourth preset voltage V4 and the second data line 11 is charged
- Line 12 is charged from the first preset voltage V1 to the third preset voltage V3; wherein the third preset voltage V3 is greater than the first preset voltage V1, and the fourth preset voltage V4 is greater than The second preset voltage V2 and the fourth preset voltage V4 are smaller than the third preset voltage V3.
- the second precharging module 50 includes a third precharging unit 51 and a fourth precharging unit 52;
- the third pre-charging unit 51 is used for charging the first data line from the first predetermined voltage V1 to the third predetermined voltage V3 and charging the first data line under the control of the first control signal S5.
- the second data line is charged from the second preset voltage V2 to the fourth preset voltage V4;
- the fourth pre-charging unit 52 is configured to charge the first data line 12 from the second predetermined voltage V2 to the fourth predetermined voltage V4 under the control of the second control signal S6
- the second data line 12 is charged from the first predetermined voltage V1 to the third predetermined voltage V3.
- the third precharging unit 51 may include a fifth switching element K5 and a sixth switching element K6.
- the input end of the fifth switch element K5 is connected to the third preset voltage V3; the output end of the fifth switch element K5 is connected to the first data line 11; the fifth switch element K5 and the The control terminals of the sixth switching element K6 are all connected to the first control signal S5;
- the input terminal of the sixth switching element K6 is connected to the fourth preset voltage V4 ; the output terminal of the sixth switching element K6 is connected to the second data line 12 .
- the fourth precharging unit 52 may include a seventh switch element K7 and an eighth switch element K8;
- the input terminal of the seventh switching element K7 is connected to the fourth preset voltage V4, and the control terminal of the seventh switching element K7 and the control terminal of the eighth switching element K8 are both connected to the second control terminal Signal S6; the output end of the seventh switch element K7 is connected to the first data line 11;
- the input terminal of the eighth switch element K8 is connected to the third preset voltage V3 , and the output terminal of the eighth switch element K8 is connected to the second data line 12 .
- the voltage of the first data signal is greater than the preset reference voltage, the first preset target voltage is 16V, and the second preset target voltage is 8V as an example, as shown in FIG. 6 , S7 represents the first data signal, S8 represents the second data signal.
- the first control signal S5 is at an active level, the first switch element K1, the second switch element K2, the fifth switch element K5 and the sixth switch element K6 are closed, and the first switch element K1, the second switch element K2, the fifth switch element K5 and the sixth switch element K6 are closed.
- the three switching elements K3, the fourth switching element K4, the seventh switching element K7 and the eighth switching element K8 are turned off. It can be seen from FIG.
- the first data line 11 needs to rise from 8V to V1 during the charging process , and then rise from V1 to V3, and then charge from V3 to 16V, or drop from 16V to V3 in the process of falling, then drop from V3 to V1, and then drop from V1 to 8V.
- the third preset voltage V3 is 5/8 of the highest voltage of the first data signal and the second data signal.
- the second data line 12 rises from 0V to V2 during the charging process, then rises from V2 to V4, and then rises from V4 to 8V. During the falling process, it needs to drop from 8V to V4, then from V4 to V2, and then from V2 Dropping to 0V further reduces the increase in the charging voltage, thereby further reducing the temperature of the source driver chip and avoiding damage to the source driver chip.
- the fourth preset voltage V4 is 3/8 of the highest voltage of the first data signal and the second data signal. The magnitudes of the third preset voltage and the fourth preset voltage are not limited thereto.
- the switching element is not limited to the switch shown in FIG. 5 , and may be other elements such as thin film transistors.
- the structure of the second precharging module is not limited to this.
- FIG. 7 is a schematic structural diagram of a source driver chip provided by yet another embodiment of the present application.
- the difference between the source driver chip of this embodiment and the previous embodiment is that the source driver chip 100 of this embodiment further includes: a third precharging module 60 .
- the third precharging module 60 includes a fifth precharging unit 61 and a sixth precharging unit 62;
- the fifth precharging unit 61 is used for charging the first data line 11 from the third preset voltage to the fifth preset voltage and charging the first data line 11 from the third preset voltage to the fifth preset voltage under the control of the first control signal S5. Two data lines are charged from the fourth preset voltage to the sixth preset voltage;
- the fourth precharging unit 62 is configured to charge the first data line from the fourth preset voltage to the sixth preset voltage and charge the second data line under the control of the second control signal.
- the line is charged from the third preset voltage to the fifth preset voltage.
- the fifth precharging unit 61 may include a thirteenth switching element K13 and a fourteenth switching element K14;
- the input end of the thirteenth switching element K13 is connected to the fifth preset voltage V5; the output end of the thirteenth switching element K13 is connected to the first data line 11; the thirteenth switching element The control terminals of K13 and the fourteenth switching element K14 are both connected to the first control signal S5;
- the input terminal of the fourteenth switching element K14 is connected to the sixth preset voltage V6 ; the output terminal of the fourteenth switching element K14 is connected to the second data line 12 .
- the sixth precharging unit 62 includes a fifteenth switching element K15 and a sixteenth switching element K16;
- the input terminal of the fifteenth switching element K15 is connected to the sixth preset voltage V6, and the control terminal of the fifteenth switching element K15 and the control terminal of the sixteenth switching element K16 are both connected to the the second control signal S6; the output end of the fifteenth switching element K15 is connected to the first data line 11;
- the input terminal of the sixteenth switching element K16 is connected to the fifth preset voltage V5 , and the output terminal of the sixteenth switching element K16 is connected to the second data line 12 .
- the fifth preset voltage V5 is greater than the third preset voltage V3, the sixth preset voltage V6 is greater than the fourth preset voltage V4, and the sixth preset voltage V6 is less than the fifth preset voltage V6 The preset voltage V5.
- S9 represents the first data signal
- S10 represents the second data signal.
- the first control signal S5 is at an active level
- the three switching elements K13 and the fourteenth switching element K14 are closed; the third switching element K3, the fourth switching element K4, the seventh switching element K7, the eighth switching element K8, the fifteenth switching element K15 and the sixteenth switching element K16 disconnect. It can be seen from FIG.
- the first data line 11 needs to rise from 8V to V1 during the charging process, then rise from V1 to V3, then rise from V3 to V5, and then charge from V5 to 16V, or decrease In the process, it drops from 16V to V5, then from V5 to V3, then from V3 to V1, and then from V3 to 8V.
- the fifth preset voltage V5 is 7/8 of the highest voltage of the first data signal and the second data signal.
- the second data line 12 rises from 0V to V2 during the charging process, then rises from V2 to V4, then rises from V4 to V6, and then rises from V6 to 8V. During the falling process, it needs to drop from 8V to V6, and then from V6 Drop to V4, then drop from V4 to V2, and then drop from V2 to 0V, thereby further reducing the temperature of the source driver chip and avoiding damage to the source driver chip.
- the sixth preset voltage V6 is 6/8 of the highest voltage of the second data signal. The magnitudes of the fifth preset voltage and the sixth preset voltage are not limited thereto.
- the switching element is not limited to the switch shown in FIG. 7 , and may be other elements such as thin film transistors.
- An embodiment of the present application further provides a display device.
- the display device includes any one of the above-mentioned source driver chips.
- the source driver chip can also be integrated in the display panel.
- the display devices include but are not limited to display panels, mobile phones, tablet computers, computer monitors, display screens, game consoles, televisions, wearable devices, and other household appliances or household appliances with display functions.
- FIG. 1 to FIG. 8 only provide an example, and do not limit the present invention.
- the source driver chip and the display device include a first precharging module, configured to precharge the first data line to the first data line when the voltage of the first data signal is greater than the preset reference voltage a preset voltage and pre-charging the second data line to a second preset voltage; when the voltage of the first data signal is lower than the preset reference voltage, pre-charging the first data line to a second preset voltage two preset voltages and precharging the second data line to a first preset voltage; the first preset voltage is greater than the second preset voltage; therefore, the increase in the charging voltage is reduced, thereby reducing the The temperature of the source driver chip, so as to avoid damage to the source driver chip.
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Abstract
一种源驱动芯片(100)以及显示装置,其中,源驱动芯片(100)包括第一预充电模块(40),用于当第一数据信号的电压大于预设参考电压时,将第一数据线(11)预充电至第一预设电压以及将第二数据线(12)预充电至第二预设电压。
Description
本申请涉及显示技术领域,具体涉及一种源驱动芯片以及显示装置。
随着液晶显示面板的尺寸也越来大,尺寸越大面内内阻压降(RC loading)也越大。
为了保证充电效果,需要增大源驱动芯片的效率,进而使得源驱动芯片的温度较高,也即发热比较严重,因此容易损坏源驱动芯片。
本申请实施例提供一种源驱动芯片以及显示装置,能够降低源驱动芯片的温度,避免损坏源驱动芯片。
本申请实施例提供一种源驱动芯片,应用于显示面板中,所述显示面板包括多条第一数据线和多条第二数据线,所述第一数据线用于输入第一数据信号,所述第二数据线用于输入第二数据信号,所述第一数据线和所述第二数据线交错设置,所述第一数据信号和所述第二数据信号不等;
所述源驱动芯片包括:
第一电源模块,用于提供第一电压范围的电源电压;
第二电源模块,用于提供第二电压范围的电源电压;所述第二电压范围与所述第一电压范围相对于预设参考电压对称;
第一预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线预充电至第一预设电压以及将所述第二数据线预充电至第二预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线预充电至第二预设电压以及将所述第二数据线预充电至第一预设电压;所述第一预设电压大于所述第二预设电压;
选择模块,用于根据第一数据信号的电压在所述第一电源模块和第二电源模块中选择其中一个电源模块与所述第一数据线连接;以及根据第二数据信号的电压在所述第一电源模块和第二电源模块中选择另外一个电源模块与所述第二数据线连接,以将所述第一数据线充电至第一预设目标电压和将所述第二数据线充电至第二预设目标电压。
本发明还提供一种显示装置,其包括上述源驱动芯片。
本申请实施例的源驱动芯片以及显示装置,包括第一预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线预充电至第一预设电压以及将所述第二数据线预充电至第二预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线预充电至第二预设电压以及将所述第二数据线预充电至第一预设电压;所述第一预设电压大于所述第二预设电压;因此减小了充电电压的增长幅度,从而降低了源驱动芯片的温度,进而避免源驱动芯片受损。
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有的源驱动芯片的结构示意图。
图2为现有的源驱动芯片中各信号的其中一种时序示意图。
图3为本申请一实施例提供的源驱动芯片的结构示意图。
图4为图3中的源驱动芯片中各信号的其中一种时序示意图。
图5为本申请另一实施例提供的源驱动芯片的结构示意图。
图6为图5中的源驱动芯片中各信号的其中一种时序示意图。
图7为本申请又一实施例提供的源驱动芯片的结构示意图。
图8为图7中的源驱动芯片中各信号的其中一种时序示意图。
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
在本申请的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接或可以相互通讯;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中,除非另有明确的规定和限定,第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触,也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且,第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方,或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开,下文中对特定例子的部件和设置进行描述。当然,它们仅仅为示例,并且目的不在于限制本申请。此外,本申请可以在不同例子中重复参考数字和/或参考字母,这种重复是为了简化和清楚的目的,其本身不指示所讨论各种实施方式和/或设置之间的关系。此外,本申请提供了的各种特定的工艺和材料的例子,但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
如图1所示,现有的源驱动芯片应用于显示面板中,所述显示面板包括多条第一数据线11和多条第二数据线12,所述第一数据线11用于输入第一数据信号,所述第二数据线12用于输入第二数据信号,所述第一数据线11和所述第二数据线12交错设置,所述第一数据信号和所述第二数据信号不等,该源驱动芯片包括:
第一电源模块13用于提供第一电压范围的电源电压;第一电源模块13接入第一预设像素数据,该第一电压范围的电源电压根据所述第一像素数据得到。
第二电源模块14用于提供第二电压范围的电源电压;第一电压范围比如为8至16V,第二电压范围比如为0至8V。第二电源模块14接入第二预设像素数据。该第二电压范围的电源电压根据所述第二像素数据得到。
选择模块30包括第一开关K9'、第二开关K10'、第三开关K11'、第四开关K12',其中第一开关K9'和第二开关K10'的一端均与所述第一电源模块13的输出端连接,第一开关K9'的另一端与所述第一数据线11连接。第二开关K10'的另一端与所述第二数据线12连接。
第三开关K11'和第四开关K12的一端均与所述第二电源模块14的输出端连接,第三开关K11'另一端与所述第一数据线11连接。第四开关K12'的另一端与所述第二数据线12连接。
当所述第一数据信号的电压大于所述第二数据信号的电压时,K9'和K12'闭合,K10'和K11'断开,从而使得第一数据线对应的像素的亮度大于第二数据线对应的像素的亮度。当所述第二数据信号的电压大于所述第一数据信号的电压时,K10'和K11'闭合,K9'和K12'断开,从而使得第一数据线对应的像素的亮度小于第二数据线对应的像素的亮度。
如图2所示,TP表示触控信号,S1表示第一数据线11输入的数据信号,S2表示第二数据线12输入的数据信号。通常情况下第一数据线11在充电过程中需要从8V上升到16V,第二数据线12在充电过程中需要从8V上升到0V,因此增大了源驱动芯片的充电效率。
请参照图3至图4,图3为本申请一实施例提供的源驱动芯片的结构示意图。
如图3所示,本实施例的源驱动芯片100应用于显示面板中,所述显示面板包括多条第一数据线11和多条第二数据线12,所述第一数据线11用于输入第一数据信号,所述第二数据线12用于输入第二数据信号,所述第一数据线11和所述第二数据线12交错设置,所述第一数据信号和所述第二数据信号不等。
所述源驱动芯片100包括:第一电源模块21、第二电源模块22、选择模块30以及第一预充电模块40。
第一电源模块21用于提供第一电压范围的电源电压;
第二电源模块22用于提供第二电压范围的电源电压;所述第二电压范围与所述第一电压范围相对于预设参考电压对称;在一实施方式中,第一电压范围比如为8至16V,第二电压范围比如为0至8V,预设参考电压为8V,当然可以理解的,第一电压范围和第二电压范围不限于此,具体可以根据需求设置。
选择模块30用于根据第一数据信号的电压在所述第一电源模块21和第二电源模块22中选择其中一个电源模块与所述第一数据线11连接;以及根据第二数据信号的电压在所述第一电源模块21和第二电源模块22中选择另外一个电源模块与所述第二数据线12连接;以将所述第一数据线充电至第一预设目标电压和将所述第二数据线充电至第二预设目标电压。第一预设目标电压为所述第一数据信号的电压的最大值,第二预设目标电压为所述第二数据信号的电压的最大值。以第一数据信号的电压大于第二数据信号的电压为例,第一预设目标电压为16V,第二预设目标电压为8V。在一实施方式中,所述选择模块30包括第九开关元件K9、第十开关元件K10、第十一开关元件K11以及第十二开关元件K12;
所述第九开关元件K9的输入端和所述第十开关元件K10的输入端均与所述第一电源模块21连接,所述第九开关元件K9的控制端接入所述第一数据信号,所述第九开关元件K9的输出端与所述第一数据线11连接;
所述第十开关元件K10的控制端均接入第二数据信号,所述第十开关元件K10的输出端与所述第二数据线12连接;
所述第十一开关元件K11的输入端和所述第十二开关元件K12的输入端均与所述第二电源模块22连接,所述第十一开关元件K11的控制端接入第一数据信号;所述第十二开关元件K12的控制端接入所述第二数据信号,所述第十一开关元件K11的输出端与所述第一数据线11连接;所述第十二开关元件K12的输出端与所述第二数据线12连接。
第一预充电模块40用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线11预充电至第一预设电压V1以及将所述第二数据线12预充电至第二预设电压V2;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线11预充电至第二预设电压V2和将所述第二数据线12预充电至第一预设电压V1;所述第一预设电压V1大于所述第二预设电压V2。
在一实施方式中,为了进一步降低芯片的温度,所述第一预充电模块40包括第一预充单元41和第二预充单元42;
所述第一预充单元41用于在第一控制信号S5的控制下,将所述第一数据线11预充电至第一预设电压V1以及将所述第二数据线12预充电至第二预设电压V2,所述第一控制信号S5根据所述第一数据信号的电压和预设参考电压之间的差值生成;
所述第二预充单元42用于在第二控制信号S6的控制下,将所述第一数据线11预充电至第二预设电压V2以及将所述第二数据线12预充电至第一预设电压V1,所述第二控制信号S6根据所述第二数据信号的电压和预设参考电压之间的差值生成;所述第一控制信号S5和所述第二控制信号S6的电平相反。
在一实施方式中,为了进一步降低芯片的温度,所述第一预充单元41包括第一开关元件K1和第二开关元件K2;
所述第一开关元件K1的输入端接入所述第一预设电压V1;所述第一开关元件K1的输出端与所述第一数据线11连接;所述第一开关元件K1和所述第二开关元件K2的控制端均接入所述第一控制信号S5;
所述第二开关元件K2的输入端接入所述第二预设电压V2;所述第二开关元件K2的输出端与所述第二数据线12连接。
在一实施方式中,为了进一步降低芯片的温度,所述第二预充单元42包括第三开关元件K3以及第四开关元件K4;
所述第三开关元件K3的输入端接入所述第二预设电压V2,所述第三开关元件K3的控制端和所述第四开关元件K4的控制端均接入所述第二控制信号S6;所述第三开关元件K3的输出端与所述第一数据线11连接;
所述第四开关元件K4的输入端接入所述第一预设电压V1,所述第四开关元件K4的输出端与所述第二数据线12连接.
在一实施方式中,为了进一步降低芯片的温度,当所述第一数据信号的电压大于所述预设参考电压时,所述第一控制信号S5为有效电平;所述第二控制信号S6为无效电平;
当所述第二数据信号的电压大于所述预设参考电压时,所述第二控制信号S6为有效电平;所述第一控制信号S5为无效电平。有效电平也即为使开关元件闭合的电平,无效电平也即使开关元件断开的电平。也即当所述第一数据信号的电压大于所述第二数据信号的电压时,所述第一开关元件K1和所述第二开关元件K2闭合,所述第三开关元件K3和所述第四开关元件K4断开;当所述第一数据信号的电压小于所述第二数据信号的电压时,所述第一开关元件K1和所述第二开关元件K2断开,所述第三开关元件K3和所述第四开关元件K4闭合。
在一实施方式中,以第一数据信号的电压大于预设参考电压,第一预设目标电压为16V,第二预设目标电压为8V为例,如图4所示,S3表示第一数据信号,S4表示第二数据信号。当触控信号的上升沿到来时,第一控制信号S5为有效电平,所述第一开关元件K1和第二开关元件K2闭合,所述第三开关元件K3和所述第四开关元件K4断开。
从图4可以看出,通常情况下第一数据线11在充电过程中需要从8V上升到V1,再从V1上升到16V,且在下降过程中,从16V降到V1,再从V1降到8V。在一实施方式中,所述第一预设电压V1为所述第一数据信号和所述第二数据信号中的最高电压的3/4或者1/4。也即所述第一预设电压位于所述第一电压范围内。
第二数据线12在充电过程中,从0V上升到V2,再从V2上升到8V,在下降过程中需要从8V降到V2,再从V2降到0V;减小了充电电压的增长幅度,从而降低了源驱动芯片的温度,避免源驱动芯片受损。在一实施方式中,所述第二预设电压V2为所述第二数据信号的最高电压的1/4或者8/1。所述第二预设电压位于所述第一电压范围内。
当所述第一预设电压为所述第一数据信号的最高电压的3/4时,所述第二预设电压V2为所述第二数据信号的最高电压的1/4。当所述第一预设电压为所述第一数据信号的最高电压的1/4时,所述第二预设电压V2为所述第一数据信号和所述第二数据信号中的最高电压的1/8。第一预设电压和第二预设电压的大小不限于此。所述第一数据信号和所述第二数据信号中的最高电压比如为16V。
可以理解的,当第一数据信号的电压小于预设参考电压时,当触控信号的上升沿到来时,所述第二控制信号S6为有效电平,所述第一开关元件K1和第二开关元件K2断开,所述第三开关元件K3和所述第四开关元件K4闭合。开关元件不限于图3中的开关,还可为薄膜晶体管等其他元件,具体工作过程与此类似,在此不再赘述。
当然可以理解的,第一预充电模块的结构不限于此。
请参照图5至图6,图5为本申请另一实施例提供的源驱动芯片的结构示意图。
如图5所示,本实施例的源驱动芯片与上一实施例的区别在于:本实施例的源驱动芯片100还包括:第二预充电模块50。
所述第二预充电模块50,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线11从所述第一预设电压V1充电至第三预设电压V3以及将所述第二数据线12从所述第二预设电压V2充电至所述第四预设电压V4;
当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线11从所述第二预设电压V2充电至第四预设电压V4以及将所述第二数据线12从所述第一预设电压V1充电至所述第三预设电压V3;其中所述第三预设电压V3大于所述第一预设电压V1,所述第四预设电压V4大于所述第二预设电压V2,所述第四预设电压V4小于所述第三预设电压V3。
所述第二预充电模块50包括第三预充单元51和第四预充单元52;
所述第三预充单元51用于在所述第一控制信号S5的控制下,将所述第一数据线从所述第一预设电压V1充电至第三预设电压V3以及将所述第二数据线从所述第二预设电压V2充电至所述第四预设电压V4;
所述第四预充单元52用于在所述第二控制信号S6的控制下,将所述第一数据线12从所述第二预设电压V2充电至第四预设电压V4以及将所述第二数据线12从所述第一预设电压V1充电至所述第三预设电压V3。
在一实施方式中,所述第三预充单元51可包括第五开关元件K5和第六开关元件K6。
所述第五开关元件K5的输入端接入所述第三预设电压V3;所述第五开关元件K5的输出端与所述第一数据线11连接;所述第五开关元件K5和所述第六开关元件K6的控制端均接入所述第一控制信号S5;
所述第六开关元件K6的输入端接入所述第四预设电压V4;所述第六开关元件K6的输出端与所述第二数据线12连接。
在一实施方式中,所述第四预充单元52可包括第七开关元件K7以及第八开关元件K8;
所述第七开关元件K7的输入端接入所述第四预设电压V4,所述第七开关元件K7的控制端和所述第八开关元件K8的控制端均接入所述第二控制信号S6;所述第七开关元件K7的输出端与所述第一数据线11连接;
所述第八开关元件K8的输入端接入所述第三预设电压V3,所述第八开关元件K8的输出端与所述第二数据线12连接。
在一实施方式中,以第一数据信号的电压大于预设参考电压,第一预设目标电压为16V,第二预设目标电压为8V为例,如图6所示,S7表示第一数据信号,S8表示第二数据信号。当触控信号的上升沿到来时,第一控制信号S5为有效电平,所述第一开关元件K1、所述第二开关元件K2、第五开关元件K5以及第六开关元件K6闭合,第三开关元件K3、第四开关元件K4、第七开关元件K7以及第八开关元件K8断开,从图6可以看出,通常情况下第一数据线11在充电过程中需要从8V上升到V1,再从V1上升到V3,再从V3充到16V,或者在下降过程中从16V降到V3,再从V3降到V1,再从V1降到8V。在一实施方式中,所述第三预设电压V3为所述第一数据信号和所述第二数据信号中的最高电压的5/8。
第二数据线12在充电过程中从0V上升到V2,再从V2上升到V4,再从V4上升到8V,在下降过程中需要从8V降到V4,再从V4降到V2,再从V2降到0V,进一步减小了充电电压的增长幅度,从而进一步降低了源驱动芯片的温度,避免源驱动芯片受损。在一实施方式中,所述第四预设电压V4为所述第一数据信号和所述第二数据信号中的最高电压的3/8。第三预设电压和第四预设电压的大小不限于此。
可以理解的,当第一数据信号S7的电压小于所述第二数据信号S8的电压时,当触控信号的上升沿到来时,所述第一开关元件K1、所述第二开关元件K2、第五开关元件K5以及第六开关元件K6断开,第三开关元件K3、第四开关元件K4、第七开关元件K7以及第八开关元件K8闭合。开关元件不限于图5所示的开关,还可为薄膜晶体管等其他元件。
当然可以理解的,第二预充电模块的结构不限于此。
请参照图7至图8,图7为本申请又一实施例提供的源驱动芯片的结构示意图。
如图7所示,本实施例的源驱动芯片与上一实施例的区别在于:本实施例的源驱动芯片100还包括:第三预充电模块60。
所述第三预充电模块60包括第五预充单元61和第六预充单元62;
所述第五预充单元61用于在所述第一控制信号S5的控制下,将所述第一数据线11从所述第三预设电压充电至第五预设电压以及将所述第二数据线从所述第四预设电压充电至所述第六预设电压;
所述第四预充单元62用于在所述第二控制信号的控制下,将所述第一数据线从所述第四预设电压充电至第六预设电压以及将所述第二数据线从所述第三预设电压充电至所述第五预设电压。
在一实施方式中,所述第五预充单元61可包括第十三开关元件K13和第十四开关元件K14;
所述第十三开关元件K13的输入端接入所述第五预设电压V5;所述第十三开关元件K13的输出端与所述第一数据线11连接;所述第十三开关元件K13和所述第十四开关元件K14的控制端均接入所述第一控制信号S5;
所述第十四开关元件K14的输入端接入所述第六预设电压V6;所述第十四开关元件K14的输出端与所述第二数据线12连接。
所述第六预充单元62包括第十五开关元件K15以及第十六开关元件K16;
所述第十五开关元件K15的输入端接入所述第六预设电压V6,所述第十五开关元件K15的控制端和所述第十六开关元件K16的控制端均接入所述第二控制信号S6;所述第十五开关元件K15的输出端与所述第一数据线11连接;
所述第十六开关元件K16的输入端接入所述第五预设电压V5,所述第十六开关元件K16的输出端与所述第二数据线12连接。
其中所述第五预设电压V5大于所述第三预设电压V3,所述第六预设电压V6大于所述第四预设电压V4,所述第六预设电压V6小于所述第五预设电压V5。
在第二实施例的基础上,以第一数据信号的电压大于所述第二数据信号的电压为例,如图8所示,S9表示第一数据信号,S10表示第二数据信号。当触控信号的上升沿到来时,第一控制信号S5为有效电平,所述第一开关元件K1、所述第二开关元件K2、第五开关元件K5、第六开关元件K6、第十三开关元件K13以及第十四开关元件K14闭合;第三开关元件K3、第四开关元件K4、第七开关元件K7、第八开关元件K8、第十五开关元件K15以及第十六开关元件K16断开。从图8可以看出,通常情况下第一数据线11在充电过程中需要从8V上升到V1,再从V1上升到V3,再从V3上升到V5,再从V5充到16V,或者在下降过程中从16V降到V5,再从V5降到V3,再从V3降到V1,再从V3降到8V。在一实施方式中,所述第五预设电压V5为第一数据信号和所述第二数据信号中的最高电压的7/8。
第二数据线12在充电过程中从0V上升到V2,再从V2上升到V4,再从V4上升到V6,再从V6上升到8V,在下降过程中需要从8V降到V6,再从V6降到V4,再从V4降到V2,再从V2降到0V,从而进一步降低了源驱动芯片的温度,避免源驱动芯片受损。在一实施方式中,所述第六预设电压V6为所述第二数据信号的最高电压的6/8。第五预设电压和第六预设电压的大小不限于此。
可以理解的,当第一数据信号的电压小于所述第二数据信号的电压时,当触控信号的上升沿到来时,所述第一开关元件K1、所述第二开关元件K2、第五开关元件K5、第六开关元件K6、第十三开关元件K13以及第十四开关元件K14断开,第三开关元件K3、第四开关元件K4、第七开关元件K7、第八开关元件K8、第十五开关元件K15以及第十六开关元件K16闭合。开关元件不限于图7所示的开关,还可为薄膜晶体管等其他元件。
本申请实施例还提供一种显示装置,在一实施方式中,该显示装置包括上述任意一种源驱动芯片。在一实施方式中,该源驱动芯片也可集成在显示面板中。
所述显示装置包括但不限定于显示面板、手机、平板电脑、计算机显示器、显示屏幕、游戏机、电视机、可穿戴设备及其他具有显示功能的生活电器或家用电器等。
可以理解的,图1至图8仅给出一种示例,并不能对本发明构成限定。
本申请实施例的源驱动芯片以及显示装置,包括第一预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线预充电至第一预设电压以及将所述第二数据线预充电至第二预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线预充电至第二预设电压以及将所述第二数据线预充电至第一预设电压;所述第一预设电压大于所述第二预设电压;因此减小了充电电压的增长幅度,从而降低了源驱动芯片的温度,进而避免源驱动芯片受损。
以上对本申请实施例提供的源驱动芯片以及显示装置进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请。同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。
Claims (20)
- 一种源驱动芯片,其应用于显示面板中,所述显示面板包括多条第一数据线和多条第二数据线,所述第一数据线用于输入第一数据信号,所述第二数据线用于输入第二数据信号,所述第一数据线和所述第二数据线交错设置,所述第一数据信号和所述第二数据信号不等;所述源驱动芯片包括:第一电源模块,用于提供第一电压范围的电源电压;第二电源模块,用于提供第二电压范围的电源电压;所述第二电压范围与所述第一电压范围相对于预设参考电压对称;第一预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线预充电至第一预设电压以及将所述第二数据线预充电至第二预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线预充电至第二预设电压以及将所述第二数据线预充电至第一预设电压;所述第一预设电压大于所述第二预设电压;选择模块,用于根据第一数据信号的电压在所述第一电源模块和第二电源模块中选择其中一个电源模块与所述第一数据线连接;以及根据第二数据信号的电压在所述第一电源模块和第二电源模块中选择另外一个电源模块与所述第二数据线连接,以将所述第一数据线充电至第一预设目标电压和将所述第二数据线充电至第二预设目标电压。
- 根据权利要求1所述的源驱动芯片,其中所述第一预充电模块包括第一预充单元和第二预充单元;所述第一预充单元用于在第一控制信号的控制下,将所述第一数据线预先充电至第一预设电压以及将所述第二数据线预先充电至第二预设电压,所述第一控制信号根据所述第一数据信号的电压和所述预设参考电压之间的差值生成;所述第二预充单元用于在第二控制信号的控制下,将所述第一数据线预先充电至所述第二预设电压以及将所述第二数据线预先充电至所述第一预设电压,所述第二控制信号根据所述第二数据信号的电压和所述预设参考电压之间的差值生成,所述第一控制信号和所述第二控制信号的电平相反。
- 根据权利要求2所述的源驱动芯片,其中所述第一预充单元包括第一开关元件和第二开关元件;所述第一开关元件的输入端接入所述第一预设电压;所述第一开关元件的输出端与所述第一数据线连接;所述第一开关元件的控制端和所述第二开关元件的控制端均接入所述第一控制信号;所述第二开关元件的输入端接入所述第二预设电压;所述第二开关元件的输出端与所述第二数据线连接。
- 根据权利要求3所述的源驱动芯片,其中所述第一预充单元还包括第三开关元件和第四开关元件;所述第三开关元件的输入端接入所述第二预设电压,所述第三开关元件的输出端与所述第一数据线连接;所述第四开关元件的输入端接入所述第一预设电压,所述第四开关元件的输出端与所述第二数据线连接。
- 根据权利要求4所述的源驱动芯片,其中当所述第一数据信号的电压大于所述预设参考电压时,所述第一控制信号为有效电平;所述第二控制信号为无效电平;当所述第二数据信号的电压大于所述预设参考电压时,所述第二控制信号为有效电平;所述第一控制信号为无效电平。
- 根据权利要求2所述的源驱动芯片,其中所述源驱动芯片还包括:第二预充电模块;所述第二预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线从所述第一预设电压充电至第三预设电压以及将所述第二数据线从所述第二预设电压充电至所述第四预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线从所述第二预设电压充电至第四预设电压以及将所述第二数据线从所述第一预设电压充电至所述第三预设电压;所述第三预设电压大于所述第一预设电压,所述第四预设电压大于所述第二预设电压,所述第四预设电压小于所述第三预设电压。
- 根据权利要求6所述的源驱动芯片,其中所述第二预充电模块包括第三预充单元和第四预充单元;所述第三预充单元用于在所述第一控制信号的控制下,将所述第一数据线从所述第一预设电压充电至第三预设电压以及将所述第二数据线从所述第二预设电压充电至所述第四预设电压;所述第四预充单元用于在所述第二控制信号的控制下,将所述第一数据线从所述第二预设电压充电至第四预设电压以及将所述第二数据线从所述第一预设电压充电至所述第三预设电压。
- 根据权利要求7所述的源驱动芯片,其中所述第三预充单元包括第五开关元件和第六开关元件;所述第五开关元件的输入端接入所述第三预设电压;所述第五开关元件的输出端与所述第一数据线连接;所述第五开关元件的控制端和所述第六开关元件的控制端均接入所述第一控制信号;所述第六开关元件的输入端接入所述第四预设电压;所述第六开关元件的输出端与所述第二数据线连接。
- 根据权利要求8所述的源驱动芯片,其中所述第四预充单元包括第七开关元件以及第八开关元件;所述第七开关元件的输入端接入所述第四预设电压,所述第七开关元件的控制端和所述第八开关元件的控制端均接入所述第二控制信号;所述第七开关元件的输出端与所述第一数据线连接;所述第八开关元件的输入端接入所述第三预设电压,所述第八开关元件的输出端与所述第二数据线连接。
- 根据权利要求9所述的源驱动芯片,其中当所述第一数据信号的电压大于所述第二数据信号的电压时,所述第五开关元件和所述第六开关元件闭合,所述第七开关元件和所述第八开关元件断开;当所述第一数据信号的电压小于所述第二数据信号的电压时,所述第五开关元件和所述第六开关元件断开,所述第七开关元件和所述第八开关元件闭合。
- 根据权利要求6所述的源驱动芯片,其中所述源驱动芯片还包括:第三预充电模块;所述第三预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线从所述第三预设电压充电至第五预设电压以及将所述第二数据线从所述第四预设电压充电至所述第六预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线从所述第四预设电压充电至所述第六预设电压以及将所述第二数据线从所述第三预设电压充电至第五预设电压;所述第五预设电压大于所述第三预设电压,所述第六预设电压大于所述第四预设电压,所述第六预设电压小于所述第五预设电压。
- 根据权利要求11所述的源驱动芯片,其中所述源驱动芯片还包括:所述第三预充电模块包括第五预充单元和第六预充单元;所述第五预充单元用于在所述第一控制信号的控制下,将所述第一数据线从所述第三预设电压充电至第五预设电压以及将所述第二数据线从所述第四预设电压充电至所述第六预设电压;所述第四预充单元用于在所述第二控制信号的控制下,将所述第一数据线从所述第四预设电压充电至第六预设电压以及将所述第二数据线从所述第三预设电压充电至所述第五预设电压。
- 根据权利要求12所述的源驱动芯片,其中所述第五预充单元可包括第十三开关元件和第十四开关元件;所述第十三开关元件的输入端接入所述第五预设电压;所述第十三开关元件的输出端与所述第一数据线连接;所述第十三开关元件的控制端和所述第十四开关元件的控制端均接入所述第一控制信号;所述第十四开关元件的输入端接入所述第六预设电压;所述第十四开关元件的输出端与所述第二数据线连接。
- 根据权利要求12所述的源驱动芯片,其中所述第六预充单元包括第十五开关元件以及第十六开关元件;所述第十五开关元件的输入端接入所述第六预设电压,所述第十五开关元件的控制端和所述第十六开关元件的控制端均接入所述第二控制信号;所述第十五开关元件的输出端与所述第一数据线连接;所述第十六开关元件的输入端接入所述第五预设电压,所述第十六开关元件的输出端与所述第二数据线连接。
- 一种显示装置,其包括源驱动芯片,所述源驱动芯片应用于显示面板中,所述显示面板包括多条第一数据线和多条第二数据线,所述第一数据线用于输入第一数据信号,所述第二数据线用于输入第二数据信号,所述第一数据线和所述第二数据线交错设置,所述第一数据信号和所述第二数据信号不等;所述源驱动芯片包括:第一电源模块,用于提供第一电压范围的电源电压;第二电源模块,用于提供第二电压范围的电源电压;所述第二电压范围与所述第一电压范围相对于预设参考电压对称;第一预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线预充电至第一预设电压以及将所述第二数据线预充电至第二预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线预充电至第二预设电压以及将所述第二数据线预充电至第一预设电压;所述第一预设电压大于所述第二预设电压;选择模块,用于根据第一数据信号的电压在所述第一电源模块和第二电源模块中选择其中一个电源模块与所述第一数据线连接;以及根据第二数据信号的电压在所述第一电源模块和第二电源模块中选择另外一个电源模块与所述第二数据线连接,以将所述第一数据线充电至第一预设目标电压和将所述第二数据线充电至第二预设目标电压。
- 根据权利要求15所述的显示装置,其中所述第一预充电模块包括第一预充单元和第二预充单元;所述第一预充单元用于在第一控制信号的控制下,将所述第一数据线预先充电至第一预设电压以及将所述第二数据线预先充电至第二预设电压,所述第一控制信号根据所述第一数据信号的电压和所述预设参考电压之间的差值生成;所述第二预充单元用于在第二控制信号的控制下,将所述第一数据线预先充电至所述第二预设电压以及将所述第二数据线预先充电至所述第一预设电压,所述第二控制信号根据所述第二数据信号的电压和所述预设参考电压之间的差值生成,所述第一控制信号和所述第二控制信号的电平相反。
- 根据权利要求15所述的显示装置,其中所述第一预充单元包括第一开关元件和第二开关元件;所述第一开关元件的输入端接入所述第一预设电压;所述第一开关元件的输出端与所述第一数据线连接;所述第一开关元件的控制端和所述第二开关元件的控制端均接入所述第一控制信号;所述第二开关元件的输入端接入所述第二预设电压;所述第二开关元件的输出端与所述第二数据线连接。
- 根据权利要求17所述的显示装置,其中所述第一预充单元还包括第三开关元件和第四开关元件;所述第三开关元件的输入端接入所述第二预设电压,所述第三开关元件的输出端与所述第一数据线连接;所述第四开关元件的输入端接入所述第一预设电压,所述第四开关元件的输出端与所述第二数据线连接。
- 根据权利要求18所述的显示装置,其中当所述第一数据信号的电压大于所述预设参考电压时,所述第一控制信号为有效电平;所述第二控制信号为无效电平;当所述第二数据信号的电压大于所述预设参考电压时,所述第二控制信号为有效电平;所述第一控制信号为无效电平。
- 根据权利要求16所述的显示装置,其中所述源驱动芯片还包括:第二预充电模块;所述第二预充电模块,用于当所述第一数据信号的电压大于所述预设参考电压时,将所述第一数据线从所述第一预设电压充电至第三预设电压以及将所述第二数据线从所述第二预设电压充电至所述第四预设电压;当所述第一数据信号的电压小于所述预设参考电压时,将所述第一数据线从所述第二预设电压充电至第四预设电压以及将所述第二数据线从所述第一预设电压充电至所述第三预设电压;所述第三预设电压大于所述第一预设电压,所述第四预设电压大于所述第二预设电压,所述第四预设电压小于所述第三预设电压。
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